2 // This file is part of the Cyclone 68000 Emulator
\r
4 // Copyright (c) 2011 FinalDave (emudave (at) gmail.com)
\r
6 // This code is licensed under the GNU General Public License version 2.0 and the MAME License.
\r
7 // You can choose the license that has the most advantages for you.
\r
9 // SVN repository can be found at http://code.google.com/p/cyclone68000/
\r
13 // --------------------- Opcodes 0x0000+ ---------------------
\r
14 // Emit an Ori/And/Sub/Add/Eor/Cmp Immediate opcode, 0000ttt0 00aaaaaa
\r
21 // Get source and target EA
\r
22 type=(op>>9)&7; if (type==4 || type>=7) return 1;
\r
23 size=(op>>6)&3; if (size>=3) return 1;
\r
27 // See if we can do this opcode:
\r
28 if (EaCanRead(tea,size)==0) return 1;
\r
29 if (type!=6 && EaCanWrite(tea)==0) return 1;
\r
32 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
34 OpStart(op); Cycles=4;
\r
36 EaCalc(10,0x0000, sea,size);
\r
37 EaRead(10, 10, sea,size,1);
\r
39 EaCalc(11,0x003f, tea,size);
\r
40 EaRead(11, 0, tea,size,1);
\r
42 ot(";@ Do arithmetic:\n");
\r
44 if (type==0) ot(" orr r1,r0,r10\n");
\r
45 if (type==1) ot(" and r1,r0,r10\n");
\r
46 if (type==2) ot(" subs r1,r0,r10 ;@ Defines NZCV\n");
\r
47 if (type==3) ot(" adds r1,r0,r10 ;@ Defines NZCV\n");
\r
48 if (type==5) ot(" eor r1,r0,r10\n");
\r
49 if (type==6) ot(" cmp r0,r10 ;@ Defines NZCV\n");
\r
51 if (type<2 || type==5) ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n"); // 0,1,5
\r
53 if (type< 2) OpGetFlags(0,0); // Ori/And
\r
54 if (type==2) OpGetFlags(1,1); // Sub: Subtract/X-bit
\r
55 if (type==3) OpGetFlags(0,1); // Add: X-bit
\r
56 if (type==5) OpGetFlags(0,0); // Eor
\r
57 if (type==6) OpGetFlags(1,0); // Cmp: Subtract
\r
62 EaWrite(11, 1, tea,size,1);
\r
68 if (size>=2 && tea<0x10) Cycles+=2;
\r
72 if (size>=2) Cycles+=4;
\r
73 if (tea>=0x10) Cycles+=4;
\r
74 if (Amatch && type==1 && size>=2 && tea<0x10) Cycles-=2;
\r
82 // --------------------- Opcodes 0x5000+ ---------------------
\r
85 // 0101nnnt xxeeeeee (nnn=#8,1-7 t=addq/subq xx=size, eeeeee=EA)
\r
86 int num=0,type=0,size=0,ea=0;
\r
91 num =(op>>9)&7; if (num==0) num=8;
\r
93 size=(op>>6)&3; if (size>=3) return 1;
\r
96 // See if we can do this opcode:
\r
97 if (EaCanRead (ea,size)==0) return 1;
\r
98 if (EaCanWrite(ea )==0) return 1;
\r
100 use=op; if (ea<0x38) use&=~7;
\r
101 if ((ea&0x38)==0x08) { size=2; use&=~0xc0; } // Every addq #n,An is 32-bit
\r
103 if (num!=8) use|=0x0e00; // If num is not 8, use same handler
\r
104 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
108 if (size>=2 && ea!=8) Cycles+=4;
\r
110 EaCalc(10,0x003f, ea,size);
\r
111 EaRead(10, 0, ea,size,1);
\r
113 shift=32-(8<<size);
\r
119 if (lsr>=0) ot(" mov r2,r8,lsr #%d ;@ Get quick value\n", lsr);
\r
120 else ot(" mov r2,r8,lsl #%d ;@ Get quick value\n",-lsr);
\r
122 ot(" and r2,r2,#0x%.4x\n",7<<shift);
\r
124 strcpy(count,"r2");
\r
127 if (num==8) sprintf(count,"#0x%.4x",8<<shift);
\r
129 if (type==0) ot(" adds r1,r0,%s\n",count);
\r
130 if (type==1) ot(" subs r1,r0,%s\n",count);
\r
132 if ((ea&0x38)!=0x08) OpGetFlags(type,1);
\r
135 EaWrite(10, 1, ea,size,1);
\r
142 // --------------------- Opcodes 0x8000+ ---------------------
\r
143 // 1t0tnnnd xxeeeeee (tt=type:or/sub/and/add xx=size, eeeeee=EA)
\r
144 int OpArithReg(int op)
\r
147 int type=0,size=0,dir=0,rea=0,ea=0;
\r
152 size=(op>> 6)&3; if (size>=3) return 1;
\r
155 if (dir && ea<0x10) return 1; // addx/subx opcode
\r
157 // See if we can do this opcode:
\r
158 if (dir==0 && EaCanWrite(rea)==0) return 1;
\r
159 if (dir && EaCanWrite( ea)==0) return 1;
\r
162 use&=~0x0e00; // Use same opcode for Dn
\r
163 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
165 OpStart(op); Cycles=4;
\r
167 ot(";@ Get r10=EA r11=EA value\n");
\r
168 EaCalc(10,0x003f, ea,size);
\r
169 EaRead(10, 11, ea,size,1);
\r
170 ot(";@ Get r0=Register r1=Register value\n");
\r
171 EaCalc( 0,0x0e00,rea,size);
\r
172 EaRead( 0, 1,rea,size,1);
\r
174 ot(";@ Do arithmetic:\n");
\r
175 if (type==0) ot(" orr ");
\r
176 if (type==1) ot(" subs ");
\r
177 if (type==4) ot(" and ");
\r
178 if (type==5) ot(" adds ");
\r
179 if (dir) ot("r1,r11,r1\n");
\r
180 else ot("r1,r1,r11\n");
\r
182 if ((type&1)==0) ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
184 OpGetFlags(type==1,type&1); // 1==subtract
\r
187 ot(";@ Save result:\n");
\r
188 if (dir) EaWrite(10, 1, ea,size,1);
\r
189 else EaWrite( 0, 1,rea,size,1);
\r
191 if (size==1 && ea>=0x10) Cycles+=4;
\r
192 if (size>=2) { if (ea<0x10) Cycles+=4; else Cycles+=2; }
\r
199 // --------------------- Opcodes 0x80c0+ ---------------------
\r
202 // Div/Mul: 1m00nnns 11eeeeee (m=Mul, nnn=Register Dn, s=signed, eeeeee=EA)
\r
203 int type=0,rea=0,sign=0,ea=0;
\r
206 type=(op>>14)&1; // div/mul
\r
211 // See if we can do this opcode:
\r
212 if (EaCanRead(ea,1)==0) return 1;
\r
215 use&=~0x0e00; // Use same for all registers
\r
216 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
218 OpStart(op); Cycles=type?70:133;
\r
220 EaCalc(10,0x003f, ea, 1);
\r
221 EaRead(10, 10, ea, 1);
\r
223 EaCalc (0,0x0e00,rea, 2);
\r
224 EaRead (0, 2,rea, 2);
\r
228 ot(" cmp r10,#0\n");
\r
229 ot(" moveq r10,#1 ;@ Divide by zero\n");
\r
234 ot(" mov r11,#0 ;@ r11 = 1 if the result is negative\n");
\r
235 ot(" eorlt r11,r11,#1\n");
\r
236 ot(" rsblt r10,r10,#0 ;@ Make r10 positive\n");
\r
238 ot(" cmp r2,#0\n");
\r
239 ot(" eorlt r11,r11,#1\n");
\r
240 ot(" rsblt r2,r2,#0 ;@ Make r2 positive\n");
\r
244 ot(";@ Divide r2 by r10\n");
\r
245 ot(" mov r3,#0\n");
\r
246 ot(" mov r1,r10\n");
\r
248 ot(";@ Shift up divisor till it's just less than numerator\n");
\r
249 ot("Shift%.4x%s\n",op,ms?"":":");
\r
250 ot(" cmp r1,r2,lsr #1\n");
\r
251 ot(" movls r1,r1,lsl #1\n");
\r
252 ot(" bcc Shift%.4x\n",op);
\r
255 ot("Divide%.4x%s\n",op,ms?"":":");
\r
256 ot(" cmp r2,r1\n");
\r
257 ot(" adc r3,r3,r3 ;@ Double r3 and add 1 if carry set\n");
\r
258 ot(" subcs r2,r2,r1\n");
\r
259 ot(" teq r1,r10\n");
\r
260 ot(" movne r1,r1,lsr #1\n");
\r
261 ot(" bne Divide%.4x\n",op);
\r
266 ot(" tst r11,r11\n");
\r
267 ot(" rsbne r3,r3,#0 ;@ Negate if result is negative\n");
\r
270 ot(" mov r11,r2 ;@ Remainder\n");
\r
272 ot(" adds r1,r3,#0 ;@ Defines NZ, clears CV\n");
\r
275 ot(" mov r1,r1,lsl #16 ;@ Clip to 16-bits\n");
\r
276 ot(" mov r1,r1,lsr #16\n");
\r
277 ot(" orr r1,r1,r11,lsl #16 ;@ Insert remainder\n");
\r
284 ot(";@ Get 16-bit signs right:\n");
\r
285 if (sign==0) { ot(" mov r10,r10,lsl #16\n"); shift="lsr"; }
\r
286 ot(" mov r2,r2,lsl #16\n");
\r
288 if (sign==0) ot(" mov r10,r10,lsr #16\n");
\r
289 ot(" mov r2,r2,%s #16\n",shift);
\r
292 ot(" mul r1,r2,r10\n");
\r
293 ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
296 if (Amatch && ea==0x3c) Cycles-=4;
\r
300 EaWrite(0, 1,rea, 2);
\r
308 // Get X Bit into carry - trashes r2
\r
309 static int GetXBit(int subtract)
\r
311 ot(";@ Get X bit:\n");
\r
312 ot(" ldrb r2,[r7,#0x45]\n");
\r
313 if (subtract) ot(" mvn r2,r2,lsl #28 ;@ Invert it\n");
\r
314 else ot(" mov r2,r2,lsl #28\n");
\r
315 ot(" msr cpsr_flg,r2 ;@ Get into Carry\n");
\r
320 // --------------------- Opcodes 0x8100+ ---------------------
\r
321 // 1t00ddd1 0000asss - sbcd/abcd Ds,Dd or -(As),-(Ad)
\r
325 int type=0,sea=0,addr=0,dea=0;
\r
332 if (addr) { sea|=0x20; dea|=0x20; }
\r
334 use=op&~0x0e07; // Use same opcode for all registers
\r
335 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
337 OpStart(op); Cycles=6;
\r
339 EaCalc( 0,0x0007, sea,0);
\r
340 EaRead( 0, 10, sea,0,1);
\r
341 EaCalc(11,0x0e00, dea,0);
\r
342 EaRead(11, 1, dea,0,1);
\r
344 ot(" ldrb r2,[r7,#0x45] ;@ Get X bit\n");
\r
345 ot(" tst r2,#2\n");
\r
346 ot(" addne r10,r10,#0x01000000 ;@ Add carry bit\n");
\r
350 ot(";@ Add units into r2:\n");
\r
351 ot(" and r2,r1, #0x0f000000\n");
\r
352 ot(" and r0,r10,#0x0f000000\n");
\r
353 ot(" add r2,r2,r0\n");
\r
354 ot(" cmp r2,#0x0a000000\n");
\r
355 ot(" addpl r1,r1,#0x06000000 ;@ Decimal adjust units\n");
\r
356 ot(" add r1,r1,r10 ;@ Add BCD\n");
\r
357 ot(" mov r0,r1,lsr #24\n");
\r
358 ot(" cmp r0,#0xa0\n");
\r
359 ot(" addpl r1,r1,#0x60000000 ;@ Decimal adjust tens\n");
\r
364 ot(";@ Sub units into r2:\n");
\r
365 ot(" and r2,r1, #0x0f000000\n");
\r
366 ot(" and r0,r10,#0x0f000000\n");
\r
367 ot(" subs r2,r2,r0\n");
\r
368 ot(" submi r1,r1,#0x06000000 ;@ Decimal adjust units\n");
\r
369 ot(" subs r1,r1,r10 ;@ Subtract BCD\n");
\r
370 ot(" submis r1,r1,#0x60000000 ;@ Decimal adjust tens\n");
\r
375 EaWrite(11, 1, dea,0,1);
\r
382 // --------------------- Opcodes 0x90c0+ ---------------------
\r
383 // Suba/Cmpa/Adda 1tt1nnnx 11eeeeee (tt=type, x=size, eeeeee=Source EA)
\r
384 int OpAritha(int op)
\r
387 int type=0,size=0,sea=0,dea=0;
\r
389 // Suba/Cmpa/Adda/(invalid):
\r
390 type=(op>>13)&3; if (type>=3) return 1;
\r
392 size=(op>>8)&1; size++;
\r
393 dea=(op>>9)&7; dea|=8; // Dest=An
\r
394 sea=op&0x003f; // Source
\r
396 // See if we can do this opcode:
\r
397 if (EaCanRead(sea,size)==0) return 1;
\r
400 use&=~0x0e00; // Use same opcode for An
\r
401 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
403 OpStart(op); Cycles=4;
\r
404 EaCalc ( 0,0x003f, sea,size);
\r
405 EaRead ( 0, 10, sea,size);
\r
407 EaCalc ( 0,0x0e00, dea,2);
\r
408 EaRead ( 0, 1, dea,2);
\r
410 if (type==0) ot(" sub r1,r1,r10\n");
\r
411 if (type==1) ot(" cmp r1,r10 ;@ Defines NZCV\n");
\r
412 if (type==1) OpGetFlags(1,0); // Get Cmp flags
\r
413 if (type==2) ot(" add r1,r1,r10\n");
\r
416 EaWrite( 0, 1, dea,2);
\r
418 if (Amatch && sea==0x3c) Cycles-=size<2?4:8; // Correct?
\r
419 if (size>=2) { if (sea<0x10) Cycles+=4; else Cycles+=2; }
\r
426 // --------------------- Opcodes 0x9100+ ---------------------
\r
427 // Emit a Subx/Addx opcode, 1t01ddd1 zz000sss addx.z Ds,Dd
\r
431 int type=0,size=0,dea=0,sea=0;
\r
435 size=(op>> 6)&3; if (size>=3) return 1;
\r
438 // See if we can do this opcode:
\r
439 if (EaCanRead(sea,size)==0) return 1;
\r
440 if (EaCanWrite(dea)==0) return 1;
\r
443 use&=~0x0e00; // Use same opcode for Dn
\r
444 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
446 OpStart(op); Cycles=8;
\r
448 ot(";@ Get r10=EA r11=EA value\n");
\r
449 EaCalc( 0,0x003f,sea,size);
\r
450 EaRead( 0, 11,sea,size,1);
\r
451 ot(";@ Get r0=Register r1=Register value\n");
\r
452 EaCalc( 0,0x0e00,dea,size);
\r
453 EaRead( 0, 1,dea,size,1);
\r
455 ot(";@ Do arithmetic:\n");
\r
458 if (type==5 && size<2)
\r
460 ot(";@ Make sure the carry bit will tip the balance:\n");
\r
461 if (size==0) ot(" ldr r2,=0x00ffffff\n");
\r
462 else ot(" ldr r2,=0x0000ffff\n");
\r
463 ot(" orr r11,r11,r2\n");
\r
467 if (type==1) ot(" sbcs r1,r1,r11\n");
\r
468 if (type==5) ot(" adcs r1,r1,r11\n");
\r
469 OpGetFlags(type==1,1); // subtract
\r
472 ot(";@ Save result:\n");
\r
473 EaWrite( 0, 1, dea,size,1);
\r
480 // --------------------- Opcodes 0xb000+ ---------------------
\r
481 // Emit a Cmp/Eor opcode, 1011rrrt xxeeeeee (rrr=Dn, t=cmp/eor, xx=size extension, eeeeee=ea)
\r
482 int OpCmpEor(int op)
\r
485 int size=0,ea=0,use=0;
\r
487 // Get EA and register EA
\r
490 size=(op>>6)&3; if (size>=3) return 1;
\r
493 // See if we can do this opcode:
\r
494 if (EaCanRead(ea,size)==0) return 1;
\r
495 if (eor && EaCanWrite(ea)==0) return 1;
\r
498 use&=~0x0e00; // Use 1 handler for register d0-7
\r
499 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
501 OpStart(op); Cycles=eor?8:4;
\r
503 ot(";@ Get EA into r10 and value into r0:\n");
\r
504 EaCalc (10,0x003f, ea,size);
\r
505 EaRead (10, 0, ea,size,1);
\r
507 ot(";@ Get register operand into r1:\n");
\r
508 EaCalc (1 ,0x0e00, rea,size);
\r
509 EaRead (1, 1, rea,size,1);
\r
511 ot(";@ Do arithmetic:\n");
\r
512 if (eor==0) ot(" cmp r1,r0\n");
\r
515 ot(" eor r1,r0,r1\n");
\r
516 ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
\r
519 OpGetFlags(eor==0,0); // Cmp like subtract
\r
522 if (size>=2) Cycles+=4; // Correct?
\r
523 if (ea==0x3c) Cycles-=4;
\r
525 if (eor) EaWrite(10, 1,ea,size,1);
\r