1 /* FCE Ultra - NES/Famicom Emulator
3 * Copyright notice for this file:
4 * Copyright (C) 2002 Ben Parnell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 static uint8 latch[8];
25 #define CHRRAM (GameMemBlock)
27 static void S74LS374NSynco(void)
29 setprg32(0x8000,latch[0]);
32 setmirror(latch[2]&1);
36 static DECLFW(S74LS374NWrite)
38 //printf("$%04x:$%02x\n",A,V);
46 case 0:latch[0]=0;latch[1]=3;break;
47 case 4:latch[1]&=3;latch[1]|=(V<<2);break;
48 case 5:latch[0]=V&0x7;break;
49 case 6:latch[1]&=0x1C;latch[1]|=V&3;break;
50 case 7:latch[2]=V&1;break;
56 static void S74LS374NReset(void)
61 SetReadHandler(0x8000,0xFFFF,CartBR);
62 SetWriteHandler(0x4100,0x7FFF,S74LS374NWrite);
65 static void S74LS374NRestore(int version)
70 void S74LS374N_Init(void)
72 BoardPower=S74LS374NReset;
73 GameStateRestore=S74LS374NRestore;
74 AddExState(latch, 3, 0, "LATC");
75 AddExState(&cmd, 1, 0, "CMD");
79 static void S8259Synco(void)
83 setprg32(0x8000,latch[5]&7);
86 if(!UNIFchrrama) // No CHR RAM? Then BS'ing is ok.
91 setchr2(0x800*x,(x&1)|((latch[x]&7)<<1)|((latch[4]&7)<<4));
96 setchr2(0x800*x,(latch[x]&0x7)|((latch[4]&7)<<3));
99 switch((latch[7]>>1)&3)
101 case 0:setmirrorw(0,0,0,1);break;
102 case 1:setmirror(MI_H);break;
103 case 2:setmirror(MI_V);break;
104 case 3:setmirror(MI_0);break;
108 static DECLFW(S8259Write)
119 static void S8259Reset(void)
124 for(x=0;x<8;x++) latch[x]=0;
125 if(UNIFchrrama) setchr8(0);
128 SetReadHandler(0x8000,0xFFFF,CartBR);
129 SetWriteHandler(0x4100,0x7FFF,S8259Write);
132 static void S8259Restore(int version)
137 void S8259A_Init(void)
139 BoardPower=S8259Reset;
140 GameStateRestore=S8259Restore;
141 AddExState(latch, 8, 0, "LATC");
142 AddExState(&cmd, 1, 0, "CMD");
147 // SetupCartCHRMapping(0,CHRRAM,8192,1);
148 // AddExState(CHRRAM, 8192, 0, "CHRR");
152 void S8259B_Init(void)
154 BoardPower=S8259Reset;
155 GameStateRestore=S8259Restore;
156 AddExState(latch, 8, 0, "LATC");
157 AddExState(&cmd, 1, 0, "CMD");
161 static void(*WSync)(void);
163 static void SA0161MSynco()
165 setprg32(0x8000,(latch[0]>>3)&1);
170 static DECLFW(SAWrite)
179 static void SAReset(void)
183 SetReadHandler(0x8000,0xFFFF,CartBR);
184 SetWriteHandler(0x4100,0x5FFF,SAWrite);
187 void SA0161M_Init(void)
190 GameStateRestore=SA0161MSynco;
192 AddExState(&latch[0], 1, 0, "LATC");
195 static void SA72007Synco()
199 setchr8(latch[0]>>7);
202 void SA72007_Init(void)
205 GameStateRestore=SA72007Synco;
207 AddExState(&latch[0], 1, 0, "LATC");
210 static void SA72008Synco()
212 setprg32(0x8000,(latch[0]>>2)&1);
217 void SA72008_Init(void)
220 GameStateRestore=SA72008Synco;
222 AddExState(&latch[0], 1, 0, "LATC");
225 static DECLFW(SADWrite)
231 static void SADReset(void)
235 SetReadHandler(0x8000,0xFFFF,CartBR);
236 SetWriteHandler(0x8000,0xFFFF,SADWrite);
239 static void SA0036Synco()
243 setchr8(latch[0]>>7);
246 static void SA0037Synco()
248 setprg32(0x8000,(latch[0]>>3)&1);
253 void SA0036_Init(void)
256 GameStateRestore=SA0036Synco;
258 AddExState(&latch[0], 1, 0, "LATC");
261 void SA0037_Init(void)
264 GameStateRestore=SA0037Synco;
266 AddExState(&latch[0], 1, 0, "LATC");
269 static void TCU01Synco()
271 setprg32(0x8000,(latch[0]>>2)&1);
273 setchr8((latch[0]>>3)&0xF);
276 static DECLFW(TCWrite)
283 static void TCU01Reset(void)
286 SetReadHandler(0x8000,0xFFFF,CartBR);
287 SetWriteHandler(0x4100,0xFFFF,TCWrite);
291 void TCU01_Init(void)
293 GameStateRestore=TCU01Synco;
294 BoardPower=TCU01Reset;
295 AddExState(&latch[0], 1, 0, "LATC");