1 /***************************************************************************
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2 freeze.c - description
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4 begin : Wed May 15 2002
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5 copyright : (C) 2002 by Pete Bernert
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6 email : BlackDove@addcom.de
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7 ***************************************************************************/
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8 /***************************************************************************
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10 * This program is free software; you can redistribute it and/or modify *
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11 * it under the terms of the GNU General Public License as published by *
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12 * the Free Software Foundation; either version 2 of the License, or *
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13 * (at your option) any later version. See also the license.txt file for *
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14 * additional informations. *
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16 ***************************************************************************/
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22 #include "externals.h"
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23 #include "registers.h"
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26 ////////////////////////////////////////////////////////////////////////
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28 ////////////////////////////////////////////////////////////////////////
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40 unsigned int ReleaseVal;
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42 int ReleaseStartTime;
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56 int SustainIncrease;
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68 // no mutexes used anymore... don't need them to sync access
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71 int bNew; // start flag
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73 int iSBPos; // mixing stuff
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76 int SB[32+32]; // Pete added another 32 dwords in 1.6 ... prevents overflow issues with gaussian/cubic interpolation (thanx xodnizel!), and can be used for even better interpolations, eh? :)
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79 int iStart; // start ptr into sound mem
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80 int iCurr; // current pos in sound mem
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81 int iLoop; // loop ptr in sound mem
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83 int bOn; // is channel active (sample playing?)
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84 int bStop; // is channel stopped (sample _can_ still be playing, ADSR Release phase)
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85 int bReverb; // can we do reverb on this channel? must have ctrl register bit, to get active
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86 int iActFreq; // current psx pitch
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87 int iUsedFreq; // current pc pitch
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88 int iLeftVolume; // left volume
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89 int iLeftVolRaw; // left psx volume value
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90 int bIgnoreLoop; // ignore loop bit, if an external loop address is used
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91 int iMute; // mute mode
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92 int iRightVolume; // right volume
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93 int iRightVolRaw; // right psx volume value
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94 int iRawPitch; // raw pitch (0...3fff)
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95 int iIrqDone; // debug irq done flag
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96 int s_1; // last decoding infos
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98 int bRVBActive; // reverb active flag
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99 int iRVBOffset; // reverb offset
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100 int iRVBRepeat; // reverb repeat
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101 int bNoise; // noise active flag
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102 int bFMod; // freq mod (0=off, 1=sound channel, 2=freq channel)
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103 int iRVBNum; // another reverb helper
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104 int iOldNoise; // old noise val for this channel
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105 ADSRInfo ADSR; // active ADSR settings
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106 ADSRInfoEx_orig ADSRX; // next ADSR settings (will be moved to active on sample start)
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112 uint32_t ulFreezeVersion;
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113 uint32_t ulFreezeSize;
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114 unsigned char cSPUPort[0x200];
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115 unsigned char cSPURam[0x80000];
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121 unsigned short spuIrq;
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128 SPUCHAN_orig s_chan[MAXCHAN];
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132 ////////////////////////////////////////////////////////////////////////
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134 void LoadStateV5(SPUFreeze_t * pF); // newest version
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135 void LoadStateUnknown(SPUFreeze_t * pF, uint32_t cycles); // unknown format
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137 // we want to retain compatibility between versions,
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138 // so use original channel struct
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139 static void save_channel(SPUCHAN_orig *d, const SPUCHAN *s, int ch)
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141 memset(d, 0, sizeof(*d));
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142 d->bNew = !!(spu.dwNewChannel & (1<<ch));
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143 d->iSBPos = s->iSBPos;
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146 memcpy(d->SB, spu.SB + ch * SB_SIZE, sizeof(d->SB[0]) * SB_SIZE);
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147 d->iStart = (regAreaGet(ch,6)&~1)<<3;
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148 d->iCurr = 0; // set by the caller
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149 d->iLoop = 0; // set by the caller
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150 d->bOn = !!(spu.dwChannelOn & (1<<ch));
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151 d->bStop = s->ADSRX.State == ADSR_RELEASE;
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152 d->bReverb = s->bReverb;
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155 d->iLeftVolume = s->iLeftVolume;
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156 // this one is nasty but safe, save compat is important
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157 d->bIgnoreLoop = (s->prevflags ^ 2) << 1;
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158 d->iRightVolume = s->iRightVolume;
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159 d->iRawPitch = s->iRawPitch;
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160 d->s_1 = spu.SB[ch * SB_SIZE + 27]; // yes it's reversed
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161 d->s_2 = spu.SB[ch * SB_SIZE + 26];
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162 d->bRVBActive = s->bRVBActive;
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163 d->bNoise = s->bNoise;
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164 d->bFMod = s->bFMod;
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165 d->ADSRX.State = s->ADSRX.State;
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166 d->ADSRX.AttackModeExp = s->ADSRX.AttackModeExp;
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167 d->ADSRX.AttackRate = s->ADSRX.AttackRate;
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168 d->ADSRX.DecayRate = s->ADSRX.DecayRate;
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169 d->ADSRX.SustainLevel = s->ADSRX.SustainLevel;
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170 d->ADSRX.SustainModeExp = s->ADSRX.SustainModeExp;
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171 d->ADSRX.SustainIncrease = s->ADSRX.SustainIncrease;
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172 d->ADSRX.SustainRate = s->ADSRX.SustainRate;
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173 d->ADSRX.ReleaseModeExp = s->ADSRX.ReleaseModeExp;
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174 d->ADSRX.ReleaseRate = s->ADSRX.ReleaseRate;
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175 d->ADSRX.EnvelopeVol = s->ADSRX.EnvelopeVol;
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176 d->ADSRX.lVolume = d->bOn; // hmh
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179 static void load_channel(SPUCHAN *d, const SPUCHAN_orig *s, int ch)
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181 memset(d, 0, sizeof(*d));
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182 if (s->bNew) spu.dwNewChannel |= 1<<ch;
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183 d->iSBPos = s->iSBPos;
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184 if ((uint32_t)d->iSBPos >= 28) d->iSBPos = 27;
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188 memcpy(spu.SB + ch * SB_SIZE, s->SB, sizeof(spu.SB[0]) * SB_SIZE);
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189 d->pCurr = (void *)((long)s->iCurr & 0x7fff0);
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190 d->pLoop = (void *)((long)s->iLoop & 0x7fff0);
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191 d->bReverb = s->bReverb;
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192 d->iLeftVolume = s->iLeftVolume;
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193 d->iRightVolume = s->iRightVolume;
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194 d->iRawPitch = s->iRawPitch;
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195 d->bRVBActive = s->bRVBActive;
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196 d->bNoise = s->bNoise;
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197 d->bFMod = s->bFMod;
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198 d->prevflags = (s->bIgnoreLoop >> 1) ^ 2;
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199 d->ADSRX.State = s->ADSRX.State;
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200 if (s->bStop) d->ADSRX.State = ADSR_RELEASE;
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201 d->ADSRX.AttackModeExp = s->ADSRX.AttackModeExp;
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202 d->ADSRX.AttackRate = s->ADSRX.AttackRate;
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203 d->ADSRX.DecayRate = s->ADSRX.DecayRate;
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204 d->ADSRX.SustainLevel = s->ADSRX.SustainLevel;
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205 d->ADSRX.SustainModeExp = s->ADSRX.SustainModeExp;
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206 d->ADSRX.SustainIncrease = s->ADSRX.SustainIncrease;
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207 d->ADSRX.SustainRate = s->ADSRX.SustainRate;
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208 d->ADSRX.ReleaseModeExp = s->ADSRX.ReleaseModeExp;
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209 d->ADSRX.ReleaseRate = s->ADSRX.ReleaseRate;
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210 d->ADSRX.EnvelopeVol = s->ADSRX.EnvelopeVol;
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211 if (s->bOn) spu.dwChannelOn |= 1<<ch;
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212 else d->ADSRX.EnvelopeVol = 0;
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215 // force load from regArea to variables
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216 static void load_register(unsigned long reg, unsigned int cycles)
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218 unsigned short *r = &spu.regArea[((reg & 0xfff) - 0xc00) >> 1];
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220 SPUwriteRegister(reg, *r ^ 1, cycles);
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223 ////////////////////////////////////////////////////////////////////////
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224 // SPUFREEZE: called by main emu on savestate load/save
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225 ////////////////////////////////////////////////////////////////////////
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227 long CALLBACK SPUfreeze(uint32_t ulFreezeMode, SPUFreeze_t * pF,
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230 int i;SPUOSSFreeze_t * pFO;
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232 if(!pF) return 0; // first check
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234 if(ulFreezeMode) // info or save?
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235 {//--------------------------------------------------//
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236 if(ulFreezeMode==1)
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237 memset(pF,0,sizeof(SPUFreeze_t)+sizeof(SPUOSSFreeze_t));
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239 strcpy(pF->szSPUName,"PBOSS");
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240 pF->ulFreezeVersion=5;
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241 pF->ulFreezeSize=sizeof(SPUFreeze_t)+sizeof(SPUOSSFreeze_t);
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243 if(ulFreezeMode==2) return 1; // info mode? ok, bye
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245 do_samples(cycles, 1);
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247 memcpy(pF->cSPURam,spu.spuMem,0x80000); // copy common infos
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248 memcpy(pF->cSPUPort,spu.regArea,0x200);
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250 if(spu.xapGlobal && spu.XAPlay!=spu.XAFeed) // some xa
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252 pF->xaS=*spu.xapGlobal;
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255 memset(&pF->xaS,0,sizeof(xa_decode_t)); // or clean xa
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257 pFO=(SPUOSSFreeze_t *)(pF+1); // store special stuff
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259 pFO->spuIrq = spu.regArea[(H_SPUirqAddr - 0x0c00) / 2];
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260 if(spu.pSpuIrq) pFO->pSpuIrq = (unsigned long)spu.pSpuIrq-(unsigned long)spu.spuMemC;
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262 pFO->spuAddr=spu.spuAddr;
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263 if(pFO->spuAddr==0) pFO->spuAddr=0xbaadf00d;
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265 for(i=0;i<MAXCHAN;i++)
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267 save_channel(&pFO->s_chan[i],&spu.s_chan[i],i);
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268 if(spu.s_chan[i].pCurr)
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269 pFO->s_chan[i].iCurr=spu.s_chan[i].pCurr-spu.spuMemC;
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270 if(spu.s_chan[i].pLoop)
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271 pFO->s_chan[i].iLoop=spu.s_chan[i].pLoop-spu.spuMemC;
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275 //--------------------------------------------------//
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278 if(ulFreezeMode!=0) return 0; // bad mode? bye
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280 memcpy(spu.spuMem,pF->cSPURam,0x80000); // get ram
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281 memcpy(spu.regArea,pF->cSPUPort,0x200);
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283 if(pF->xaS.nsamples<=4032) // start xa again
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284 SPUplayADPCMchannel(&pF->xaS);
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288 if(!strcmp(pF->szSPUName,"PBOSS") && pF->ulFreezeVersion==5)
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290 else LoadStateUnknown(pF, cycles);
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292 // repair some globals
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293 for(i=0;i<=62;i+=2)
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294 load_register(H_Reverb+i, cycles);
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295 load_register(H_SPUReverbAddr, cycles);
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296 load_register(H_SPUrvolL, cycles);
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297 load_register(H_SPUrvolR, cycles);
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299 load_register(H_SPUctrl, cycles);
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300 load_register(H_SPUstat, cycles);
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301 load_register(H_CDLeft, cycles);
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302 load_register(H_CDRight, cycles);
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304 // fix to prevent new interpolations from crashing
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305 for(i=0;i<MAXCHAN;i++) spu.SB[i * SB_SIZE + 28]=0;
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307 ClearWorkingState();
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308 spu.cycles_played = cycles;
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310 if (spu.spuCtrl & CTRL_IRQ)
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311 schedule_next_irq();
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316 ////////////////////////////////////////////////////////////////////////
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318 void LoadStateV5(SPUFreeze_t * pF)
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320 int i;SPUOSSFreeze_t * pFO;
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322 pFO=(SPUOSSFreeze_t *)(pF+1);
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324 spu.pSpuIrq = spu.spuMemC + ((spu.regArea[(H_SPUirqAddr - 0x0c00) / 2] << 3) & ~0xf);
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328 if (pFO->spuAddr == 0xbaadf00d) spu.spuAddr = 0;
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329 else spu.spuAddr = pFO->spuAddr & 0x7fffe;
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332 spu.dwNewChannel=0;
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334 spu.dwChannelDead=0;
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335 for(i=0;i<MAXCHAN;i++)
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337 load_channel(&spu.s_chan[i],&pFO->s_chan[i],i);
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339 spu.s_chan[i].pCurr+=(unsigned long)spu.spuMemC;
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340 spu.s_chan[i].pLoop+=(unsigned long)spu.spuMemC;
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344 ////////////////////////////////////////////////////////////////////////
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346 void LoadStateUnknown(SPUFreeze_t * pF, uint32_t cycles)
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350 for(i=0;i<MAXCHAN;i++)
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352 spu.s_chan[i].pLoop=spu.spuMemC;
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355 spu.dwNewChannel=0;
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357 spu.dwChannelDead=0;
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358 spu.pSpuIrq=spu.spuMemC;
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360 for(i=0;i<0xc0;i++)
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362 load_register(0x1f801c00 + i*2, cycles);
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366 ////////////////////////////////////////////////////////////////////////
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