1 /***************************************************************************
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2 registers.h - description
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4 begin : Wed May 15 2002
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5 copyright : (C) 2002 by Pete Bernert
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6 email : BlackDove@addcom.de
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7 ***************************************************************************/
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8 /***************************************************************************
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10 * This program is free software; you can redistribute it and/or modify *
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11 * it under the terms of the GNU General Public License as published by *
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12 * the Free Software Foundation; either version 2 of the License, or *
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13 * (at your option) any later version. See also the license.txt file for *
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14 * additional informations. *
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16 ***************************************************************************/
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18 #define H_SPUReverbAddr 0x0da2
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19 #define H_SPUirqAddr 0x0da4
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20 #define H_SPUaddr 0x0da6
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21 #define H_SPUdata 0x0da8
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22 #define H_SPUctrl 0x0daa
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23 #define H_SPUstat 0x0dae
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24 #define H_SPUmvolL 0x0d80
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25 #define H_SPUmvolR 0x0d82
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26 #define H_SPUrvolL 0x0d84
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27 #define H_SPUrvolR 0x0d86
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28 #define H_SPUon1 0x0d88
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29 #define H_SPUon2 0x0d8a
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30 #define H_SPUoff1 0x0d8c
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31 #define H_SPUoff2 0x0d8e
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32 #define H_FMod1 0x0d90
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33 #define H_FMod2 0x0d92
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34 #define H_Noise1 0x0d94
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35 #define H_Noise2 0x0d96
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36 #define H_RVBon1 0x0d98
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37 #define H_RVBon2 0x0d9a
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38 #define H_SPUMute1 0x0d9c
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39 #define H_SPUMute2 0x0d9e
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40 #define H_CDLeft 0x0db0
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41 #define H_CDRight 0x0db2
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42 #define H_ExtLeft 0x0db4
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43 #define H_ExtRight 0x0db6
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44 #define H_Reverb 0x0dc0
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45 #define H_SPUPitch0 0x0c04
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46 #define H_SPUPitch1 0x0c14
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47 #define H_SPUPitch2 0x0c24
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48 #define H_SPUPitch3 0x0c34
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49 #define H_SPUPitch4 0x0c44
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50 #define H_SPUPitch5 0x0c54
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51 #define H_SPUPitch6 0x0c64
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52 #define H_SPUPitch7 0x0c74
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53 #define H_SPUPitch8 0x0c84
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54 #define H_SPUPitch9 0x0c94
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55 #define H_SPUPitch10 0x0ca4
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56 #define H_SPUPitch11 0x0cb4
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57 #define H_SPUPitch12 0x0cc4
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58 #define H_SPUPitch13 0x0cd4
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59 #define H_SPUPitch14 0x0ce4
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60 #define H_SPUPitch15 0x0cf4
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61 #define H_SPUPitch16 0x0d04
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62 #define H_SPUPitch17 0x0d14
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63 #define H_SPUPitch18 0x0d24
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64 #define H_SPUPitch19 0x0d34
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65 #define H_SPUPitch20 0x0d44
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66 #define H_SPUPitch21 0x0d54
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67 #define H_SPUPitch22 0x0d64
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68 #define H_SPUPitch23 0x0d74
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70 #define H_SPUStartAdr0 0x0c06
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71 #define H_SPUStartAdr1 0x0c16
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72 #define H_SPUStartAdr2 0x0c26
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73 #define H_SPUStartAdr3 0x0c36
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74 #define H_SPUStartAdr4 0x0c46
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75 #define H_SPUStartAdr5 0x0c56
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76 #define H_SPUStartAdr6 0x0c66
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77 #define H_SPUStartAdr7 0x0c76
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78 #define H_SPUStartAdr8 0x0c86
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79 #define H_SPUStartAdr9 0x0c96
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80 #define H_SPUStartAdr10 0x0ca6
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81 #define H_SPUStartAdr11 0x0cb6
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82 #define H_SPUStartAdr12 0x0cc6
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83 #define H_SPUStartAdr13 0x0cd6
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84 #define H_SPUStartAdr14 0x0ce6
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85 #define H_SPUStartAdr15 0x0cf6
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86 #define H_SPUStartAdr16 0x0d06
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87 #define H_SPUStartAdr17 0x0d16
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88 #define H_SPUStartAdr18 0x0d26
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89 #define H_SPUStartAdr19 0x0d36
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90 #define H_SPUStartAdr20 0x0d46
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91 #define H_SPUStartAdr21 0x0d56
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92 #define H_SPUStartAdr22 0x0d66
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93 #define H_SPUStartAdr23 0x0d76
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95 #define H_SPULoopAdr0 0x0c0e
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96 #define H_SPULoopAdr1 0x0c1e
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97 #define H_SPULoopAdr2 0x0c2e
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98 #define H_SPULoopAdr3 0x0c3e
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99 #define H_SPULoopAdr4 0x0c4e
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100 #define H_SPULoopAdr5 0x0c5e
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101 #define H_SPULoopAdr6 0x0c6e
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102 #define H_SPULoopAdr7 0x0c7e
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103 #define H_SPULoopAdr8 0x0c8e
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104 #define H_SPULoopAdr9 0x0c9e
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105 #define H_SPULoopAdr10 0x0cae
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106 #define H_SPULoopAdr11 0x0cbe
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107 #define H_SPULoopAdr12 0x0cce
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108 #define H_SPULoopAdr13 0x0cde
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109 #define H_SPULoopAdr14 0x0cee
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110 #define H_SPULoopAdr15 0x0cfe
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111 #define H_SPULoopAdr16 0x0d0e
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112 #define H_SPULoopAdr17 0x0d1e
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113 #define H_SPULoopAdr18 0x0d2e
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114 #define H_SPULoopAdr19 0x0d3e
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115 #define H_SPULoopAdr20 0x0d4e
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116 #define H_SPULoopAdr21 0x0d5e
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117 #define H_SPULoopAdr22 0x0d6e
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118 #define H_SPULoopAdr23 0x0d7e
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120 #define H_SPU_ADSRLevel0 0x0c08
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121 #define H_SPU_ADSRLevel1 0x0c18
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122 #define H_SPU_ADSRLevel2 0x0c28
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123 #define H_SPU_ADSRLevel3 0x0c38
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124 #define H_SPU_ADSRLevel4 0x0c48
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125 #define H_SPU_ADSRLevel5 0x0c58
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126 #define H_SPU_ADSRLevel6 0x0c68
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127 #define H_SPU_ADSRLevel7 0x0c78
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128 #define H_SPU_ADSRLevel8 0x0c88
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129 #define H_SPU_ADSRLevel9 0x0c98
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130 #define H_SPU_ADSRLevel10 0x0ca8
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131 #define H_SPU_ADSRLevel11 0x0cb8
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132 #define H_SPU_ADSRLevel12 0x0cc8
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133 #define H_SPU_ADSRLevel13 0x0cd8
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134 #define H_SPU_ADSRLevel14 0x0ce8
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135 #define H_SPU_ADSRLevel15 0x0cf8
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136 #define H_SPU_ADSRLevel16 0x0d08
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137 #define H_SPU_ADSRLevel17 0x0d18
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138 #define H_SPU_ADSRLevel18 0x0d28
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139 #define H_SPU_ADSRLevel19 0x0d38
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140 #define H_SPU_ADSRLevel20 0x0d48
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141 #define H_SPU_ADSRLevel21 0x0d58
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142 #define H_SPU_ADSRLevel22 0x0d68
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143 #define H_SPU_ADSRLevel23 0x0d78
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145 #define CTRL_IRQ 0x40
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146 #define CTRL_REVERB 0x80
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147 #define CTRL_NOISE 0x3f00
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148 #define CTRL_MUTE 0x4000
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149 #define CTRL_ON 0x8000
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151 #define STAT_IRQ 0x40
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153 ///////////////////////////////////////////////////////////
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155 void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val, unsigned int cycles);
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