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support emulated RAM mapped at offset
[pcsx_rearmed.git]
/
libpcsxcore
/
new_dynarec
/
assem_arm.c
diff --git
a/libpcsxcore/new_dynarec/assem_arm.c
b/libpcsxcore/new_dynarec/assem_arm.c
index
3950d22
..
a88b396
100644
(file)
--- a/
libpcsxcore/new_dynarec/assem_arm.c
+++ b/
libpcsxcore/new_dynarec/assem_arm.c
@@
-29,6
+29,10
@@
#include "pcnt.h"
#endif
#include "pcnt.h"
#endif
+#if !BASE_ADDR_FIXED
+char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
+#endif
+
extern int cycle_count;
extern int last_count;
extern int pcaddr;
extern int cycle_count;
extern int last_count;
extern int pcaddr;
@@
-3997,6
+4001,10
@@
static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
else
#endif
emit_jno(0);
else
#endif
emit_jno(0);
+ if(ram_offset!=0) {
+ emit_addimm(addr,ram_offset,HOST_TEMPREG);
+ addr=*addr_reg_override=HOST_TEMPREG;
+ }
}
return jaddr;
}
return jaddr;
@@
-4048,6
+4056,10
@@
void loadlr_assemble_arm(int i,struct regstat *i_regs)
jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
}
else {
jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
}
else {
+ if(ram_offset&&memtarget) {
+ emit_addimm(temp2,ram_offset,HOST_TEMPREG);
+ fastload_reg_override=HOST_TEMPREG;
+ }
if (opcode[i]==0x22||opcode[i]==0x26) {
emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
}else{
if (opcode[i]==0x22||opcode[i]==0x26) {
emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
}else{
@@
-5680,7
+5692,7
@@
void do_clear_cache()
for(j=0;j<32;j++)
{
if(bitmap&(1<<j)) {
for(j=0;j<32;j++)
{
if(bitmap&(1<<j)) {
- start=BASE_ADDR+i*131072+j*4096;
+ start=
(u_int)
BASE_ADDR+i*131072+j*4096;
end=start+4095;
j++;
while(j<32) {
end=start+4095;
j++;
while(j<32) {