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drc: merge Ari64's patch: 13_dummy_loads
[pcsx_rearmed.git]
/
libpcsxcore
/
new_dynarec
/
new_dynarec.c
diff --git
a/libpcsxcore/new_dynarec/new_dynarec.c
b/libpcsxcore/new_dynarec/new_dynarec.c
index
c51311f
..
9592dd2
100644
(file)
--- a/
libpcsxcore/new_dynarec/new_dynarec.c
+++ b/
libpcsxcore/new_dynarec/new_dynarec.c
@@
-1,6
+1,6
@@
/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* Mupen64plus - new_dynarec.c *
/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* Mupen64plus - new_dynarec.c *
- * Copyright (C) 2009-201
0
Ari64 *
+ * Copyright (C) 2009-201
1
Ari64 *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@
-599,6
+599,7
@@
void clear_const(struct regstat *cur,signed char reg)
int is_const(struct regstat *cur,signed char reg)
{
int hr;
int is_const(struct regstat *cur,signed char reg)
{
int hr;
+ if(reg<0) return 0;
if(!reg) return 1;
for (hr=0;hr<HOST_REGS;hr++) {
if((cur->regmap[hr]&63)==reg) {
if(!reg) return 1;
for (hr=0;hr<HOST_REGS;hr++) {
if((cur->regmap[hr]&63)==reg) {
@@
-719,12
+720,6
@@
int needed_again(int r, int i)
int j;
int b=-1;
int rn=10;
int j;
int b=-1;
int rn=10;
- int hr;
- u_char hsn[MAXREG+1];
- int preferred_reg;
-
- memset(hsn,10,sizeof(hsn));
- lsn(hsn,i,&preferred_reg);
if(i>0&&(itype[i-1]==UJUMP||itype[i-1]==RJUMP||(source[i-1]>>16)==0x1000))
{
if(i>0&&(itype[i-1]==UJUMP||itype[i-1]==RJUMP||(source[i-1]>>16)==0x1000))
{
@@
-777,11
+772,7
@@
int needed_again(int r, int i)
}
}
}*/
}
}
}*/
- for(hr=0;hr<HOST_REGS;hr++) {
- if(hr!=EXCLUDE_REG) {
- if(rn<hsn[hr]) return 1;
- }
- }
+ if(rn<10) return 1;
return 0;
}
return 0;
}
@@
-1602,13
+1593,9
@@
void load_alloc(struct regstat *current,int i)
//if(rs1[i]!=rt1[i]&&needed_again(rs1[i],i)) clear_const(current,rs1[i]); // Does this help or hurt?
if(!rs1[i]) current->u&=~1LL; // Allow allocating r0 if it's the source register
if(needed_again(rs1[i],i)) alloc_reg(current,i,rs1[i]);
//if(rs1[i]!=rt1[i]&&needed_again(rs1[i],i)) clear_const(current,rs1[i]); // Does this help or hurt?
if(!rs1[i]) current->u&=~1LL; // Allow allocating r0 if it's the source register
if(needed_again(rs1[i],i)) alloc_reg(current,i,rs1[i]);
- if(rt1[i]) {
+ if(rt1[i]
&&!((current->u>>rt1[i])&1)
) {
alloc_reg(current,i,rt1[i]);
alloc_reg(current,i,rt1[i]);
- if(get_reg(current->regmap,rt1[i])<0) {
- // dummy load, but we still need a register to calculate the address
- alloc_reg_temp(current,i,-1);
- minimum_free_regs[i]=1;
- }
+ assert(get_reg(current->regmap,rt1[i])>=0);
if(opcode[i]==0x27||opcode[i]==0x37) // LWU/LD
{
current->is32&=~(1LL<<rt1[i]);
if(opcode[i]==0x27||opcode[i]==0x37) // LWU/LD
{
current->is32&=~(1LL<<rt1[i]);
@@
-1636,12
+1623,14
@@
void load_alloc(struct regstat *current,int i)
}
else
{
}
else
{
- // Load to r0 (dummy load)
+ // Load to r0
or unneeded register
(dummy load)
// but we still need a register to calculate the address
if(opcode[i]==0x22||opcode[i]==0x26)
{
alloc_reg(current,i,FTEMP); // LWL/LWR need another temporary
}
// but we still need a register to calculate the address
if(opcode[i]==0x22||opcode[i]==0x26)
{
alloc_reg(current,i,FTEMP); // LWL/LWR need another temporary
}
+ // If using TLB, need a register for pointer to the mapping table
+ if(using_tlb) alloc_reg(current,i,TLREG);
alloc_reg_temp(current,i,-1);
minimum_free_regs[i]=1;
if(opcode[i]==0x1A||opcode[i]==0x1B) // LDL/LDR
alloc_reg_temp(current,i,-1);
minimum_free_regs[i]=1;
if(opcode[i]==0x1A||opcode[i]==0x1B) // LDL/LDR
@@
-3744,7
+3733,7
@@
void c2ls_assemble(int i,struct regstat *i_regs)
int ar;
int offset;
int memtarget=0,c=0;
int ar;
int offset;
int memtarget=0,c=0;
- int jaddr
,jaddr
2=0,jaddr3,type;
+ int jaddr2=0,jaddr3,type;
int agr=AGEN1+(i&1);
u_int hr,reglist=0;
u_int copr=(source[i]>>16)&0x1f;
int agr=AGEN1+(i&1);
u_int hr,reglist=0;
u_int copr=(source[i]>>16)&0x1f;
@@
-4114,7
+4103,7
@@
static void loop_preload(signed char pre[],signed char entry[])
void address_generation(int i,struct regstat *i_regs,signed char entry[])
{
if(itype[i]==LOAD||itype[i]==LOADLR||itype[i]==STORE||itype[i]==STORELR||itype[i]==C1LS||itype[i]==C2LS) {
void address_generation(int i,struct regstat *i_regs,signed char entry[])
{
if(itype[i]==LOAD||itype[i]==LOADLR||itype[i]==STORE||itype[i]==STORELR||itype[i]==C1LS||itype[i]==C2LS) {
- int ra;
+ int ra
=-1
;
int agr=AGEN1+(i&1);
int mgr=MGEN1+(i&1);
if(itype[i]==LOAD) {
int agr=AGEN1+(i&1);
int mgr=MGEN1+(i&1);
if(itype[i]==LOAD) {
@@
-4866,7
+4855,7
@@
void do_cc(int i,signed char i_regmap[],int *adj,int addr,int taken,int invert)
}
else
{
}
else
{
- emit_cmpimm(HOST_CCREG,-
2
*(count+2));
+ emit_cmpimm(HOST_CCREG,-
CLOCK_DIVIDER
*(count+2));
jaddr=(int)out;
emit_jns(0);
}
jaddr=(int)out;
emit_jns(0);
}
@@
-4932,7
+4921,7
@@
void do_ccstub(int n)
emit_loadreg(rs2[i],s2l);
#endif
int hr=0;
emit_loadreg(rs2[i],s2l);
#endif
int hr=0;
- int addr
,alt,ntaddr
;
+ int addr
=-1,alt=-1,ntaddr=-1
;
while(hr<HOST_REGS)
{
if(hr!=EXCLUDE_REG && hr!=HOST_CCREG &&
while(hr<HOST_REGS)
{
if(hr!=EXCLUDE_REG && hr!=HOST_CCREG &&
@@
-7772,10
+7761,9
@@
void disassemble_inst(int i)
void new_dynarec_clear_full()
{
int n;
void new_dynarec_clear_full()
{
int n;
- for(n=0x80000;n<0x80800;n++)
- invalid_code[n]=1;
- for(n=0;n<65536;n++)
- hash_table[n][0]=hash_table[n][2]=-1;
+ out=(u_char *)BASE_ADDR;
+ memset(invalid_code,1,sizeof(invalid_code));
+ memset(hash_table,0xff,sizeof(hash_table));
memset(mini_ht,-1,sizeof(mini_ht));
memset(restore_candidate,0,sizeof(restore_candidate));
memset(shadow,0,sizeof(shadow));
memset(mini_ht,-1,sizeof(mini_ht));
memset(restore_candidate,0,sizeof(restore_candidate));
memset(shadow,0,sizeof(shadow));
@@
-7900,7
+7888,7
@@
int new_recompile_block(int addr)
#ifdef PCSX
if(!sp_in_mirror&&(signed int)(psxRegs.GPR.n.sp&0xffe00000)>0x80200000&&
0x10000<=psxRegs.GPR.n.sp&&(psxRegs.GPR.n.sp&~0xe0e00000)<RAM_SIZE) {
#ifdef PCSX
if(!sp_in_mirror&&(signed int)(psxRegs.GPR.n.sp&0xffe00000)>0x80200000&&
0x10000<=psxRegs.GPR.n.sp&&(psxRegs.GPR.n.sp&~0xe0e00000)<RAM_SIZE) {
- printf("SP hack enabled (%08x), @%08x\n", psxRegs.GPR.n.sp);
+ printf("SP hack enabled (%08x), @%08x\n", psxRegs.GPR.n.sp
, psxRegs.pc
);
sp_in_mirror=1;
}
if (Config.HLE && start == 0x80001000) // hlecall
sp_in_mirror=1;
}
if (Config.HLE && start == 0x80001000) // hlecall
@@
-8625,7
+8613,7
@@
int new_recompile_block(int addr)
current.wasconst=0;
int ds=0;
int cc=0;
current.wasconst=0;
int ds=0;
int cc=0;
- int hr;
+ int hr
=-1
;
#ifndef FORCE32
provisional_32bit();
#ifndef FORCE32
provisional_32bit();
@@
-9642,8
+9630,8
@@
int new_recompile_block(int addr)
}
}
// Don't need stuff which is overwritten
}
}
// Don't need stuff which is overwritten
- if(regs[i].regmap[hr]!=regmap_pre[i][hr]) nr&=~(1<<hr);
- if(regs[i].regmap[hr]<0) nr&=~(1<<hr);
+
//
if(regs[i].regmap[hr]!=regmap_pre[i][hr]) nr&=~(1<<hr);
+
//
if(regs[i].regmap[hr]<0) nr&=~(1<<hr);
// Merge in delay slot
for(hr=0;hr<HOST_REGS;hr++)
{
// Merge in delay slot
for(hr=0;hr<HOST_REGS;hr++)
{
@@
-9762,7
+9750,10
@@
int new_recompile_block(int addr)
if(likely[i]) {
regs[i].regmap[hr]=-1;
regs[i].isconst&=~(1<<hr);
if(likely[i]) {
regs[i].regmap[hr]=-1;
regs[i].isconst&=~(1<<hr);
- if(i<slen-2) regmap_pre[i+2][hr]=-1;
+ if(i<slen-2) {
+ regmap_pre[i+2][hr]=-1;
+ regs[i+2].wasconst&=~(1<<hr);
+ }
}
}
}
}
}
}
@@
-9817,6
+9808,7
@@
int new_recompile_block(int addr)
{
if(!likely[i]&&i<slen-2) {
regmap_pre[i+2][hr]=-1;
{
if(!likely[i]&&i<slen-2) {
regmap_pre[i+2][hr]=-1;
+ regs[i+2].wasconst&=~(1<<hr);
}
}
}
}
}
}
@@
-9862,6
+9854,7
@@
int new_recompile_block(int addr)
}
regmap_pre[i+1][hr]=-1;
if(regs[i+1].regmap_entry[hr]==CCREG) regs[i+1].regmap_entry[hr]=-1;
}
regmap_pre[i+1][hr]=-1;
if(regs[i+1].regmap_entry[hr]==CCREG) regs[i+1].regmap_entry[hr]=-1;
+ regs[i+1].wasconst&=~(1<<hr);
}
regs[i].regmap[hr]=-1;
regs[i].isconst&=~(1<<hr);
}
regs[i].regmap[hr]=-1;
regs[i].isconst&=~(1<<hr);
@@
-10538,6
+10531,19
@@
int new_recompile_block(int addr)
}
//requires_32bit[i]=is32[i]&~unneeded_reg_upper[i]; // DEBUG
}
}
//requires_32bit[i]=is32[i]&~unneeded_reg_upper[i]; // DEBUG
}
+#else
+ for (i=slen-1;i>=0;i--)
+ {
+ if(itype[i]==CJUMP||itype[i]==SJUMP||itype[i]==FJUMP)
+ {
+ // Conditional branch
+ if((source[i]>>16)!=0x1000&&i<slen-2) {
+ // Mark this address as a branch target since it may be called
+ // upon return from interrupt
+ bt[i+2]=1;
+ }
+ }
+ }
#endif
if(itype[slen-1]==SPAN) {
#endif
if(itype[slen-1]==SPAN) {