static void io_write_sio16(u32 value)
{
- sioWrite8((unsigned char)value);
- sioWrite8((unsigned char)(value>>8));
+ sioWrite8(value);
}
static void io_write_sio32(u32 value)
{
- sioWrite8((unsigned char)value);
- sioWrite8((unsigned char)(value >> 8));
- sioWrite8((unsigned char)(value >> 16));
- sioWrite8((unsigned char)(value >> 24));
-}
-
-static u32 io_read_sio2_status()
-{
- return 0x80;
+ sioWrite8(value);
}
#if !defined(DRC_DBG) && defined(__arm__)
make_forcew32_func(10b0)
make_forcew32_func(10c0)
make_forcew32_func(10e0)
-make_forcew32_func(10f0)
void new_dyna_pcsx_mem_load_state(void)
{
map_item(&mem_iortab[IOMEM16(0x1048)], sioReadMode16, 1);
map_item(&mem_iortab[IOMEM16(0x104a)], sioReadCtrl16, 1);
map_item(&mem_iortab[IOMEM16(0x104e)], sioReadBaud16, 1);
- map_item(&mem_iortab[IOMEM16(0x1054)], io_read_sio2_status, 1);
+ map_item(&mem_iortab[IOMEM16(0x1054)], sio1ReadStat16, 1);
map_item(&mem_iortab[IOMEM16(0x1100)], psxRcntRcount0, 1);
map_item(&mem_iortab[IOMEM16(0x1104)], io_rcnt_read_mode0, 1);
map_item(&mem_iortab[IOMEM16(0x1108)], io_rcnt_read_target0, 1);
map_item(&mem_iowtab[IOMEM32(0x10cc)], psxHwWriteChcr4, 1);
map_item(&mem_iowtab[IOMEM32(0x10e8)], psxHwWriteChcr6, 1);
map_item(&mem_iowtab[IOMEM32(0x10ec)], psxHwWriteChcr6, 1);
+ map_item(&mem_iowtab[IOMEM32(0x10f0)], psxHwWriteDmaPcr32, 1);
map_item(&mem_iowtab[IOMEM32(0x10f4)], psxHwWriteDmaIcr32, 1);
map_item(&mem_iowtab[IOMEM32(0x1100)], io_rcnt_write_count0, 1);
map_item(&mem_iowtab[IOMEM32(0x1104)], io_rcnt_write_mode0, 1);
map_item(&mem_iowtab[IOMEM16(0x10e0)], io_write_force32_10e0, 1);
map_item(&mem_iowtab[IOMEM16(0x10e8)], psxHwWriteChcr6, 1);
map_item(&mem_iowtab[IOMEM16(0x10ec)], psxHwWriteChcr6, 1);
- map_item(&mem_iowtab[IOMEM16(0x10f0)], io_write_force32_10f0, 1);
+ map_item(&mem_iowtab[IOMEM16(0x10f0)], psxHwWriteDmaPcr32, 1);
map_item(&mem_iowtab[IOMEM16(0x10f4)], psxHwWriteDmaIcr32, 1);
map_item(&mem_iowtab[IOMEM16(0x1100)], io_rcnt_write_count0, 1);
map_item(&mem_iowtab[IOMEM16(0x1104)], io_rcnt_write_mode0, 1);
// plugins might change so update the pointers
map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1);
map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
- if (Config.hacks.gpu_busy)
- map_item(&mem_iortab[IOMEM32(0x1814)], psxHwReadGpuSRbusyHack, 1);
- else
- map_item(&mem_iortab[IOMEM32(0x1814)], psxHwReadGpuSR, 1);
}
void new_dyna_pcsx_mem_shutdown(void)