X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.h;h=acf65bd7bc0fc6bfaec4e3ac28c44d020c11dcb8;hb=d148d26560527efdd71685df8eac0497827ca766;hp=0148a9530f0ba9ae8084ab11f94749bcaa1bbafb;hpb=a327ad27099341fb6eed61aa0419dff418429f96;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 0148a953..acf65bd7 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -5,36 +5,10 @@
 
 #define HOST_IMM8 1
 #define HAVE_CMOV_IMM 1
-#define CORTEX_A8_BRANCH_PREDICTION_HACK 1
-#define USE_MINI_HT 1
-//#define REG_PREFETCH 1
 #define HAVE_CONDITIONAL_CALL 1
-#define DISABLE_TLB 1
-//#define MUPEN64
-#define FORCE32 1
-#define DISABLE_COP1 1
-#define PCSX 1
 #define RAM_SIZE 0x200000
 
-#ifndef __ARM_ARCH_7A__
-#define ARMv5_ONLY
-//#undef CORTEX_A8_BRANCH_PREDICTION_HACK
-//#undef USE_MINI_HT
-#endif
-
-#ifndef BASE_ADDR_FIXED
-#ifndef __ANDROID__
-#define BASE_ADDR_FIXED 1
-#else
-#define BASE_ADDR_FIXED 0
-#endif
-#endif
-
-#ifdef FORCE32
 #define REG_SHIFT 2
-#else
-#define REG_SHIFT 3
-#endif
 
 /* ARM calling convention:
    r0-r3, r12: caller-save
@@ -70,5 +44,5 @@ extern char *invc_ptr;
 #define BASE_ADDR 0x1000000
 #else
 extern char translation_cache[1 << TARGET_SIZE_2];
-#define BASE_ADDR translation_cache
+#define BASE_ADDR (u_int)translation_cache
 #endif