{
chan->chcr |= DMA_TE; // DMA has ended normally
- p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDoneT());
+ p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDone());
if (chan->chcr & DMA_IE)
dmac_te_irq(sh2, chan);
}
// DMA trigger by SH2 register write
static void dmac_trigger(SH2 *sh2, struct dma_chan *chan)
{
- elprintf(EL_32XP, "sh2 DMA %08x->%08x, cnt %d, chcr %04x @%06x",
+ elprintf_sh2(sh2, EL_32XP, "DMA %08x->%08x, cnt %d, chcr %04x @%06x",
chan->sar, chan->dar, chan->tcr, chan->chcr, sh2->pc);
chan->tcr &= 0xffffff;
// DREQ0 is only sent after first 4 words are written.
// we do multiple of 4 words to avoid messing up alignment
- if (chan->sar == 0x20004012) {
+ if ((chan->sar & ~0x20000000) == 0x00004012) {
if (Pico32x.dmac0_fifo_ptr && (Pico32x.dmac0_fifo_ptr & 3) == 0) {
elprintf(EL_32XP, "68k -> sh2 DMA");
p32x_dreq0_trigger();
return;
}
+ // DREQ1
+ if ((chan->dar & 0xc7fffff0) == 0x00004030)
+ return;
+
elprintf(EL_32XP|EL_ANOMALY, "unhandled DMA: "
"%08x->%08x, cnt %d, chcr %04x @%06x",
chan->sar, chan->dar, chan->tcr, chan->chcr, sh2->pc);
}
}
+ void sh2_peripheral_reset(SH2 *sh2)
+ {
+ memset(sh2->peri_regs, 0, sizeof(sh2->peri_regs)); // ?
+ PREG8(sh2->peri_regs, 0x001) = 0xff; // SCI BRR
+ PREG8(sh2->peri_regs, 0x003) = 0xff; // SCI TDR
+ PREG8(sh2->peri_regs, 0x004) = 0x84; // SCI SSR
+ PREG8(sh2->peri_regs, 0x011) = 0x01; // TIER
+ PREG8(sh2->peri_regs, 0x017) = 0xe0; // TOCR
+ }
+
// ------------------------------------------------------------------
// SH2 internal peripheral memhandlers
// we keep them in little endian format
a &= 0x1ff;
d = PREG8(r, a);
- elprintf(EL_32XP, "%csh2 peri r8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "peri r8 [%08x] %02x @%06x",
+ a | ~0x1ff, d, sh2_pc(sh2));
return d;
}
a &= 0x1ff;
d = r[(a / 2) ^ 1];
- elprintf(EL_32XP, "%csh2 peri r16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "peri r16 [%08x] %04x @%06x",
+ a | ~0x1ff, d, sh2_pc(sh2));
return d;
}
a &= 0x1fc;
d = sh2->peri_regs[a / 4];
- elprintf(EL_32XP, "%csh2 peri r32 [%08x] %08x @%06x",
- sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "peri r32 [%08x] %08x @%06x",
+ a | ~0x1ff, d, sh2_pc(sh2));
return d;
}
+ static void sci_trigger(SH2 *sh2, u8 *r)
+ {
+ u8 *oregs;
+
+ if (!(PREG8(r, 2) & 0x20))
+ return; // transmitter not enabled
+ if ((PREG8(r, 4) & 0x80)) // TDRE - TransmitDataR Empty
+ return;
+
+ oregs = (u8 *)sh2->other_sh2->peri_regs;
+ if (!(PREG8(oregs, 2) & 0x10))
+ return; // receiver not enabled
+
+ PREG8(oregs, 5) = PREG8(r, 3); // other.RDR = this.TDR
+ PREG8(r, 4) |= 0x80; // TDRE - TDR empty
+ PREG8(oregs, 4) |= 0x40; // RDRF - RDR Full
+
+ // might need to delay these a bit..
+ if (PREG8(r, 2) & 0x80) { // TIE - tx irq enabled
+ int level = PREG8(oregs, 0x60) >> 4;
+ int vector = PREG8(oregs, 0x64) & 0x7f;
+ elprintf_sh2(sh2, EL_32XP, "SCI tx irq (%d, %d)",
+ level, vector);
+ sh2_internal_irq(sh2, level, vector);
+ }
+ // TODO: TEIE
+ if (PREG8(oregs, 2) & 0x40) { // RIE - rx irq enabled
+ int level = PREG8(oregs, 0x60) >> 4;
+ int vector = PREG8(oregs, 0x63) & 0x7f;
+ elprintf_sh2(sh2->other_sh2, EL_32XP, "SCI rx irq (%d, %d)",
+ level, vector);
+ sh2_internal_irq(sh2->other_sh2, level, vector);
+ }
+ }
+
void REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, SH2 *sh2)
{
u8 *r = (void *)sh2->peri_regs;
- elprintf(EL_32XP, "%csh2 peri w8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ u8 old;
+
+ elprintf_sh2(sh2, EL_32XP, "peri w8 [%08x] %02x @%06x",
+ a, d, sh2_pc(sh2));
a &= 0x1ff;
- PREG8(r, a) = d;
+ old = PREG8(r, a);
- // X-men SCI hack
- if ((a == 2 && (d & 0x20)) || // transmiter enabled
- (a == 4 && !(d & 0x80))) { // valid data in TDR
- void *oregs = sh2->other_sh2->peri_regs;
- if ((PREG8(oregs, 2) & 0x50) == 0x50) { // receiver + irq enabled
- int level = PREG8(oregs, 0x60) >> 4;
- int vector = PREG8(oregs, 0x63) & 0x7f;
- elprintf(EL_32XP, "%csh2 SCI recv irq (%d, %d)",
- (sh2->is_slave ^ 1) ? 's' : 'm', level, vector);
- sh2_internal_irq(sh2->other_sh2, level, vector);
- return;
+ switch (a) {
+ case 0x002: // SCR - serial control
+ if (!(PREG8(r, a) & 0x20) && (d & 0x20)) { // TE being set
+ PREG8(r, a) = d;
+ sci_trigger(sh2, r);
}
+ break;
+ case 0x003: // TDR - transmit data
+ break;
+ case 0x004: // SSR - serial status
+ d = (old & (d | 0x06)) | (d & 1);
+ PREG8(r, a) = d;
+ sci_trigger(sh2, r);
+ return;
+ case 0x005: // RDR - receive data
+ break;
+ case 0x010: // TIER
+ if (d & 0x8e)
+ elprintf(EL_32XP|EL_ANOMALY, "TIER: %02x", d);
+ d = (d & 0x8e) | 1;
+ break;
+ case 0x017: // TOCR
+ d |= 0xe0;
+ break;
}
+ PREG8(r, a) = d;
}
void REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, SH2 *sh2)
{
u16 *r = (void *)sh2->peri_regs;
- elprintf(EL_32XP, "%csh2 peri w16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "peri w16 [%08x] %04x @%06x",
+ a, d, sh2_pc(sh2));
a &= 0x1ff;
r[(a / 2) ^ 1] = d;
}
-void sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2)
+void REGPARM(3) sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2)
{
u32 *r = sh2->peri_regs;
- elprintf(EL_32XP, "%csh2 peri w32 [%08x] %08x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ u32 old;
+
+ elprintf_sh2(sh2, EL_32XP, "peri w32 [%08x] %08x @%06x",
+ a, d, sh2_pc(sh2));
a &= 0x1fc;
+ old = r[a / 4];
r[a / 4] = d;
switch (a) {
// division unit (TODO: verify):
case 0x104: // DVDNT: divident L, starts divide
- elprintf(EL_32XP, "%csh2 divide %08x / %08x",
- sh2->is_slave ? 's' : 'm', d, r[0x100 / 4]);
+ elprintf_sh2(sh2, EL_32XP, "divide %08x / %08x",
+ d, r[0x100 / 4]);
if (r[0x100 / 4]) {
signed int divisor = r[0x100 / 4];
r[0x118 / 4] = r[0x110 / 4] = (signed int)d % divisor;
r[0x110 / 4] = r[0x114 / 4] = r[0x118 / 4] = r[0x11c / 4] = 0; // ?
break;
case 0x114:
- elprintf(EL_32XP, "%csh2 divide %08x%08x / %08x @%08x",
- sh2->is_slave ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "divide %08x%08x / %08x @%08x",
+ r[0x110 / 4], d, r[0x100 / 4], sh2_pc(sh2));
if (r[0x100 / 4]) {
signed long long divident = (signed long long)r[0x110 / 4] << 32 | d;
signed int divisor = r[0x100 / 4];
r[0x11c / 4] = r[0x114 / 4] = divident;
divident >>= 31;
if ((unsigned long long)divident + 1 > 1) {
- //elprintf(EL_32XP, "%csh2 divide overflow! @%08x",
- // sh2->is_slave ? 's' : 'm', sh2_pc(sh2));
+ //elprintf_sh2(sh2, EL_32XP, "divide overflow! @%08x", sh2_pc(sh2));
r[0x11c / 4] = r[0x114 / 4] = divident > 0 ? 0x7fffffff : 0x80000000; // overflow
}
}
// perhaps starting a DMA?
if (a == 0x1b0 || a == 0x18c || a == 0x19c) {
struct dmac *dmac = (void *)&sh2->peri_regs[0x180 / 4];
+ if (a == 0x1b0 && !((old ^ d) & d & DMA_DME))
+ return;
if (!(dmac->dmaor & DMA_DME))
return;
/* 32X specific */
static void dreq0_do(SH2 *sh2, struct dma_chan *chan)
{
- unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
+ unsigned short dreqlen = Pico32x.regs[0x10 / 2];
int i;
// debug/sanity checks
- if (chan->tcr != *dreqlen)
- elprintf(EL_32XP|EL_ANOMALY, "dreq0: tcr0 and len differ: %d != %d",
- chan->tcr, *dreqlen);
+ if (chan->tcr < dreqlen || chan->tcr > dreqlen + 4)
+ elprintf(EL_32XP|EL_ANOMALY, "dreq0: tcr0/len inconsistent: %d/%d",
+ chan->tcr, dreqlen);
// note: DACK is not connected, single addr mode should not be used
if ((chan->chcr & 0x3f08) != 0x0400)
elprintf(EL_32XP|EL_ANOMALY, "dreq0: bad control: %04x", chan->chcr);
- if (chan->sar != 0x20004012)
- elprintf(EL_32XP|EL_ANOMALY, "dreq0: bad sar?: %08x\n", chan->sar);
+ if ((chan->sar & ~0x20000000) != 0x00004012)
+ elprintf(EL_32XP|EL_ANOMALY, "dreq0: bad sar?: %08x", chan->sar);
// HACK: assume bus is busy and SH2 is halted
sh2->state |= SH2_STATE_SLEEP;
for (i = 0; i < Pico32x.dmac0_fifo_ptr && chan->tcr > 0; i++) {
- elprintf(EL_32XP, "dmaw [%08x] %04x, left %d",
- chan->dar, Pico32x.dmac_fifo[i], *dreqlen);
+ elprintf_sh2(sh2, EL_32XP, "dreq0 [%08x] %04x, dreq_len %d",
+ chan->dar, Pico32x.dmac_fifo[i], dreqlen);
p32x_sh2_write16(chan->dar, Pico32x.dmac_fifo[i], sh2);
chan->dar += 2;
chan->tcr--;
- (*dreqlen)--;
}
if (Pico32x.dmac0_fifo_ptr != i)
Pico32x.dmac0_fifo_ptr -= i;
Pico32x.regs[6 / 2] &= ~P32XS_FULL;
- if (*dreqlen == 0)
- Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
if (chan->tcr == 0)
dmac_transfer_complete(sh2, chan);
else
hit = 1;
}
- if (!hit)
- elprintf(EL_32XP|EL_ANOMALY, "dreq1: nobody cared");
+ // debug
+ #if (EL_LOGMASK & (EL_32XP|EL_ANOMALY))
+ {
+ static int miss_count;
+ if (!hit) {
+ if (++miss_count == 4)
+ elprintf(EL_32XP|EL_ANOMALY, "dreq1: nobody cared");
+ }
+ else
+ miss_count = 0;
+ }
+ #endif
+ (void)hit;
}
// vim:shiftwidth=2:ts=2:expandtab
#ifdef EMU_C68K\r
#include "../cpu/cyclone/Cyclone.h"\r
extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;\r
- #define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run\r
- #define SekCyclesLeft \\r
- (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
- #define SekCyclesLeftS68k \\r
- ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)\r
- #define SekEndTimeslice(after) PicoCpuCM68k.cycles=after\r
- #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after\r
+ #define SekCyclesLeft PicoCpuCM68k.cycles // cycles left for this run\r
+ #define SekCyclesLeftS68k PicoCpuCS68k.cycles\r
#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)\r
#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)\r
- #define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])\r
+ #define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])\r
+ #define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8])\r
#define SekSr CycloneGetSr(&PicoCpuCM68k)\r
+ #define SekSrS68k CycloneGetSr(&PicoCpuCS68k)\r
#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
#define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)\r
#define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)\r
- #define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
+ #define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
\r
#define SekInterrupt(i) PicoCpuCM68k.irq=i\r
#define SekIrqLevel PicoCpuCM68k.irq\r
\r
- #ifdef EMU_M68K\r
- #define EMU_CORE_DEBUG\r
- #endif\r
#endif\r
\r
#ifdef EMU_F68K\r
#include "../cpu/fame/fame.h"\r
extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;\r
- #define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter\r
- #define SekCyclesLeft \\r
- (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
- #define SekCyclesLeftS68k \\r
- ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)\r
- #define SekEndTimeslice(after) PicoCpuFM68k.io_cycle_counter=after\r
- #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after\r
+ #define SekCyclesLeft PicoCpuFM68k.io_cycle_counter\r
+ #define SekCyclesLeftS68k PicoCpuFS68k.io_cycle_counter\r
#define SekPc fm68k_get_pc(&PicoCpuFM68k)\r
#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)\r
- #define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)\r
+ #define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)\r
+ #define SekDarS68k(x) (x < 8 ? PicoCpuFS68k.dreg[x].D : PicoCpuFS68k.areg[x - 8].D)\r
#define SekSr PicoCpuFM68k.sr\r
+ #define SekSrS68k PicoCpuFS68k.sr\r
#define SekSetStop(x) { \\r
PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \\r
if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
}\r
#define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED)\r
#define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)\r
- #define SekShouldInterrupt fm68k_would_interrupt()\r
+ #define SekShouldInterrupt() fm68k_would_interrupt()\r
\r
#define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq\r
#define SekIrqLevel PicoCpuFM68k.interrupts[0]\r
\r
- #ifdef EMU_M68K\r
- #define EMU_CORE_DEBUG\r
- #endif\r
#endif\r
\r
#ifdef EMU_M68K\r
#include "../cpu/musashi/m68kcpu.h"\r
extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;\r
#ifndef SekCyclesLeft\r
- #define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles\r
- #define SekCyclesLeft \\r
- (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
- #define SekCyclesLeftS68k \\r
- ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)\r
- #define SekEndTimeslice(after) SET_CYCLES(after)\r
- #define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after\r
+ #define SekCyclesLeft PicoCpuMM68k.cyc_remaining_cycles\r
+ #define SekCyclesLeftS68k PicoCpuMS68k.cyc_remaining_cycles\r
#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)\r
#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)\r
- #define SekDar(x) PicoCpuMM68k.dar[x]\r
- #define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)\r
+ #define SekDar(x) PicoCpuMM68k.dar[x]\r
+ #define SekDarS68k(x) PicoCpuMS68k.dar[x]\r
+ #define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)\r
+ #define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR)\r
#define SekSetStop(x) { \\r
if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \\r
else PicoCpuMM68k.stopped=0; \\r
}\r
#define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP)\r
#define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)\r
- #define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)\r
+ #define SekShouldInterrupt() (CPU_INT_LEVEL > FLAG_INT_MASK)\r
\r
#define SekInterrupt(irq) { \\r
void *oldcontext = m68ki_cpu_p; \\r
#endif\r
#endif // EMU_M68K\r
\r
- extern int SekCycleCnt; // cycles done in this frame\r
- extern int SekCycleAim; // cycle aim\r
- extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
- \r
- #define SekCyclesReset() { \\r
- SekCycleCntT+=SekCycleAim; \\r
- SekCycleCnt-=SekCycleAim; \\r
- SekCycleAim=0; \\r
+ // while running, cnt represents target of current timeslice\r
+ // while not in SekRun(), it's actual cycles done\r
+ // (but always use SekCyclesDone() if you need current position)\r
+ // cnt may change if timeslice is ended prematurely or extended,\r
+ // so we use SekCycleAim for the actual target\r
+ extern unsigned int SekCycleCnt;\r
+ extern unsigned int SekCycleAim;\r
+ \r
+ // number of cycles done (can be checked anywhere)\r
+ #define SekCyclesDone() (SekCycleCnt - SekCyclesLeft)\r
+ \r
+ // burn cycles while not in SekRun() and while in\r
+ #define SekCyclesBurn(c) SekCycleCnt += c\r
+ #define SekCyclesBurnRun(c) { \\r
+ SekCyclesLeft -= c; \\r
+ if (SekCyclesLeft < 0) \\r
+ SekCyclesLeft = 0; \\r
}\r
- #define SekCyclesBurn(c) SekCycleCnt+=c\r
- #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere)\r
- #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
- #define SekCyclesDoneT2() (SekCycleCntT + SekCycleCnt) // same as above but not from memhandlers\r
\r
+ // note: sometimes may extend timeslice to delay an irq\r
#define SekEndRun(after) { \\r
- SekCycleCnt -= SekCyclesLeft - (after); \\r
- if (SekCycleCnt < 0) SekCycleCnt = 0; \\r
- SekEndTimeslice(after); \\r
+ SekCycleCnt -= SekCyclesLeft - (after); \\r
+ SekCyclesLeft = after; \\r
}\r
\r
+ extern unsigned int SekCycleCntS68k;\r
+ extern unsigned int SekCycleAimS68k;\r
+ \r
#define SekEndRunS68k(after) { \\r
- SekCycleCntS68k -= SekCyclesLeftS68k - (after); \\r
- if (SekCycleCntS68k < 0) SekCycleCntS68k = 0; \\r
- SekEndTimesliceS68k(after); \\r
+ if (SekCyclesLeftS68k > (after)) { \\r
+ SekCycleCntS68k -= SekCyclesLeftS68k - (after); \\r
+ SekCyclesLeftS68k = after; \\r
+ } \\r
}\r
\r
- extern int SekCycleCntS68k;\r
- extern int SekCycleAimS68k;\r
+ #define SekCyclesDoneS68k() (SekCycleCntS68k - SekCyclesLeftS68k)\r
\r
- #define SekCyclesResetS68k() { \\r
- SekCycleCntS68k-=SekCycleAimS68k; \\r
- SekCycleAimS68k=0; \\r
- }\r
- #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r
- \r
- #ifdef EMU_CORE_DEBUG\r
- extern int dbg_irq_level;\r
- #undef SekEndTimeslice\r
- #undef SekCyclesBurn\r
- #undef SekEndRun\r
- #undef SekInterrupt\r
- #define SekEndTimeslice(c)\r
- #define SekCyclesBurn(c) c\r
- #define SekEndRun(c)\r
- #define SekInterrupt(irq) dbg_irq_level=irq\r
- #endif\r
+ // compare cycles, handling overflows\r
+ // check if a > b\r
+ #define CYCLES_GT(a, b) \\r
+ ((int)((a) - (b)) > 0)\r
+ // check if a >= b\r
+ #define CYCLES_GE(a, b) \\r
+ ((int)((a) - (b)) >= 0)\r
\r
// ----------------------- Z80 CPU -----------------------\r
\r
#define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))\r
#define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)\r
#define z80_int() drZ80.Z80_IRQ = 1\r
+ #define z80_int() drZ80.Z80_IRQ = 1\r
+ #define z80_nmi() drZ80.Z80IF |= 8\r
\r
#define z80_cyclesLeft drZ80.cycles\r
#define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE)\r
#define z80_run(cycles) Cz80_Exec(&CZ80, cycles)\r
#define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)\r
#define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)\r
+ #define z80_nmi() Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, 0)\r
\r
#define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)\r
#define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC)\r
#define z80_run(cycles) (cycles)\r
#define z80_run_nr(cycles)\r
#define z80_int()\r
+ #define z80_nmi()\r
\r
#endif\r
\r
#define Z80_STATE_SIZE 0x60\r
\r
- extern int z80stopCycle; /* in 68k cycles */\r
+ extern unsigned int last_z80_sync;\r
extern int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
extern int z80_cycle_aim;\r
extern int z80_scanline;\r
extern int z80_scanline_cycles; /* cycles done until z80_scanline */\r
\r
#define z80_resetCycles() \\r
+ last_z80_sync = SekCyclesDone(); \\r
z80_cycle_cnt = z80_cycle_aim = z80_scanline = z80_scanline_cycles = 0;\r
\r
#define z80_cyclesDone() \\r
} \\r
} while (0)\r
# define sh2_cycles_left(sh2) (sh2)->icount\r
+ # define sh2_burn_cycles(sh2, n) (sh2)->icount -= n\r
# define sh2_pc(sh2) (sh2)->ppc\r
#else\r
# define sh2_end_run(sh2, after_) do { \\r
} \\r
} while (0)\r
# define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)\r
+ # define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12)\r
# define sh2_pc(sh2) (sh2)->pc\r
#endif\r
\r
#define sh2_set_vbr(c, v) \\r
{ if (c) ssh2.vbr = v; else msh2.vbr = v; }\r
\r
+ #define elprintf_sh2(sh2, w, f, ...) \\r
+ elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__)\r
+ \r
// ---------------------------------------------------------\r
\r
// main oscillator clock which controls timing\r
{\r
unsigned char carthw[0x10];\r
unsigned char io_ctl;\r
- unsigned char pad[0x4f];\r
+ unsigned char nmi_state;\r
+ unsigned char pad[0x4e];\r
};\r
\r
// some assembly stuff depend on these, do not touch!\r
unsigned short vsram[0x40]; // 0x22180\r
\r
unsigned char *rom; // 0x22200\r
- unsigned int romsize; // 0x22204\r
+ unsigned int romsize; // 0x22204 (on 32bits)\r
\r
struct PicoMisc m;\r
struct PicoVideo video;\r
} ch[8];\r
};\r
\r
+ #define PCD_ST_S68K_RST 1\r
+ \r
struct mcd_misc\r
{\r
unsigned short hint_vector;\r
- unsigned char busreq;\r
+ unsigned char busreq; // not s68k_regs[1]\r
unsigned char s68k_pend_ints;\r
- unsigned int state_flags; // 04: emu state: reset_pending\r
- unsigned int counter75hz;\r
- unsigned int pad0;\r
- int timer_int3; // 10\r
- unsigned int timer_stopwatch;\r
+ unsigned int state_flags; // 04\r
+ unsigned int stopwatch_base_c;\r
+ unsigned short m68k_poll_a;\r
+ unsigned short m68k_poll_cnt;\r
+ unsigned short s68k_poll_a;\r
+ unsigned short s68k_poll_cnt;\r
+ unsigned int s68k_poll_clk;\r
unsigned char bcram_reg; // 18: battery-backed RAM cart register\r
- unsigned char pad2;\r
+ unsigned char dmna_ret_2m;\r
unsigned short pad3;\r
- int pad[9];\r
+ int pad4[9];\r
};\r
\r
typedef struct\r
unsigned char pcm_ram[0x10000];\r
unsigned char pcm_ram_b[0x10][0x1000];\r
};\r
+ // FIXME: should be short\r
unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs\r
unsigned char bram[0x2000]; // 110200: 8K\r
struct mcd_misc m; // 112200: misc\r
#define P32XP_FULL (1<<15) // PWM pulse\r
#define P32XP_EMPTY (1<<14)\r
\r
- #define P32XF_68KCPOLL (1 << 0)\r
- #define P32XF_68KVPOLL (1 << 1)\r
+ #define P32XF_68KCPOLL (1 << 0)\r
+ #define P32XF_68KVPOLL (1 << 1)\r
+ #define P32XF_Z80_32X_IO (1 << 7) // z80 does 32x io\r
\r
#define P32XI_VRES (1 << 14/2) // IRL/2\r
#define P32XI_VINT (1 << 12/2)\r
// peripheral reg access\r
#define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3]\r
\r
- // real one is 4*2, but we use more because we don't lockstep\r
- #define DMAC_FIFO_LEN (4*4)\r
+ #define DMAC_FIFO_LEN (4*2)\r
#define PWM_BUFF_LEN 1024 // in one channel samples\r
\r
#define SH2_DRCBLK_RAM_SHIFT 1\r
unsigned char sh2irqi[2]; // individual\r
unsigned int sh2irqs; // common irqs\r
unsigned short dmac_fifo[DMAC_FIFO_LEN];\r
+ unsigned int pad[4];\r
unsigned int dmac0_fifo_ptr;\r
- unsigned int pad;\r
+ unsigned short vdp_fbcr_fake;\r
+ unsigned short pad2;\r
unsigned char comm_dirty_68k;\r
unsigned char comm_dirty_sh2;\r
unsigned char pwm_irq_cnt;\r
#ifdef DRC_SH2\r
unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];\r
#endif\r
- unsigned char sh2_rom_m[0x800];\r
- unsigned char sh2_rom_s[0x400];\r
+ union {\r
+ unsigned char b[0x800];\r
+ unsigned short w[0x800/2];\r
+ } sh2_rom_m;\r
+ union {\r
+ unsigned char b[0x400];\r
+ unsigned short w[0x400/2];\r
+ } sh2_rom_s;\r
unsigned short pal[0x100];\r
unsigned short pal_native[0x100]; // converted to native (for renderer)\r
signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame\r
- signed short pwm_fifo[2][4]; // [0] - current, others - fifo entries\r
+ signed short pwm_current[2]; // current converted samples\r
+ unsigned short pwm_fifo[2][4]; // [0] - current raw, others - fifo entries\r
};\r
\r
// area.c\r
unsigned int PicoRead16_io(unsigned int a);\r
void PicoWrite8_io(unsigned int a, unsigned int d);\r
void PicoWrite16_io(unsigned int a, unsigned int d);\r
- void p32x_dreq1_trigger(void);\r
\r
// pico/memory.c\r
PICO_INTERNAL void PicoMemSetupPico(void);\r
\r
// cd/memory.c\r
PICO_INTERNAL void PicoMemSetupCD(void);\r
- void PicoMemStateLoaded(void);\r
+ void pcd_state_loaded_mem(void);\r
\r
// pico.c\r
extern struct Pico Pico;\r
extern void (*PicoLineHook)(void);\r
PICO_INTERNAL int CheckDMA(void);\r
PICO_INTERNAL void PicoDetectRegion(void);\r
- PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done);\r
+ PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done);\r
+ \r
+ // cd/mcd.c\r
+ #define PCDS_IEN1 (1<<1)\r
+ #define PCDS_IEN2 (1<<2)\r
+ #define PCDS_IEN3 (1<<3)\r
+ #define PCDS_IEN4 (1<<4)\r
+ #define PCDS_IEN5 (1<<5)\r
+ #define PCDS_IEN6 (1<<6)\r
\r
- // cd/pico.c\r
PICO_INTERNAL void PicoInitMCD(void);\r
PICO_INTERNAL void PicoExitMCD(void);\r
PICO_INTERNAL void PicoPowerMCD(void);\r
PICO_INTERNAL int PicoResetMCD(void);\r
PICO_INTERNAL void PicoFrameMCD(void);\r
\r
+ enum pcd_event {\r
+ PCD_EVENT_CDC,\r
+ PCD_EVENT_TIMER3,\r
+ PCD_EVENT_GFX,\r
+ PCD_EVENT_DMA,\r
+ PCD_EVENT_COUNT,\r
+ };\r
+ extern unsigned int pcd_event_times[PCD_EVENT_COUNT];\r
+ void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);\r
+ void pcd_event_schedule_s68k(enum pcd_event event, int after);\r
+ unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);\r
+ int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);\r
+ void pcd_state_loaded(void);\r
+ \r
// pico/pico.c\r
PICO_INTERNAL void PicoInitPico(void);\r
PICO_INTERNAL void PicoReratePico(void);\r
void SekStepM68k(void);\r
void SekInitIdleDet(void);\r
void SekFinishIdleDet(void);\r
+ #if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
+ void SekTrace(int is_s68k);\r
+ #else\r
+ #define SekTrace(x)\r
+ #endif\r
\r
// cd/sek.c\r
PICO_INTERNAL void SekInitS68k(void);\r
enum p32x_event {\r
P32X_EVENT_PWM,\r
P32X_EVENT_FILLEND,\r
+ P32X_EVENT_HINT,\r
P32X_EVENT_COUNT,\r
};\r
- extern unsigned int event_times[P32X_EVENT_COUNT];\r
+ extern unsigned int p32x_event_times[P32X_EVENT_COUNT];\r
\r
void Pico32xInit(void);\r
void PicoPower32x(void);\r
void p32x_sync_sh2s(unsigned int m68k_target);\r
void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);\r
void p32x_update_irls(SH2 *active_sh2, int m68k_cycles);\r
+ void p32x_trigger_irq(SH2 *sh2, int m68k_cycles, unsigned int mask);\r
+ void p32x_update_cmd_irq(SH2 *sh2, int m68k_cycles);\r
void p32x_reset_sh2s(void);\r
void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);\r
void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);\r
+ void p32x_schedule_hint(SH2 *sh2, int m68k_cycles);\r
\r
// 32x/memory.c\r
struct Pico32xMem *Pico32xMem;\r
void p32x_pwm_ctl_changed(void);\r
void p32x_pwm_schedule(unsigned int m68k_now);\r
void p32x_pwm_schedule_sh2(SH2 *sh2);\r
+ void p32x_pwm_sync_to_sh2(SH2 *sh2);\r
void p32x_pwm_irq_event(unsigned int m68k_now);\r
void p32x_pwm_state_loaded(void);\r
\r
void p32x_dreq1_trigger(void);\r
void p32x_timers_recalc(void);\r
void p32x_timers_do(unsigned int m68k_slice);\r
+ void sh2_peripheral_reset(SH2 *sh2);\r
unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);\r
unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);\r
unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);\r
-void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);\r
-void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
-void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);\r
\r
#else\r
#define Pico32xInit()\r
#define EL_32X 0x00080000\r
#define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */\r
#define EL_32XP 0x00200000 /* 32X peripherals */\r
+ #define EL_CD 0x00400000 /* MCD */\r
\r
#define EL_STATUS 0x40000000 /* status messages */\r
#define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */\r
void pevt_dump(void);\r
\r
#define pevt_log_m68k(e) \\r
- pevt_log(SekCyclesDoneT(), EVT_M68K, e)\r
+ pevt_log(SekCyclesDone(), EVT_M68K, e)\r
#define pevt_log_m68k_o(e) \\r
- pevt_log(SekCyclesDoneT2(), EVT_M68K, e)\r
+ pevt_log(SekCyclesDone(), EVT_M68K, e)\r
#define pevt_log_sh2(sh2, e) \\r
pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e)\r
#define pevt_log_sh2_o(sh2, e) \\r
#define cdprintf(x...)\r
#endif\r
\r
-#ifdef __i386__\r
+#if defined(__GNUC__) && defined(__i386__)\r
#define REGPARM(x) __attribute__((regparm(x)))\r
#else\r
#define REGPARM(x)\r
if (ret <= 0) {
// try to read somewhere around the middle
fseek(f, len / 2, SEEK_SET);
- fread(buf, 1, sizeof(buf), f);
- ret = try_get_bitrate(buf, sizeof(buf));
+ ret = fread(buf, 1, sizeof(buf), f);
+ if (ret == sizeof(buf))
+ ret = try_get_bitrate(buf, sizeof(buf));
}
if (ret > 0)
retval = ret;
return retval;
}
- void mp3_start_play(void *f_, int pos)
+ void mp3_start_play(void *f_, int pos1024)
{
unsigned char buf[2048];
FILE *f = f_;
if (!(PicoOpt & POPT_EN_MCD_CDDA) || f == NULL) // cdda disabled or no file?
return;
- ret = mp3dec_start();
- if (ret != 0)
- return;
-
- decoder_active = 1;
-
- mp3_current_file = f;
fseek(f, 0, SEEK_END);
mp3_file_len = ftell(f);
}
// seek..
- if (pos) {
+ if (pos1024 != 0) {
unsigned long long pos64 = mp3_file_len - mp3_file_pos;
- pos64 *= pos;
+ pos64 *= pos1024;
mp3_file_pos += pos64 >> 10;
}
+ ret = mp3dec_start(f, mp3_file_pos);
+ if (ret != 0) {
+ return;
+ }
+
+ mp3_current_file = f;
+ decoder_active = 1;
+
mp3dec_decode(mp3_current_file, &mp3_file_pos, mp3_file_len);
}
} else {
int ret, left = 1152 - cdda_out_pos;
- mix_samples(buffer, cdda_out_buffer + cdda_out_pos * 2,
- (left >> shr) * 2);
+ if (left > 0)
+ mix_samples(buffer, cdda_out_buffer + cdda_out_pos * 2,
+ (left >> shr) * 2);
ret = mp3dec_decode(mp3_current_file, &mp3_file_pos,
mp3_file_len);
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
+#ifndef _WIN32
#include <sys/mman.h>
+#else
+#include <io.h>
+#include <windows.h>
+#include <sys/types.h>
+#endif
#include <errno.h>
#ifdef __MACH__
#include <libkern/OSCacheControl.h>
#include "common/version.h"
#include "libretro.h"
-#ifndef MAP_ANONYMOUS
-#define MAP_ANONYMOUS MAP_ANON
-#endif
-
static retro_video_refresh_t video_cb;
static retro_input_poll_t input_poll_cb;
static retro_input_state_t input_state_cb;
#endif
}
-void *plat_mmap(unsigned long addr, size_t size, int need_exec, int is_fixed)
+#ifdef _WIN32
+/* mmap() replacement for Windows
+ *
+ * Author: Mike Frysinger <vapier@gentoo.org>
+ * Placed into the public domain
+ */
+
+/* References:
+ * CreateFileMapping: http://msdn.microsoft.com/en-us/library/aa366537(VS.85).aspx
+ * CloseHandle: http://msdn.microsoft.com/en-us/library/ms724211(VS.85).aspx
+ * MapViewOfFile: http://msdn.microsoft.com/en-us/library/aa366761(VS.85).aspx
+ * UnmapViewOfFile: http://msdn.microsoft.com/en-us/library/aa366882(VS.85).aspx
+ */
+
+#define PROT_READ 0x1
+#define PROT_WRITE 0x2
+/* This flag is only available in WinXP+ */
+#ifdef FILE_MAP_EXECUTE
+#define PROT_EXEC 0x4
+#else
+#define PROT_EXEC 0x0
+#define FILE_MAP_EXECUTE 0
+#endif
+
+#define MAP_SHARED 0x01
+#define MAP_PRIVATE 0x02
+#define MAP_ANONYMOUS 0x20
+#define MAP_ANON MAP_ANONYMOUS
+#define MAP_FAILED ((void *) -1)
+
+#ifdef __USE_FILE_OFFSET64
+# define DWORD_HI(x) (x >> 32)
+# define DWORD_LO(x) ((x) & 0xffffffff)
+#else
+# define DWORD_HI(x) (0)
+# define DWORD_LO(x) (x)
+#endif
+
+static void *mmap(void *start, size_t length, int prot, int flags, int fd, off_t offset)
{
- int flags = MAP_PRIVATE | MAP_ANONYMOUS;
- void *req, *ret;
+ if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC))
+ return MAP_FAILED;
+ if (fd == -1) {
+ if (!(flags & MAP_ANON) || offset)
+ return MAP_FAILED;
+ } else if (flags & MAP_ANON)
+ return MAP_FAILED;
- req = (void *)addr;
- ret = mmap(req, size, PROT_READ | PROT_WRITE, flags, -1, 0);
- if (ret == MAP_FAILED) {
- lprintf("mmap(%08lx, %zd) failed: %d\n", addr, size, errno);
- return NULL;
- }
+ DWORD flProtect;
+ if (prot & PROT_WRITE) {
+ if (prot & PROT_EXEC)
+ flProtect = PAGE_EXECUTE_READWRITE;
+ else
+ flProtect = PAGE_READWRITE;
+ } else if (prot & PROT_EXEC) {
+ if (prot & PROT_READ)
+ flProtect = PAGE_EXECUTE_READ;
+ else if (prot & PROT_EXEC)
+ flProtect = PAGE_EXECUTE;
+ } else
+ flProtect = PAGE_READONLY;
- if (addr != 0 && ret != (void *)addr) {
- lprintf("warning: wanted to map @%08lx, got %p\n",
- addr, ret);
+ off_t end = length + offset;
+ HANDLE mmap_fd, h;
+ if (fd == -1)
+ mmap_fd = INVALID_HANDLE_VALUE;
+ else
+ mmap_fd = (HANDLE)_get_osfhandle(fd);
+ h = CreateFileMapping(mmap_fd, NULL, flProtect, DWORD_HI(end), DWORD_LO(end), NULL);
+ if (h == NULL)
+ return MAP_FAILED;
- if (is_fixed) {
- munmap(ret, size);
- return NULL;
- }
+ DWORD dwDesiredAccess;
+ if (prot & PROT_WRITE)
+ dwDesiredAccess = FILE_MAP_WRITE;
+ else
+ dwDesiredAccess = FILE_MAP_READ;
+ if (prot & PROT_EXEC)
+ dwDesiredAccess |= FILE_MAP_EXECUTE;
+ if (flags & MAP_PRIVATE)
+ dwDesiredAccess |= FILE_MAP_COPY;
+ void *ret = MapViewOfFile(h, dwDesiredAccess, DWORD_HI(offset), DWORD_LO(offset), length);
+ if (ret == NULL) {
+ CloseHandle(h);
+ ret = MAP_FAILED;
}
+ return ret;
+}
+
+static void munmap(void *addr, size_t length)
+{
+ UnmapViewOfFile(addr);
+ /* ruh-ro, we leaked handle from CreateFileMapping() ... */
+}
+#endif
+
+#ifndef MAP_ANONYMOUS
+#define MAP_ANONYMOUS MAP_ANON
+#endif
+
+void *plat_mmap(unsigned long addr, size_t size, int need_exec, int is_fixed)
+{
+ int flags = MAP_PRIVATE | MAP_ANONYMOUS;
+ void *req, *ret;
+
+ req = (void *)addr;
+ ret = mmap(req, size, PROT_READ | PROT_WRITE, flags, -1, 0);
+ if (ret == MAP_FAILED) {
+ lprintf("mmap(%08lx, %zd) failed: %d\n", addr, size, errno);
+ return NULL;
+ }
+
+ if (addr != 0 && ret != (void *)addr) {
+ lprintf("warning: wanted to map @%08lx, got %p\n",
+ addr, ret);
+
+ if (is_fixed) {
+ munmap(ret, size);
+ return NULL;
+ }
+ }
return ret;
}
int plat_mem_set_exec(void *ptr, size_t size)
{
- int ret = mprotect(ptr, size, PROT_READ | PROT_WRITE | PROT_EXEC);
- if (ret != 0)
- lprintf("mprotect(%p, %zd) failed: %d\n", ptr, size, errno);
-
+#ifdef _WIN32
+ int ret = VirtualProtect(ptr,size,PAGE_EXECUTE_READWRITE,0);
+ if (ret == 0)
+ lprintf("mprotect(%p, %zd) failed: %d\n", ptr, size, 0);
+#else
+ int ret = mprotect(ptr, size, PROT_READ | PROT_WRITE | PROT_EXEC);
+ if (ret != 0)
+ lprintf("mprotect(%p, %zd) failed: %d\n", ptr, size, errno);
+#endif
return ret;
}
{
static const struct retro_variable vars[] = {
//{ "region", "Region; Auto|NTSC|PAL" },
+ { "picodrive_input1", "Input device 1; 3 button pad|6 button pad|None" },
+ { "picodrive_input2", "Input device 2; 3 button pad|6 button pad|None" },
+ #ifdef DRC_SH2
+ { "picodrive_drc", "Dynamic recompilers; enabled|disabled" },
+ #endif
{ NULL, NULL },
};
enum retro_pixel_format fmt = RETRO_PIXEL_FORMAT_RGB565;
if (!environ_cb(RETRO_ENVIRONMENT_SET_PIXEL_FORMAT, &fmt)) {
- lprintf("RGB565 suppot required, sorry\n");
+ lprintf("RGB565 support required, sorry\n");
return false;
}
audio_batch_cb(PsndOut, len / 4);
}
+ static enum input_device input_name_to_val(const char *name)
+ {
+ if (strcmp(name, "3 button pad") == 0)
+ return PICO_INPUT_PAD_3BTN;
+ if (strcmp(name, "6 button pad") == 0)
+ return PICO_INPUT_PAD_6BTN;
+ if (strcmp(name, "None") == 0)
+ return PICO_INPUT_NOTHING;
+
+ lprintf("invalid picodrive_input: '%s'\n", name);
+ return PICO_INPUT_PAD_3BTN;
+ }
+
+ static void update_variables(void)
+ {
+ struct retro_variable var;
+
+ var.value = NULL;
+ var.key = "picodrive_input1";
+ if (environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var) && var.value)
+ PicoSetInputDevice(0, input_name_to_val(var.value));
+
+ var.value = NULL;
+ var.key = "picodrive_input2";
+ if (environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var) && var.value)
+ PicoSetInputDevice(1, input_name_to_val(var.value));
+
+ #ifdef DRC_SH2
+ var.value = NULL;
+ var.key = "picodrive_drc";
+ if (environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var) && var.value) {
+ if (strcmp(var.value, "enabled") == 0)
+ PicoOpt |= POPT_EN_DRC;
+ else
+ PicoOpt &= ~POPT_EN_DRC;
+ }
+ #endif
+ }
+
void retro_run(void)
{
bool updated = false;
int pad, i;
if (environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE_UPDATE, &updated) && updated)
- ; //update_variables(true);
+ update_variables();
input_poll_cb();
//PicoMessage = plat_status_msg_busy_next;
PicoMCDopenTray = disk_tray_open;
PicoMCDcloseTray = disk_tray_close;
+
+ update_variables();
}
void retro_deinit(void)
notaz.gp2x.de / picodrive.git / commitdiff