patch up some clang/apple issues
authornotaz <notasas@gmail.com>
Thu, 12 Oct 2023 22:15:13 +0000 (01:15 +0300)
committernotaz <notasas@gmail.com>
Fri, 13 Oct 2023 15:59:47 +0000 (18:59 +0300)
include/arm_features.h
libpcsxcore/decode_xa.c
libpcsxcore/new_dynarec/linkage_arm.S
libpcsxcore/new_dynarec/linkage_arm64.S
plugins/gpu_neon/psx_gpu/psx_gpu.c
plugins/gpu_neon/psx_gpu/psx_gpu_simd.c

index 4f216a3..9f51ab8 100644 (file)
 #define HAVE_NEON32
 #endif
 
+#if defined(__APPLE__) && defined(__aarch64__)
+#define ASM_SEPARATOR %%
+#else
+#define ASM_SEPARATOR ;
+#endif
+
 /* global function/external symbol */
-#ifndef __MACH__
+#ifndef __APPLE__
 #define ESYM(name) name
 
 #define FUNCTION(name) \
   .type name, %function; \
   name
 
+#define ESIZE(name_, size_) \
+  .size name_, size_
+
+#define EOBJECT(name_) \
+  .type name_, %object
+
 #define EXTRA_UNSAVED_REGS
 
 #else
 #define ESYM(name) _##name
 
 #define FUNCTION(name) \
-  .globl ESYM(name); \
-  name: \
+  name: ASM_SEPARATOR \
+  .globl ESYM(name) ASM_SEPARATOR \
   ESYM(name)
 
+#define ESIZE(name_, size_)
+#define EOBJECT(name_)
+
 // r7 is preserved, but add it for EABI alignment..
 #define EXTRA_UNSAVED_REGS r7, r9,
 
index ee1dd6f..17df65f 100644 (file)
@@ -110,10 +110,10 @@ static __inline void ADPCM_DecodeBlock16( ADPCM_Decode_t *decp, u8 filter_range,
                x2 -= (IK0(filterid) * fy0 + (IK1(filterid) * fy1)) >> SHC; fy1 = fy0; fy0 = x2;
                x3 -= (IK0(filterid) * fy0 + (IK1(filterid) * fy1)) >> SHC; fy1 = fy0; fy0 = x3;
 
-               XACLAMP( x0, -32768<<SH, 32767<<SH ); *destp = x0 >> SH; destp += inc;
-               XACLAMP( x1, -32768<<SH, 32767<<SH ); *destp = x1 >> SH; destp += inc;
-               XACLAMP( x2, -32768<<SH, 32767<<SH ); *destp = x2 >> SH; destp += inc;
-               XACLAMP( x3, -32768<<SH, 32767<<SH ); *destp = x3 >> SH; destp += inc;
+               XACLAMP( x0, (int)(-32768u<<SH), 32767<<SH ); *destp = x0 >> SH; destp += inc;
+               XACLAMP( x1, (int)(-32768u<<SH), 32767<<SH ); *destp = x1 >> SH; destp += inc;
+               XACLAMP( x2, (int)(-32768u<<SH), 32767<<SH ); *destp = x2 >> SH; destp += inc;
+               XACLAMP( x3, (int)(-32768u<<SH), 32767<<SH ); *destp = x3 >> SH; destp += inc;
        }
        decp->y0 = fy0;
        decp->y1 = fy1;
index 5d93180..baac176 100644 (file)
 #ifdef __MACH__
 #define dynarec_local          ESYM(dynarec_local)
 #define ndrc_add_jump_out      ESYM(ndrc_add_jump_out)
-#define ndrc_try_restore_block ESYM(ndrc_try_restore_block)
 #define ndrc_get_addr_ht       ESYM(ndrc_get_addr_ht)
 #define ndrc_get_addr_ht_param ESYM(ndrc_get_addr_ht_param)
 #define ndrc_write_invalidate_one ESYM(ndrc_write_invalidate_one)
 #define gen_interupt           ESYM(gen_interupt)
 #define gteCheckStallRaw       ESYM(gteCheckStallRaw)
 #define psxException           ESYM(psxException)
+#define execI                  ESYM(execI)
 #endif
 
        .bss
index 31b7b9f..3519dff 100644 (file)
 #include "assem_arm64.h"
 #include "linkage_offsets.h"
 
+#ifdef __MACH__
+#define dynarec_local          ESYM(dynarec_local)
+#define ndrc_add_jump_out      ESYM(ndrc_add_jump_out)
+#define ndrc_get_addr_ht       ESYM(ndrc_get_addr_ht)
+#define gen_interupt           ESYM(gen_interupt)
+#define gteCheckStallRaw       ESYM(gteCheckStallRaw)
+#define psxException           ESYM(psxException)
+#define execI                  ESYM(execI)
+#endif
+
 #if (LO_mem_wtab & 7)
 #error misligned pointers
 #endif
 .bss
        .align  4
        .global dynarec_local
-       .type   dynarec_local, %object
-       .size   dynarec_local, LO_dynarec_local_size
+       EOBJECT(dynarec_local)
+       ESIZE(dynarec_local, LO_dynarec_local_size)
 dynarec_local:
        .space  LO_dynarec_local_size
 
 #define DRC_VAR_(name, vname, size_) \
-       vname = dynarec_local + LO_##name; \
-       .global vname; \
-       .type   vname, %object; \
-       .size   vname, size_
+       vname = dynarec_local + LO_##name ASM_SEPARATOR \
+       .globl vname; \
+       EOBJECT(vname); \
+       ESIZE(vname, LO_dynarec_local_size)
 
 #define DRC_VAR(name, size_) \
        DRC_VAR_(name, ESYM(name), size_)
@@ -89,7 +99,7 @@ FUNCTION(dyna_linker):
        /* r1 = instruction to patch */
        bl      ndrc_get_addr_ht
        br      x0
-       .size   dyna_linker, .-dyna_linker
+       ESIZE(dyna_linker, .-dyna_linker)
 
        .align  2
 FUNCTION(cc_interrupt):
@@ -115,7 +125,7 @@ FUNCTION(cc_interrupt):
        ldr     w0, [rFP, #LO_pcaddr]
        bl      ndrc_get_addr_ht
        br      x0
-       .size   cc_interrupt, .-cc_interrupt
+       ESIZE(cc_interrupt, .-cc_interrupt)
 
        .align  2
 FUNCTION(jump_addrerror_ds): /* R3000E_AdEL / R3000E_AdES in w0 */
@@ -170,7 +180,7 @@ FUNCTION(jump_to_new_pc):
        cbnz    w2, new_dyna_leave
        bl      ndrc_get_addr_ht
        br      x0
-       .size   jump_to_new_pc, .-jump_to_new_pc
+       ESIZE(jump_to_new_pc, .-jump_to_new_pc)
 
        /* stack must be aligned by 16, and include space for save_regs() use */
        .align  2
@@ -189,7 +199,7 @@ FUNCTION(new_dyna_start):
        sub     rCC, w2, w1
        bl      ndrc_get_addr_ht
        br      x0
-       .size   new_dyna_start, .-new_dyna_start
+       ESIZE(new_dyna_start, .-new_dyna_start)
 
        .align  2
 FUNCTION(new_dyna_leave):
@@ -203,7 +213,7 @@ FUNCTION(new_dyna_leave):
        ldp     x27, x28, [sp, #16*5]
        ldp     x29, x30, [sp], #SSP_ALL
        ret
-       .size   new_dyna_leave, .-new_dyna_leave
+       ESIZE(new_dyna_leave, .-new_dyna_leave)
 
 /* --------------------------------------- */
 
@@ -281,16 +291,16 @@ handler_read_end:
 
 FUNCTION(jump_handler_write8):
        add     x3, x3, #0x1000/4*8 + 0x1000/2*8  /* shift to r8 part */
-       pcsx_write_mem strb uxtb 0
+       pcsx_write_mem strb, uxtb, 0
        b       handler_write_end
 
 FUNCTION(jump_handler_write16):
        add     x3, x3, #0x1000/4*8               /* shift to r16 part */
-       pcsx_write_mem strh uxth 1
+       pcsx_write_mem strh, uxth, 1
        b       handler_write_end
 
 FUNCTION(jump_handler_write32):
-       pcsx_write_mem str mov 2
+       pcsx_write_mem str, mov, 2
 
 handler_write_end:
        memhandler_post
index fbacbd5..ea3641f 100644 (file)
@@ -4582,6 +4582,7 @@ void render_line(psx_gpu_struct *psx_gpu, vertex_struct *vertexes, u32 flags,
   if(vertex_a->x >= vertex_b->x)
   {
     vertex_swap(vertex_a, vertex_b);
+    (void)triangle_winding;
   }
 
   x_a = vertex_a->x;
index ac4af9d..b527436 100644 (file)
@@ -2196,9 +2196,6 @@ void setup_spans_up_down(psx_gpu_struct *psx_gpu, vertex_struct *v_a,
                                                                                \
       setup_blocks_add_blocks_##target();                                      \
                                                                                \
-      s32 pixel_span = span_num_blocks * 8;                                    \
-      pixel_span -= __builtin_popcount(span_edge_data->right_mask & 0xFF);     \
-                                                                               \
       span_num_blocks--;                                                       \
       while(span_num_blocks)                                                   \
       {                                                                        \