drc: allow translation cache in data segment

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.c

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index ebf733b..0b7cee8 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -29,6 +29,10 @@
 #include "pcnt.h"
 #endif
 
+#ifndef BASE_ADDR_FIXED
+char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
+#endif
+
 extern int cycle_count;
 extern int last_count;
 extern int pcaddr;
@@ -2835,7 +2839,7 @@ do_readstub(int n)
       temp=r; break;
     }
   }
-  if(rt>=0)
+  if(rt>=0&&rt1[i]!=0)
     reglist&=~(1<<rt);
   if(temp==-1) {
     save_regs(reglist);
@@ -3012,7 +3016,7 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
     return;
   handler=get_direct_memhandler(mem_rtab,addr,type,&host_addr);
   if (handler==0) {
-    if(rt<0)
+    if(rt<0||rt1[i]==0)
       return;
     if(addr!=host_addr)
       emit_movimm_from(addr,rs,host_addr,rs);
@@ -3037,7 +3041,7 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   }
 
   // call a memhandler
-  if(rt>=0)
+  if(rt>=0&&rt1[i]!=0)
     reglist&=~(1<<rt);
   save_regs(reglist);
   if(target==0)
@@ -3068,7 +3072,7 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   else
     emit_call(handler);
 
-  if(rt>=0) {
+  if(rt>=0&&rt1[i]!=0) {
     switch(type) {
       case LOADB_STUB:  emit_signextend8(0,rt); break;
       case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
@@ -5680,7 +5684,7 @@ void do_clear_cache()
       for(j=0;j<32;j++) 
       {
         if(bitmap&(1<<j)) {
-          start=BASE_ADDR+i*131072+j*4096;
+          start=(u_int)BASE_ADDR+i*131072+j*4096;
           end=start+4095;
           j++;
           while(j<32) {