* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
+#include "../gte.h"
+#define FLAGLESS
+#include "../gte.h"
+#undef FLAGLESS
+#include "../gte_arm.h"
+#include "../gte_neon.h"
+#include "pcnt.h"
+#include "arm_features.h"
+
+#if !BASE_ADDR_FIXED
+char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
+#endif
+
+#ifndef __MACH__
+#define CALLER_SAVE_REGS 0x100f
+#else
+#define CALLER_SAVE_REGS 0x120f
+#endif
+
extern int cycle_count;
extern int last_count;
extern int pcaddr;
extern int pending_exception;
extern int branch_target;
extern uint64_t readmem_dword;
-#ifdef MUPEN64
-extern precomp_instr fake_pc;
-#endif
extern void *dynarec_local;
extern u_int memory_map[1048576];
extern u_int mini_ht[32][2];
0,
0};
-#include "fpu.h"
-
unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
/* Linker */
u_int get_clean_addr(int addr)
{
int *ptr=(int *)addr;
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
ptr+=4;
#else
ptr+=6;
int verify_dirty(int addr)
{
u_int *ptr=(u_int *)addr;
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
// get from literal pool
assert((*ptr&0xFFFF0000)==0xe59f0000);
u_int offset=*ptr&0xfff;
#endif
if((*ptr&0xFF000000)!=0xeb000000) ptr++;
assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
- u_int verifier=(int)ptr+((signed int)(*ptr<<8)>>6)+8; // get target of bl
- if(verifier==(u_int)verify_code_vm||verifier==(u_int)verify_code_ds) {
- unsigned int page=source>>12;
- unsigned int map_value=memory_map[page];
- if(map_value>=0x80000000) return 0;
- while(page<((source+len-1)>>12)) {
- if((memory_map[++page]<<2)!=(map_value<<2)) return 0;
- }
- source = source+(map_value<<2);
- }
//printf("verify_dirty: %x %x %x\n",source,copy,len);
return !memcmp((void *)source,(void *)copy,len);
}
// guarantees that it's not dirty
int isclean(int addr)
{
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
int *ptr=((u_int *)addr)+4;
#else
int *ptr=((u_int *)addr)+6;
return 1;
}
+// get source that block at addr was compiled from (host pointers)
void get_bounds(int addr,u_int *start,u_int *end)
{
u_int *ptr=(u_int *)addr;
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
// get from literal pool
assert((*ptr&0xFFFF0000)==0xe59f0000);
u_int offset=*ptr&0xfff;
#endif
if((*ptr&0xFF000000)!=0xeb000000) ptr++;
assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
- u_int verifier=(int)ptr+((signed int)(*ptr<<8)>>6)+8; // get target of bl
- if(verifier==(u_int)verify_code_vm||verifier==(u_int)verify_code_ds) {
- if(memory_map[source>>12]>=0x80000000) source = 0;
- else source = source+(memory_map[source>>12]<<2);
- }
*start=source;
*end=source+len;
}
}
}
}
- printf("This shouldn't happen (alloc_reg)");exit(1);
+ SysPrintf("This shouldn't happen (alloc_reg)");exit(1);
}
void alloc_reg64(struct regstat *cur,int i,signed char reg)
}
}
}
- printf("This shouldn't happen");exit(1);
+ SysPrintf("This shouldn't happen");exit(1);
}
// Allocate a temporary register. This is done without regard to
}
}
}
- printf("This shouldn't happen");exit(1);
+ SysPrintf("This shouldn't happen");exit(1);
}
// Allocate a specific ARM register.
void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
int offset=addr-(int)out-8;
if(offset<-33554432||offset>=33554432) {
if (addr>2) {
- printf("genjmp: out of range: %08x\n", offset);
+ SysPrintf("genjmp: out of range: %08x\n", offset);
exit(1);
}
return 0;
assem_debug("mvn %s,#%d\n",regname[rt],imm);
output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
}else if(imm<65536) {
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
emit_movw(imm,rt);
#endif
}else{
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
emit_loadlp(imm,rt);
#else
emit_movw(imm&0x0000FFFF,rt);
void emit_loadreg(int r, int hr)
{
-#ifdef FORCE32
if(r&64) {
- printf("64bit load in 32bit mode!\n");
+ SysPrintf("64bit load in 32bit mode!\n");
assert(0);
return;
}
-#endif
if((r&63)==0)
emit_zeroreg(hr);
else {
}
void emit_storereg(int r, int hr)
{
-#ifdef FORCE32
if(r&64) {
- printf("64bit store in 32bit mode!\n");
+ SysPrintf("64bit store in 32bit mode!\n");
assert(0);
return;
}
-#endif
int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4);
if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
assert(rs<16);
assert(rt<16);
if(imm!=0) {
- assert(imm>-65536&&imm<65536);
u_int armval;
if(genimm(imm,&armval)) {
assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
}else if(genimm(-imm,&armval)) {
- assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],imm);
+ assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
- }else if(imm<0) {
+ #ifdef HAVE_ARMV7
+ }else if(rt!=rs&&(u_int)imm<65536) {
+ emit_movw(imm&0x0000ffff,rt);
+ emit_add(rs,rt,rt);
+ }else if(rt!=rs&&(u_int)-imm<65536) {
+ emit_movw(-imm&0x0000ffff,rt);
+ emit_sub(rs,rt,rt);
+ #endif
+ }else if((u_int)-imm<65536) {
assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
- }else{
- assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
- assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
- output_w32(0xe2800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
- output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
+ }else {
+ do {
+ int shift = (ffs(imm) - 1) & ~1;
+ int imm8 = imm & (0xff << shift);
+ genimm_checked(imm8,&armval);
+ assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
+ output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
+ rs = rt;
+ imm &= ~imm8;
+ }
+ while (imm != 0);
}
}
else if(rs!=rt) emit_mov(rs,rt);
assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
}else if(imm==65535) {
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV6
assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
#endif
}else{
assert(imm>0&&imm<65535);
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
assem_debug("mov r14,#%d\n",imm&0xFF00);
output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
assem_debug("add r14,r14,#%d\n",imm&0xFF);
output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
}
+void emit_lslpls_imm(int rs,int imm,int rt)
+{
+ assert(imm>0);
+ assert(imm<32);
+ assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
+ output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
+}
+
void emit_shrimm(int rs,u_int imm,int rt)
{
assert(imm>0);
void emit_signextend16(int rs,int rt)
{
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV6
emit_shlimm(rs,16,rt);
emit_sarimm(rt,16,rt);
#else
void emit_signextend8(int rs,int rt)
{
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV6
emit_shlimm(rs,24,rt);
emit_sarimm(rt,24,rt);
#else
output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
}else if(imm>0) {
assert(imm<65536);
- #ifdef ARMv5_ONLY
emit_movimm(imm,HOST_TEMPREG);
- #else
- emit_movw(imm,HOST_TEMPREG);
- #endif
assem_debug("cmp %s,r14\n",regname[rs]);
output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
}else{
assert(imm>-65536);
- #ifdef ARMv5_ONLY
emit_movimm(-imm,HOST_TEMPREG);
- #else
- emit_movw(-imm,HOST_TEMPREG);
- #endif
assem_debug("cmn %s,r14\n",regname[rs]);
output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
}
output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
}
}
+static void emit_ldrd(int offset, int rs, int rt)
+{
+ assert(offset>-256&&offset<256);
+ assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
+ if(offset>=0) {
+ output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
+ }else{
+ output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
+ }
+}
void emit_readword(int addr, int rt)
{
u_int offset = addr-(u_int)&dynarec_local;
output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
}
+void emit_shrne_imm(int rs,u_int imm,int rt)
+{
+ assert(imm>0);
+ assert(imm<32);
+ assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
+ output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
+}
+
void emit_negmi(int rs, int rt)
{
assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
}
else {
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
emit_movimm(imm1,rt);
add_literal((int)out,imm2);
assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
}
+void emit_addpl_imm(int rs,int imm,int rt)
+{
+ u_int armval;
+ genimm_checked(imm,&armval);
+ assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
+ output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
+}
+
void emit_jno_unlikely(int a)
{
//emit_jno(a);
output_w32(0x72800000|rd_rn_rm(15,15,0));
}
-// Save registers before function call
-void save_regs(u_int reglist)
+static void save_regs_all(u_int reglist)
{
- reglist&=0x100f; // only save the caller-save registers, r0-r3, r12
+ int i;
if(!reglist) return;
assem_debug("stmia fp,{");
- if(reglist&1) assem_debug("r0, ");
- if(reglist&2) assem_debug("r1, ");
- if(reglist&4) assem_debug("r2, ");
- if(reglist&8) assem_debug("r3, ");
- if(reglist&0x1000) assem_debug("r12");
+ for(i=0;i<16;i++)
+ if(reglist&(1<<i))
+ assem_debug("r%d,",i);
assem_debug("}\n");
output_w32(0xe88b0000|reglist);
}
-// Restore registers after function call
-void restore_regs(u_int reglist)
+static void restore_regs_all(u_int reglist)
{
- reglist&=0x100f; // only restore the caller-save registers, r0-r3, r12
+ int i;
if(!reglist) return;
assem_debug("ldmia fp,{");
- if(reglist&1) assem_debug("r0, ");
- if(reglist&2) assem_debug("r1, ");
- if(reglist&4) assem_debug("r2, ");
- if(reglist&8) assem_debug("r3, ");
- if(reglist&0x1000) assem_debug("r12");
+ for(i=0;i<16;i++)
+ if(reglist&(1<<i))
+ assem_debug("r%d,",i);
assem_debug("}\n");
output_w32(0xe89b0000|reglist);
}
+// Save registers before function call
+static void save_regs(u_int reglist)
+{
+ reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
+ save_regs_all(reglist);
+}
+// Restore registers after function call
+static void restore_regs(u_int reglist)
+{
+ reglist&=CALLER_SAVE_REGS;
+ restore_regs_all(reglist);
+}
// Write back consts using r14 so we don't disturb the other registers
void wb_consts(signed char i_regmap[],uint64_t i_is32,u_int i_dirty,int i)
emit_movimm(value,HOST_TEMPREG);
}
emit_storereg(i_regmap[hr],HOST_TEMPREG);
-#ifndef FORCE32
- if((i_is32>>i_regmap[hr])&1) {
- if(value!=-1&&value!=0) emit_sarimm(HOST_TEMPREG,31,HOST_TEMPREG);
- emit_storereg(i_regmap[hr]|64,HOST_TEMPREG);
- }
-#endif
}
}
}
int i;
for(i=0;i<literalcount;i++)
{
+ u_int l_addr=(u_int)out;
+ int j;
+ for(j=0;j<i;j++) {
+ if(literals[j][1]==literals[i][1]) {
+ //printf("dup %08x\n",literals[i][1]);
+ l_addr=literals[j][0];
+ break;
+ }
+ }
ptr=(u_int *)literals[i][0];
- u_int offset=(u_int)out-(u_int)ptr-8;
+ u_int offset=l_addr-(u_int)ptr-8;
assert(offset<4096);
assert(!(offset&3));
*ptr|=offset;
- output_w32(literals[i][1]);
+ if(l_addr==(u_int)out) {
+ literals[i][0]=l_addr; // remember for dupes
+ output_w32(literals[i][1]);
+ }
}
literalcount=0;
}
set_jump_target(jaddr,(int)out);
}
-emit_extjump2(int addr, int target, int linker)
+emit_extjump2(u_int addr, int target, int linker)
{
u_char *ptr=(u_char *)addr;
assert((ptr[3]&0x0e)==0xa);
emit_extjump2(addr, target, (int)dyna_linker_ds);
}
-#ifdef PCSX
-#include "pcsxmem_inline.c"
-#endif
+// put rt_val into rt, potentially making use of rs with value rs_val
+static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
+{
+ u_int armval;
+ int diff;
+ if(genimm(rt_val,&armval)) {
+ assem_debug("mov %s,#%d\n",regname[rt],rt_val);
+ output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
+ return;
+ }
+ if(genimm(~rt_val,&armval)) {
+ assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
+ output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
+ return;
+ }
+ diff=rt_val-rs_val;
+ if(genimm(diff,&armval)) {
+ assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
+ output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
+ return;
+ }else if(genimm(-diff,&armval)) {
+ assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
+ output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
+ return;
+ }
+ emit_movimm(rt_val,rt);
+}
+
+// return 1 if above function can do it's job cheaply
+static int is_similar_value(u_int v1,u_int v2)
+{
+ u_int xs;
+ int diff;
+ if(v1==v2) return 1;
+ diff=v2-v1;
+ for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
+ ;
+ if(xs<0x100) return 1;
+ for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
+ ;
+ if(xs<0x100) return 1;
+ return 0;
+}
// trashes r2
static void pass_args(int a0, int a1)
}
}
+static void mov_loadtype_adj(int type,int rs,int rt)
+{
+ switch(type) {
+ case LOADB_STUB: emit_signextend8(rs,rt); break;
+ case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
+ case LOADH_STUB: emit_signextend16(rs,rt); break;
+ case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
+ case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
+ default: assert(0);
+ }
+}
+
+#include "pcsxmem.h"
+#include "pcsxmem_inline.c"
+
do_readstub(int n)
{
assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
rt=get_reg(i_regmap,rt1[i]);
}
assert(rs>=0);
-#ifdef PCSX
int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0;
reglist|=(1<<rs);
for(r=0;r<=12;r++) {
temp=r; break;
}
}
- if(rt>=0)
+ if(rt>=0&&rt1[i]!=0)
reglist&=~(1<<rt);
if(temp==-1) {
save_regs(reglist);
int cc=get_reg(i_regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*stubs[n][6]+2,2);
+ emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
emit_call(handler);
if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
- switch(type) {
- case LOADB_STUB: emit_signextend8(0,rt); break;
- case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
- case LOADH_STUB: emit_signextend16(0,rt); break;
- case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
- case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
- }
+ mov_loadtype_adj(type,0,rt);
}
if(restore_jump)
set_jump_target(restore_jump,(int)out);
restore_regs(reglist);
emit_jmp(stubs[n][2]); // return address
-#else // !PCSX
- if(addr<0) addr=rt;
- if(addr<0&&itype[i]!=C1LS&&itype[i]!=C2LS&&itype[i]!=LOADLR) addr=get_reg(i_regmap,-1);
- assert(addr>=0);
- int ftable=0;
- if(type==LOADB_STUB||type==LOADBU_STUB)
- ftable=(int)readmemb;
- if(type==LOADH_STUB||type==LOADHU_STUB)
- ftable=(int)readmemh;
- if(type==LOADW_STUB)
- ftable=(int)readmem;
-#ifndef FORCE32
- if(type==LOADD_STUB)
- ftable=(int)readmemd;
-#endif
- assert(ftable!=0);
- emit_writeword(rs,(int)&address);
- //emit_pusha();
- save_regs(reglist);
-#ifndef PCSX
- ds=i_regs!=®s[i];
- int real_rs=(itype[i]==LOADLR)?-1:get_reg(i_regmap,rs1[i]);
- u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
- if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
- wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
- if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
-#endif
- emit_shrimm(rs,16,1);
- int cc=get_reg(i_regmap,CCREG);
- if(cc<0) {
- emit_loadreg(CCREG,2);
- }
- emit_movimm(ftable,0);
- emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2);
-#ifndef PCSX
- emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
-#endif
- //emit_readword((int)&last_count,temp);
- //emit_add(cc,temp,cc);
- //emit_writeword(cc,(int)&Count);
- //emit_mov(15,14);
- emit_call((int)&indirect_jump_indexed);
- //emit_callreg(rs);
- //emit_readword_dualindexedx4(rs,HOST_TEMPREG,15);
-#ifndef PCSX
- // We really shouldn't need to update the count here,
- // but not doing so causes random crashes...
- emit_readword((int)&Count,HOST_TEMPREG);
- emit_readword((int)&next_interupt,2);
- emit_addimm(HOST_TEMPREG,-2*stubs[n][6]-2,HOST_TEMPREG);
- emit_writeword(2,(int)&last_count);
- emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
- if(cc<0) {
- emit_storereg(CCREG,HOST_TEMPREG);
- }
-#endif
- //emit_popa();
- restore_regs(reglist);
- //if((cc=get_reg(regmap,CCREG))>=0) {
- // emit_loadreg(CCREG,cc);
- //}
- if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
- assert(rt>=0);
- if(type==LOADB_STUB)
- emit_movsbl((int)&readmem_dword,rt);
- if(type==LOADBU_STUB)
- emit_movzbl((int)&readmem_dword,rt);
- if(type==LOADH_STUB)
- emit_movswl((int)&readmem_dword,rt);
- if(type==LOADHU_STUB)
- emit_movzwl((int)&readmem_dword,rt);
- if(type==LOADW_STUB)
- emit_readword((int)&readmem_dword,rt);
- if(type==LOADD_STUB) {
- emit_readword((int)&readmem_dword,rt);
- if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
- }
- }
- emit_jmp(stubs[n][2]); // return address
-#endif // !PCSX
}
-#ifdef PCSX
// return memhandler, or get directly accessable address and return 0
u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
{
return l2<<1;
}
}
-#endif
inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
{
int rt=get_reg(regmap,target);
if(rs<0) rs=get_reg(regmap,-1);
assert(rs>=0);
-#ifdef PCSX
- u_int handler,host_addr=0;
- if(pcsx_direct_read(type,addr,target?rs:-1,rt))
+ u_int handler,host_addr=0,is_dynamic,far_call=0;
+ int cc=get_reg(regmap,CCREG);
+ if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt))
return;
handler=get_direct_memhandler(mem_rtab,addr,type,&host_addr);
if (handler==0) {
- if(rt<0)
+ if(rt<0||rt1[i]==0)
return;
- if(target==0||addr!=host_addr)
- emit_movimm(host_addr,rs);
+ if(addr!=host_addr)
+ emit_movimm_from(addr,rs,host_addr,rs);
switch(type) {
case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
}
return;
}
+ is_dynamic=pcsxmem_is_handler_dynamic(addr);
+ if(is_dynamic) {
+ if(type==LOADB_STUB||type==LOADBU_STUB)
+ handler=(int)jump_handler_read8;
+ if(type==LOADH_STUB||type==LOADHU_STUB)
+ handler=(int)jump_handler_read16;
+ if(type==LOADW_STUB)
+ handler=(int)jump_handler_read32;
+ }
// call a memhandler
- if(rt>=0)
+ if(rt>=0&&rt1[i]!=0)
reglist&=~(1<<rt);
save_regs(reglist);
if(target==0)
emit_movimm(addr,0);
else if(rs!=0)
emit_mov(rs,0);
- int cc=get_reg(regmap,CCREG);
- if(cc<0)
- emit_loadreg(CCREG,2);
- emit_readword((int)&last_count,3);
- emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*(adj+1),2);
- emit_add(2,3,3);
- emit_writeword(3,(int)&Count);
-
int offset=(int)handler-(int)out-8;
if(offset<-33554432||offset>=33554432) {
// unreachable memhandler, a plugin func perhaps
- emit_movimm(handler,1);
- emit_callreg(1);
+ emit_movimm(handler,12);
+ far_call=1;
+ }
+ if(cc<0)
+ emit_loadreg(CCREG,2);
+ if(is_dynamic) {
+ emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
+ emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
+ }
+ else {
+ emit_readword((int)&last_count,3);
+ emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
+ emit_add(2,3,2);
+ emit_writeword(2,(int)&Count);
}
+
+ if(far_call)
+ emit_callreg(12);
else
emit_call(handler);
- if(rt>=0) {
+
+ if(rt>=0&&rt1[i]!=0) {
switch(type) {
case LOADB_STUB: emit_signextend8(0,rt); break;
case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
}
}
restore_regs(reglist);
-#else // if !PCSX
- int ftable=0;
- if(type==LOADB_STUB||type==LOADBU_STUB)
- ftable=(int)readmemb;
- if(type==LOADH_STUB||type==LOADHU_STUB)
- ftable=(int)readmemh;
- if(type==LOADW_STUB)
- ftable=(int)readmem;
-#ifndef FORCE32
- if(type==LOADD_STUB)
- ftable=(int)readmemd;
-#endif
- assert(ftable!=0);
- if(target==0)
- emit_movimm(addr,rs);
- emit_writeword(rs,(int)&address);
- //emit_pusha();
- save_regs(reglist);
-#ifndef PCSX
- if((signed int)addr>=(signed int)0xC0000000) {
- // Theoretically we can have a pagefault here, if the TLB has never
- // been enabled and the address is outside the range 80000000..BFFFFFFF
- // Write out the registers so the pagefault can be handled. This is
- // a very rare case and likely represents a bug.
- int ds=regmap!=regs[i].regmap;
- if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i);
- if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty);
- else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty);
- }
-#endif
- //emit_shrimm(rs,16,1);
- int cc=get_reg(regmap,CCREG);
- if(cc<0) {
- emit_loadreg(CCREG,2);
- }
- //emit_movimm(ftable,0);
- emit_movimm(((u_int *)ftable)[addr>>16],0);
- //emit_readword((int)&last_count,12);
- emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*(adj+1),2);
-#ifndef PCSX
- if((signed int)addr>=(signed int)0xC0000000) {
- // Pagefault address
- int ds=regmap!=regs[i].regmap;
- emit_movimm(start+i*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
- }
-#endif
- //emit_add(12,2,2);
- //emit_writeword(2,(int)&Count);
- //emit_call(((u_int *)ftable)[addr>>16]);
- emit_call((int)&indirect_jump);
-#ifndef PCSX
- // We really shouldn't need to update the count here,
- // but not doing so causes random crashes...
- emit_readword((int)&Count,HOST_TEMPREG);
- emit_readword((int)&next_interupt,2);
- emit_addimm(HOST_TEMPREG,-CLOCK_DIVIDER*(adj+1),HOST_TEMPREG);
- emit_writeword(2,(int)&last_count);
- emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
- if(cc<0) {
- emit_storereg(CCREG,HOST_TEMPREG);
- }
-#endif
- //emit_popa();
- restore_regs(reglist);
- if(rt>=0) {
- if(type==LOADB_STUB)
- emit_movsbl((int)&readmem_dword,rt);
- if(type==LOADBU_STUB)
- emit_movzbl((int)&readmem_dword,rt);
- if(type==LOADH_STUB)
- emit_movswl((int)&readmem_dword,rt);
- if(type==LOADHU_STUB)
- emit_movzwl((int)&readmem_dword,rt);
- if(type==LOADW_STUB)
- emit_readword((int)&readmem_dword,rt);
- if(type==LOADD_STUB) {
- emit_readword((int)&readmem_dword,rt);
- if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
- }
- }
-#endif // !PCSX
}
do_writestub(int n)
}
assert(rs>=0);
assert(rt>=0);
-#ifdef PCSX
int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0,ra;
int reglist2=reglist|(1<<rs)|(1<<rt);
for(rtmp=0;rtmp<=12;rtmp++) {
int cc=get_reg(i_regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*stubs[n][6]+2,2);
+ emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
// returns new cycle_count
emit_call(handler);
- emit_addimm(0,-CLOCK_DIVIDER*stubs[n][6]-2,cc<0?2:cc);
+ emit_addimm(0,-CLOCK_ADJUST((int)stubs[n][6]+1),cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
if(restore_jump)
set_jump_target(restore_jump,(int)out);
restore_regs(reglist);
ra=stubs[n][2];
- if(!restore_jump) ra+=4*3; // skip invcode check
emit_jmp(ra);
-#else // if !PCSX
- if(addr<0) addr=get_reg(i_regmap,-1);
- assert(addr>=0);
- int ftable=0;
- if(type==STOREB_STUB)
- ftable=(int)writememb;
- if(type==STOREH_STUB)
- ftable=(int)writememh;
- if(type==STOREW_STUB)
- ftable=(int)writemem;
-#ifndef FORCE32
- if(type==STORED_STUB)
- ftable=(int)writememd;
-#endif
- assert(ftable!=0);
- emit_writeword(rs,(int)&address);
- //emit_shrimm(rs,16,rs);
- //emit_movmem_indexedx4(ftable,rs,rs);
- if(type==STOREB_STUB)
- emit_writebyte(rt,(int)&byte);
- if(type==STOREH_STUB)
- emit_writehword(rt,(int)&hword);
- if(type==STOREW_STUB)
- emit_writeword(rt,(int)&word);
- if(type==STORED_STUB) {
-#ifndef FORCE32
- emit_writeword(rt,(int)&dword);
- emit_writeword(r?rth:rt,(int)&dword+4);
-#else
- printf("STORED_STUB\n");
-#endif
- }
- //emit_pusha();
- save_regs(reglist);
-#ifndef PCSX
- ds=i_regs!=®s[i];
- int real_rs=get_reg(i_regmap,rs1[i]);
- u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
- if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
- wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
- if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
-#endif
- emit_shrimm(rs,16,1);
- int cc=get_reg(i_regmap,CCREG);
- if(cc<0) {
- emit_loadreg(CCREG,2);
- }
- emit_movimm(ftable,0);
- emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2);
-#ifndef PCSX
- emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
-#endif
- //emit_readword((int)&last_count,temp);
- //emit_addimm(cc,2*stubs[n][5]+2,cc);
- //emit_add(cc,temp,cc);
- //emit_writeword(cc,(int)&Count);
- emit_call((int)&indirect_jump_indexed);
- //emit_callreg(rs);
- emit_readword((int)&Count,HOST_TEMPREG);
- emit_readword((int)&next_interupt,2);
- emit_addimm(HOST_TEMPREG,-2*stubs[n][6]-2,HOST_TEMPREG);
- emit_writeword(2,(int)&last_count);
- emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
- if(cc<0) {
- emit_storereg(CCREG,HOST_TEMPREG);
- }
- //emit_popa();
- restore_regs(reglist);
- //if((cc=get_reg(regmap,CCREG))>=0) {
- // emit_loadreg(CCREG,cc);
- //}
- emit_jmp(stubs[n][2]); // return address
-#endif // !PCSX
}
inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
int rt=get_reg(regmap,target);
assert(rs>=0);
assert(rt>=0);
-#ifdef PCSX
u_int handler,host_addr=0;
- if(pcsx_direct_write(type,addr,rs,rt,regmap))
- return;
handler=get_direct_memhandler(mem_wtab,addr,type,&host_addr);
if (handler==0) {
- if(target==0||addr!=host_addr)
- emit_movimm(host_addr,rs);
+ if(addr!=host_addr)
+ emit_movimm_from(addr,rs,host_addr,rs);
switch(type) {
case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
// call a memhandler
save_regs(reglist);
- pass_args(target!=0?rs:-1,rt);
- if(target==0)
- emit_movimm(addr,0);
+ pass_args(rs,rt);
int cc=get_reg(regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*(adj+1),2);
+ emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
emit_movimm(handler,3);
// returns new cycle_count
emit_call((int)jump_handler_write_h);
- emit_addimm(0,-CLOCK_DIVIDER*(adj+1),cc<0?2:cc);
+ emit_addimm(0,-CLOCK_ADJUST(adj+1),cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
restore_regs(reglist);
-#else // if !pcsx
- int ftable=0;
- if(type==STOREB_STUB)
- ftable=(int)writememb;
- if(type==STOREH_STUB)
- ftable=(int)writememh;
- if(type==STOREW_STUB)
- ftable=(int)writemem;
-#ifndef FORCE32
- if(type==STORED_STUB)
- ftable=(int)writememd;
-#endif
- assert(ftable!=0);
- emit_writeword(rs,(int)&address);
- //emit_shrimm(rs,16,rs);
- //emit_movmem_indexedx4(ftable,rs,rs);
- if(type==STOREB_STUB)
- emit_writebyte(rt,(int)&byte);
- if(type==STOREH_STUB)
- emit_writehword(rt,(int)&hword);
- if(type==STOREW_STUB)
- emit_writeword(rt,(int)&word);
- if(type==STORED_STUB) {
-#ifndef FORCE32
- emit_writeword(rt,(int)&dword);
- emit_writeword(target?rth:rt,(int)&dword+4);
-#else
- printf("STORED_STUB\n");
-#endif
- }
- //emit_pusha();
- save_regs(reglist);
-#ifndef PCSX
- // rearmed note: load_all_consts prevents BIOS boot, some bug?
- if((signed int)addr>=(signed int)0xC0000000) {
- // Theoretically we can have a pagefault here, if the TLB has never
- // been enabled and the address is outside the range 80000000..BFFFFFFF
- // Write out the registers so the pagefault can be handled. This is
- // a very rare case and likely represents a bug.
- int ds=regmap!=regs[i].regmap;
- if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i);
- if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty);
- else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty);
- }
-#endif
- //emit_shrimm(rs,16,1);
- int cc=get_reg(regmap,CCREG);
- if(cc<0) {
- emit_loadreg(CCREG,2);
- }
- //emit_movimm(ftable,0);
- emit_movimm(((u_int *)ftable)[addr>>16],0);
- //emit_readword((int)&last_count,12);
- emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*(adj+1),2);
-#ifndef PCSX
- if((signed int)addr>=(signed int)0xC0000000) {
- // Pagefault address
- int ds=regmap!=regs[i].regmap;
- emit_movimm(start+i*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
- }
-#endif
- //emit_add(12,2,2);
- //emit_writeword(2,(int)&Count);
- //emit_call(((u_int *)ftable)[addr>>16]);
- emit_call((int)&indirect_jump);
- emit_readword((int)&Count,HOST_TEMPREG);
- emit_readword((int)&next_interupt,2);
- emit_addimm(HOST_TEMPREG,-CLOCK_DIVIDER*(adj+1),HOST_TEMPREG);
- emit_writeword(2,(int)&last_count);
- emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
- if(cc<0) {
- emit_storereg(CCREG,HOST_TEMPREG);
- }
- //emit_popa();
- restore_regs(reglist);
-#endif
}
do_unalignedwritestub(int n)
int cc=get_reg(i_regmap,CCREG);
if(cc<0)
emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*stubs[n][6]+2,2);
+ emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
emit_call((int)(opcode[i]==0x2a?jump_handle_swl:jump_handle_swr));
- emit_addimm(0,-CLOCK_DIVIDER*stubs[n][6]-2,cc<0?2:cc);
+ emit_addimm(0,-CLOCK_ADJUST((int)stubs[n][6]+1),cc<0?2:cc);
if(cc<0)
emit_storereg(CCREG,2);
restore_regs(reglist);
emit_writeword(temp2,(int)&address);
save_regs(reglist);
-#ifndef PCSX
- ds=i_regs!=®s[i];
- real_rs=get_reg(i_regmap,rs1[i]);
- u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
- if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
- wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
- if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
-#endif
emit_shrimm(addr,16,1);
int cc=get_reg(i_regmap,CCREG);
if(cc<0) {
}
emit_movimm((u_int)readmem,0);
emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2);
-#ifndef PCSX
- // pagefault address
- emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3);
-#endif
emit_call((int)&indirect_jump_indexed);
restore_regs(reglist);
int do_dirty_stub(int i)
{
assem_debug("do_dirty_stub %x\n",start+i*4);
- u_int addr=(int)start<(int)0xC0000000?(u_int)source:(u_int)start;
- #ifdef PCSX
- addr=(u_int)source;
- #endif
+ u_int addr=(u_int)source;
// Careful about the code output here, verify_dirty needs to parse it.
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
emit_loadlp(addr,1);
emit_loadlp((int)copy,2);
emit_loadlp(slen*4,3);
void do_dirty_stub_ds()
{
// Careful about the code output here, verify_dirty needs to parse it.
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
emit_loadlp((int)start<(int)0xC0000000?(int)source:(int)start,1);
emit_loadlp((int)copy,2);
emit_loadlp(slen*4,3);
wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty);
if(regs[i].regmap_entry[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG);
emit_movimm(start+(i-ds)*4,EAX); // Get PC
- emit_addimm(HOST_CCREG,CLOCK_DIVIDER*ccadj[i],HOST_CCREG); // CHECK: is this right? There should probably be an extra cycle...
+ emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); // CHECK: is this right? There should probably be an extra cycle...
emit_jmp(ds?(int)fp_exception_ds:(int)fp_exception);
}
-/* TLB */
-
-int do_tlb_r(int s,int ar,int map,int x,int a,int shift,int c,u_int addr)
-{
- if(c) {
- if((signed int)addr>=(signed int)0xC0000000) {
- // address_generation already loaded the const
- emit_readword_dualindexedx4(FP,map,map);
- }
- else
- return -1; // No mapping
- }
- else {
- assert(s!=map);
- emit_movimm(((int)memory_map-(int)&dynarec_local)>>2,map);
- emit_addsr12(map,s,map);
- // Schedule this while we wait on the load
- //if(x) emit_xorimm(s,x,ar);
- if(shift>=0) emit_shlimm(s,3,shift);
- if(~a) emit_andimm(s,a,ar);
- emit_readword_dualindexedx4(FP,map,map);
- }
- return map;
-}
-int do_tlb_r_branch(int map, int c, u_int addr, int *jaddr)
-{
- if(!c||(signed int)addr>=(signed int)0xC0000000) {
- emit_test(map,map);
- *jaddr=(int)out;
- emit_js(0);
- }
- return map;
-}
-
-int gen_tlb_addr_r(int ar, int map) {
- if(map>=0) {
- assem_debug("add %s,%s,%s lsl #2\n",regname[ar],regname[ar],regname[map]);
- output_w32(0xe0800100|rd_rn_rm(ar,ar,map));
- }
-}
-
-int do_tlb_w(int s,int ar,int map,int x,int c,u_int addr)
-{
- if(c) {
- if(addr<0x80800000||addr>=0xC0000000) {
- // address_generation already loaded the const
- emit_readword_dualindexedx4(FP,map,map);
- }
- else
- return -1; // No mapping
- }
- else {
- assert(s!=map);
- emit_movimm(((int)memory_map-(int)&dynarec_local)>>2,map);
- emit_addsr12(map,s,map);
- // Schedule this while we wait on the load
- //if(x) emit_xorimm(s,x,ar);
- emit_readword_dualindexedx4(FP,map,map);
- }
- return map;
-}
-int do_tlb_w_branch(int map, int c, u_int addr, int *jaddr)
-{
- if(!c||addr<0x80800000||addr>=0xC0000000) {
- emit_testimm(map,0x40000000);
- *jaddr=(int)out;
- emit_jne(0);
- }
-}
-
-int gen_tlb_addr_w(int ar, int map) {
- if(map>=0) {
- assem_debug("add %s,%s,%s lsl #2\n",regname[ar],regname[ar],regname[map]);
- output_w32(0xe0800100|rd_rn_rm(ar,ar,map));
- }
-}
-
-// Generate the address of the memory_map entry, relative to dynarec_local
-generate_map_const(u_int addr,int reg) {
- //printf("generate_map_const(%x,%s)\n",addr,regname[reg]);
- emit_movimm((addr>>12)+(((u_int)memory_map-(u_int)&dynarec_local)>>2),reg);
-}
+static int do_tlb_r(int a, ...) { return 0; }
+static int do_tlb_r_branch(int a, ...) { return 0; }
+static int gen_tlb_addr_r(int a, ...) { return 0; }
+static int do_tlb_w(int a, ...) { return 0; }
+static int do_tlb_w_branch(int a, ...) { return 0; }
+static int gen_tlb_addr_w(int a, ...) { return 0; }
/* Special assem */
}
}
}
-#define shift_assemble shift_assemble_arm
-void loadlr_assemble_arm(int i,struct regstat *i_regs)
+static void speculate_mov(int rs,int rt)
{
- int s,th,tl,temp,temp2,addr,map=-1;
- int offset;
- int jaddr=0;
- int memtarget=0,c=0;
- u_int hr,reglist=0;
- th=get_reg(i_regs->regmap,rt1[i]|64);
- tl=get_reg(i_regs->regmap,rt1[i]);
- s=get_reg(i_regs->regmap,rs1[i]);
- temp=get_reg(i_regs->regmap,-1);
- temp2=get_reg(i_regs->regmap,FTEMP);
- addr=get_reg(i_regs->regmap,AGEN1+(i&1));
+ if(rt!=0) {
+ smrv_strong_next|=1<<rt;
+ smrv[rt]=smrv[rs];
+ }
+}
+
+static void speculate_mov_weak(int rs,int rt)
+{
+ if(rt!=0) {
+ smrv_weak_next|=1<<rt;
+ smrv[rt]=smrv[rs];
+ }
+}
+
+static void speculate_register_values(int i)
+{
+ if(i==0) {
+ memcpy(smrv,psxRegs.GPR.r,sizeof(smrv));
+ // gp,sp are likely to stay the same throughout the block
+ smrv_strong_next=(1<<28)|(1<<29)|(1<<30);
+ smrv_weak_next=~smrv_strong_next;
+ //printf(" llr %08x\n", smrv[4]);
+ }
+ smrv_strong=smrv_strong_next;
+ smrv_weak=smrv_weak_next;
+ switch(itype[i]) {
+ case ALU:
+ if ((smrv_strong>>rs1[i])&1) speculate_mov(rs1[i],rt1[i]);
+ else if((smrv_strong>>rs2[i])&1) speculate_mov(rs2[i],rt1[i]);
+ else if((smrv_weak>>rs1[i])&1) speculate_mov_weak(rs1[i],rt1[i]);
+ else if((smrv_weak>>rs2[i])&1) speculate_mov_weak(rs2[i],rt1[i]);
+ else {
+ smrv_strong_next&=~(1<<rt1[i]);
+ smrv_weak_next&=~(1<<rt1[i]);
+ }
+ break;
+ case SHIFTIMM:
+ smrv_strong_next&=~(1<<rt1[i]);
+ smrv_weak_next&=~(1<<rt1[i]);
+ // fallthrough
+ case IMM16:
+ if(rt1[i]&&is_const(®s[i],rt1[i])) {
+ int value,hr=get_reg(regs[i].regmap,rt1[i]);
+ if(hr>=0) {
+ if(get_final_value(hr,i,&value))
+ smrv[rt1[i]]=value;
+ else smrv[rt1[i]]=constmap[i][hr];
+ smrv_strong_next|=1<<rt1[i];
+ }
+ }
+ else {
+ if ((smrv_strong>>rs1[i])&1) speculate_mov(rs1[i],rt1[i]);
+ else if((smrv_weak>>rs1[i])&1) speculate_mov_weak(rs1[i],rt1[i]);
+ }
+ break;
+ case LOAD:
+ if(start<0x2000&&(rt1[i]==26||(smrv[rt1[i]]>>24)==0xa0)) {
+ // special case for BIOS
+ smrv[rt1[i]]=0xa0000000;
+ smrv_strong_next|=1<<rt1[i];
+ break;
+ }
+ // fallthrough
+ case SHIFT:
+ case LOADLR:
+ case MOV:
+ smrv_strong_next&=~(1<<rt1[i]);
+ smrv_weak_next&=~(1<<rt1[i]);
+ break;
+ case COP0:
+ case COP2:
+ if(opcode2[i]==0||opcode2[i]==2) { // MFC/CFC
+ smrv_strong_next&=~(1<<rt1[i]);
+ smrv_weak_next&=~(1<<rt1[i]);
+ }
+ break;
+ case C2LS:
+ if (opcode[i]==0x32) { // LWC2
+ smrv_strong_next&=~(1<<rt1[i]);
+ smrv_weak_next&=~(1<<rt1[i]);
+ }
+ break;
+ }
+#if 0
+ int r=4;
+ printf("x %08x %08x %d %d c %08x %08x\n",smrv[r],start+i*4,
+ ((smrv_strong>>r)&1),(smrv_weak>>r)&1,regs[i].isconst,regs[i].wasconst);
+#endif
+}
+
+enum {
+ MTYPE_8000 = 0,
+ MTYPE_8020,
+ MTYPE_0000,
+ MTYPE_A000,
+ MTYPE_1F80,
+};
+
+static int get_ptr_mem_type(u_int a)
+{
+ if(a < 0x00200000) {
+ if(a<0x1000&&((start>>20)==0xbfc||(start>>24)==0xa0))
+ // return wrong, must use memhandler for BIOS self-test to pass
+ // 007 does similar stuff from a00 mirror, weird stuff
+ return MTYPE_8000;
+ return MTYPE_0000;
+ }
+ if(0x1f800000 <= a && a < 0x1f801000)
+ return MTYPE_1F80;
+ if(0x80200000 <= a && a < 0x80800000)
+ return MTYPE_8020;
+ if(0xa0000000 <= a && a < 0xa0200000)
+ return MTYPE_A000;
+ return MTYPE_8000;
+}
+
+static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
+{
+ int jaddr,type=0;
+ int mr=rs1[i];
+ if(((smrv_strong|smrv_weak)>>mr)&1) {
+ type=get_ptr_mem_type(smrv[mr]);
+ //printf("set %08x @%08x r%d %d\n", smrv[mr], start+i*4, mr, type);
+ }
+ else {
+ // use the mirror we are running on
+ type=get_ptr_mem_type(start);
+ //printf("set nospec @%08x r%d %d\n", start+i*4, mr, type);
+ }
+
+ if(type==MTYPE_8020) { // RAM 80200000+ mirror
+ emit_andimm(addr,~0x00e00000,HOST_TEMPREG);
+ addr=*addr_reg_override=HOST_TEMPREG;
+ type=0;
+ }
+ else if(type==MTYPE_0000) { // RAM 0 mirror
+ emit_orimm(addr,0x80000000,HOST_TEMPREG);
+ addr=*addr_reg_override=HOST_TEMPREG;
+ type=0;
+ }
+ else if(type==MTYPE_A000) { // RAM A mirror
+ emit_andimm(addr,~0x20000000,HOST_TEMPREG);
+ addr=*addr_reg_override=HOST_TEMPREG;
+ type=0;
+ }
+ else if(type==MTYPE_1F80) { // scratchpad
+ if (psxH == (void *)0x1f800000) {
+ emit_addimm(addr,-0x1f800000,HOST_TEMPREG);
+ emit_cmpimm(HOST_TEMPREG,0x1000);
+ jaddr=(int)out;
+ emit_jc(0);
+ }
+ else {
+ // do usual RAM check, jump will go to the right handler
+ type=0;
+ }
+ }
+
+ if(type==0)
+ {
+ emit_cmpimm(addr,RAM_SIZE);
+ jaddr=(int)out;
+ #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
+ // Hint to branch predictor that the branch is unlikely to be taken
+ if(rs1[i]>=28)
+ emit_jno_unlikely(0);
+ else
+ #endif
+ emit_jno(0);
+ if(ram_offset!=0) {
+ emit_addimm(addr,ram_offset,HOST_TEMPREG);
+ addr=*addr_reg_override=HOST_TEMPREG;
+ }
+ }
+
+ return jaddr;
+}
+
+#define shift_assemble shift_assemble_arm
+
+void loadlr_assemble_arm(int i,struct regstat *i_regs)
+{
+ int s,th,tl,temp,temp2,addr,map=-1;
+ int offset;
+ int jaddr=0;
+ int memtarget=0,c=0;
+ int fastload_reg_override=0;
+ u_int hr,reglist=0;
+ th=get_reg(i_regs->regmap,rt1[i]|64);
+ tl=get_reg(i_regs->regmap,rt1[i]);
+ s=get_reg(i_regs->regmap,rs1[i]);
+ temp=get_reg(i_regs->regmap,-1);
+ temp2=get_reg(i_regs->regmap,FTEMP);
+ addr=get_reg(i_regs->regmap,AGEN1+(i&1));
assert(addr<0);
offset=imm[i];
for(hr=0;hr<HOST_REGS;hr++) {
}else{
emit_andimm(addr,0xFFFFFFF8,temp2); // LDL/LDR
}
- emit_cmpimm(addr,RAM_SIZE);
- jaddr=(int)out;
- emit_jno(0);
+ jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
}
else {
+ if(ram_offset&&memtarget) {
+ emit_addimm(temp2,ram_offset,HOST_TEMPREG);
+ fastload_reg_override=HOST_TEMPREG;
+ }
if (opcode[i]==0x22||opcode[i]==0x26) {
emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
}else{
map=get_reg(i_regs->regmap,TLREG);
assert(map>=0);
reglist&=~(1<<map);
- map=do_tlb_r(addr,temp2,map,0,a,c?-1:temp,c,constmap[i][s]+offset);
if(c) {
if (opcode[i]==0x22||opcode[i]==0x26) {
emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
emit_movimm(((constmap[i][s]+offset)<<3)&56,temp); // LDL/LDR
}
}
- do_tlb_r_branch(map,c,constmap[i][s]+offset,&jaddr);
}
if (opcode[i]==0x22||opcode[i]==0x26) { // LWL/LWR
if(!c||memtarget) {
+ int a=temp2;
+ if(fastload_reg_override) a=fastload_reg_override;
//emit_readword_indexed((int)rdram-0x80000000,temp2,temp2);
- emit_readword_indexed_tlb(0,temp2,map,temp2);
+ emit_readword_indexed_tlb(0,a,map,temp2);
if(jaddr) add_stub(LOADW_STUB,jaddr,(int)out,i,temp2,(int)i_regs,ccadj[i],reglist);
}
else
//emit_storereg(rt1[i],tl); // DEBUG
}
if (opcode[i]==0x1A||opcode[i]==0x1B) { // LDL/LDR
- // FIXME: little endian
+ // FIXME: little endian, fastload_reg_override
int temp2h=get_reg(i_regs->regmap,FTEMP|64);
if(!c||memtarget) {
//if(th>=0) emit_readword_indexed((int)rdram-0x80000000,temp2,temp2h);
char copr=(source[i]>>11)&0x1f;
//assert(t>=0); // Why does this happen? OOT is weird
if(t>=0&&rt1[i]!=0) {
-#ifdef MUPEN64
- emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0);
- emit_movimm((source[i]>>11)&0x1f,1);
- emit_writeword(0,(int)&PC);
- emit_writebyte(1,(int)&(fake_pc.f.r.nrd));
- if(copr==9) {
- emit_readword((int)&last_count,ECX);
- emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
- emit_add(HOST_CCREG,ECX,HOST_CCREG);
- emit_addimm(HOST_CCREG,CLOCK_DIVIDER*ccadj[i],HOST_CCREG);
- emit_writeword(HOST_CCREG,(int)&Count);
- }
- emit_call((int)MFC0);
- emit_readword((int)&readmem_dword,t);
-#else
emit_readword((int)®_cop0+copr*4,t);
-#endif
}
}
else if(opcode2[i]==4) // MTC0
signed char s=get_reg(i_regs->regmap,rs1[i]);
char copr=(source[i]>>11)&0x1f;
assert(s>=0);
- emit_writeword(s,(int)&readmem_dword);
wb_register(rs1[i],i_regs->regmap,i_regs->dirty,i_regs->is32);
-#ifdef MUPEN64
- emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0);
- emit_movimm((source[i]>>11)&0x1f,1);
- emit_writeword(0,(int)&PC);
- emit_writebyte(1,(int)&(fake_pc.f.r.nrd));
-#endif
if(copr==9||copr==11||copr==12||copr==13) {
- emit_readword((int)&last_count,ECX);
+ emit_readword((int)&last_count,HOST_TEMPREG);
emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
- emit_add(HOST_CCREG,ECX,HOST_CCREG);
- emit_addimm(HOST_CCREG,CLOCK_DIVIDER*ccadj[i],HOST_CCREG);
+ emit_add(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
+ emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
emit_writeword(HOST_CCREG,(int)&Count);
}
// What a mess. The status register (12) can enable interrupts,
// The interrupt must be taken immediately, because a subsequent
// instruction might disable interrupts again.
if(copr==12||copr==13) {
-#ifdef PCSX
if (is_delayslot) {
// burn cycles to cause cc_interrupt, which will
// reschedule next_interupt. Relies on CCREG from above.
emit_writeword(HOST_CCREG,(int)&last_count);
emit_movimm(0,HOST_CCREG);
emit_storereg(CCREG,HOST_CCREG);
+ emit_loadreg(rs1[i],1);
emit_movimm(copr,0);
emit_call((int)pcsx_mtc0_ds);
+ emit_loadreg(rs1[i],s);
return;
}
-#endif
- emit_movimm(start+i*4+4,0);
- emit_movimm(0,1);
- emit_writeword(0,(int)&pcaddr);
- emit_writeword(1,(int)&pending_exception);
+ emit_movimm(start+i*4+4,HOST_TEMPREG);
+ emit_writeword(HOST_TEMPREG,(int)&pcaddr);
+ emit_movimm(0,HOST_TEMPREG);
+ emit_writeword(HOST_TEMPREG,(int)&pending_exception);
}
//else if(copr==12&&is_delayslot) emit_call((int)MTC0_R12);
//else
-#ifdef PCSX
+ if(s==HOST_CCREG)
+ emit_loadreg(rs1[i],1);
+ else if(s!=1)
+ emit_mov(s,1);
emit_movimm(copr,0);
emit_call((int)pcsx_mtc0);
-#else
- emit_call((int)MTC0);
-#endif
if(copr==9||copr==11||copr==12||copr==13) {
emit_readword((int)&Count,HOST_CCREG);
- emit_readword((int)&next_interupt,ECX);
- emit_addimm(HOST_CCREG,-CLOCK_DIVIDER*ccadj[i],HOST_CCREG);
- emit_sub(HOST_CCREG,ECX,HOST_CCREG);
- emit_writeword(ECX,(int)&last_count);
+ emit_readword((int)&next_interupt,HOST_TEMPREG);
+ emit_addimm(HOST_CCREG,-CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
+ emit_sub(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
+ emit_writeword(HOST_TEMPREG,(int)&last_count);
emit_storereg(CCREG,HOST_CCREG);
}
if(copr==12||copr==13) {
assert(!is_delayslot);
emit_readword((int)&pending_exception,14);
+ emit_test(14,14);
+ emit_jne((int)&do_interrupt);
}
emit_loadreg(rs1[i],s);
if(get_reg(i_regs->regmap,rs1[i]|64)>=0)
emit_loadreg(rs1[i]|64,get_reg(i_regs->regmap,rs1[i]|64));
- if(copr==12||copr==13) {
- emit_test(14,14);
- emit_jne((int)&do_interrupt);
- }
cop1_usable=0;
}
else
{
assert(opcode2[i]==0x10);
-#ifndef DISABLE_TLB
- if((source[i]&0x3f)==0x01) // TLBR
- emit_call((int)TLBR);
- if((source[i]&0x3f)==0x02) // TLBWI
- emit_call((int)TLBWI_new);
- if((source[i]&0x3f)==0x06) { // TLBWR
- // The TLB entry written by TLBWR is dependent on the count,
- // so update the cycle count
- emit_readword((int)&last_count,ECX);
- if(i_regs->regmap[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG);
- emit_add(HOST_CCREG,ECX,HOST_CCREG);
- emit_addimm(HOST_CCREG,CLOCK_DIVIDER*ccadj[i],HOST_CCREG);
- emit_writeword(HOST_CCREG,(int)&Count);
- emit_call((int)TLBWR_new);
- }
- if((source[i]&0x3f)==0x08) // TLBP
- emit_call((int)TLBP);
-#endif
-#ifdef PCSX
if((source[i]&0x3f)==0x10) // RFE
{
emit_readword((int)&Status,0);
emit_orrshr_imm(1,2,0);
emit_writeword(0,(int)&Status);
}
-#else
- if((source[i]&0x3f)==0x18) // ERET
- {
- int count=ccadj[i];
- if(i_regs->regmap[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG);
- emit_addimm(HOST_CCREG,CLOCK_DIVIDER*count,HOST_CCREG); // TODO: Should there be an extra cycle here?
- emit_jmp((int)jump_eret);
- }
-#endif
}
}
case 30:
emit_movs(sl,temp);
emit_mvnmi(temp,temp);
+#ifdef HAVE_ARMV5
emit_clz(temp,temp);
+#else
+ emit_movs(temp,HOST_TEMPREG);
+ emit_movimm(0,temp);
+ emit_jeq((int)out+4*4);
+ emit_addpl_imm(temp,1,temp);
+ emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
+ emit_jns((int)out-2*4);
+#endif
emit_writeword(sl,(int)®_cop2d[30]);
emit_writeword(temp,(int)®_cop2d[31]);
break;
}
}
-void c2op_assemble(int i,struct regstat *i_regs)
+static void c2op_prologue(u_int op,u_int reglist)
+{
+ save_regs_all(reglist);
+#ifdef PCNT
+ emit_movimm(op,0);
+ emit_call((int)pcnt_gte_start);
+#endif
+ emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs
+}
+
+static void c2op_epilogue(u_int op,u_int reglist)
+{
+#ifdef PCNT
+ emit_movimm(op,0);
+ emit_call((int)pcnt_gte_end);
+#endif
+ restore_regs_all(reglist);
+}
+
+static void c2op_call_MACtoIR(int lm,int need_flags)
+{
+ if(need_flags)
+ emit_call((int)(lm?gteMACtoIR_lm1:gteMACtoIR_lm0));
+ else
+ emit_call((int)(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf));
+}
+
+static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
+{
+ emit_call((int)func);
+ // func is C code and trashes r0
+ emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
+ if(need_flags||need_ir)
+ c2op_call_MACtoIR(lm,need_flags);
+ emit_call((int)(need_flags?gteMACtoRGB:gteMACtoRGB_nf));
+}
+
+static void c2op_assemble(int i,struct regstat *i_regs)
{
signed char temp=get_reg(i_regs->regmap,-1);
u_int c2op=source[i]&0x3f;
- u_int hr,reglist=0;
- int need_flags;
+ u_int hr,reglist_full=0,reglist;
+ int need_flags,need_ir;
for(hr=0;hr<HOST_REGS;hr++) {
- if(i_regs->regmap[hr]>=0) reglist|=1<<hr;
+ if(i_regs->regmap[hr]>=0) reglist_full|=1<<hr;
}
- if(i==0||itype[i-1]!=C2OP)
- save_regs(reglist);
+ reglist=reglist_full&CALLER_SAVE_REGS;
if (gte_handlers[c2op]!=NULL) {
- int cc=get_reg(i_regs->regmap,CCREG);
- emit_movimm(source[i],1); // opcode
- if (cc>=0&>e_cycletab[c2op])
- emit_addimm(cc,gte_cycletab[c2op]/2,cc); // XXX: could just adjust ccadj?
- emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs
- emit_writeword(1,(int)&psxRegs.code);
need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
- assem_debug("gte unneeded %016llx, need_flags %d\n",gte_unneeded[i+1],need_flags);
-#ifdef ARMv5_ONLY
- // let's take more risk here
- need_flags=need_flags&>e_reads_flags;
+ need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
+ assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
+ source[i],gte_unneeded[i+1],need_flags,need_ir);
+ if(new_dynarec_hacks&NDHACK_GTE_NO_FLAGS)
+ need_flags=0;
+ int shift = (source[i] >> 19) & 1;
+ int lm = (source[i] >> 10) & 1;
+ switch(c2op) {
+#ifndef DRC_DBG
+ case GTE_MVMVA: {
+#ifdef HAVE_ARMV5
+ int v = (source[i] >> 15) & 3;
+ int cv = (source[i] >> 13) & 3;
+ int mx = (source[i] >> 17) & 3;
+ reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
+ c2op_prologue(c2op,reglist);
+ /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
+ if(v<3)
+ emit_ldrd(v*8,0,4);
+ else {
+ emit_movzwl_indexed(9*4,0,4); // gteIR
+ emit_movzwl_indexed(10*4,0,6);
+ emit_movzwl_indexed(11*4,0,5);
+ emit_orrshl_imm(6,16,4);
+ }
+ if(mx<3)
+ emit_addimm(0,32*4+mx*8*4,6);
+ else
+ emit_readword((int)&zeromem_ptr,6);
+ if(cv<3)
+ emit_addimm(0,32*4+(cv*8+5)*4,7);
+ else
+ emit_readword((int)&zeromem_ptr,7);
+#ifdef __ARM_NEON__
+ emit_movimm(source[i],1); // opcode
+ emit_call((int)gteMVMVA_part_neon);
+ if(need_flags) {
+ emit_movimm(lm,1);
+ emit_call((int)gteMACtoIR_flags_neon);
+ }
+#else
+ if(cv==3&&shift)
+ emit_call((int)gteMVMVA_part_cv3sh12_arm);
+ else {
+ emit_movimm(shift,1);
+ emit_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
+ }
+ if(need_flags||need_ir)
+ c2op_call_MACtoIR(lm,need_flags);
+#endif
+#else /* if not HAVE_ARMV5 */
+ c2op_prologue(c2op,reglist);
+ emit_movimm(source[i],1); // opcode
+ emit_writeword(1,(int)&psxRegs.code);
+ emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
+#endif
+ break;
+ }
+ case GTE_OP:
+ c2op_prologue(c2op,reglist);
+ emit_call((int)(shift?gteOP_part_shift:gteOP_part_noshift));
+ if(need_flags||need_ir) {
+ emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
+ c2op_call_MACtoIR(lm,need_flags);
+ }
+ break;
+ case GTE_DPCS:
+ c2op_prologue(c2op,reglist);
+ c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
+ break;
+ case GTE_INTPL:
+ c2op_prologue(c2op,reglist);
+ c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
+ break;
+ case GTE_SQR:
+ c2op_prologue(c2op,reglist);
+ emit_call((int)(shift?gteSQR_part_shift:gteSQR_part_noshift));
+ if(need_flags||need_ir) {
+ emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
+ c2op_call_MACtoIR(lm,need_flags);
+ }
+ break;
+ case GTE_DCPL:
+ c2op_prologue(c2op,reglist);
+ c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
+ break;
+ case GTE_GPF:
+ c2op_prologue(c2op,reglist);
+ c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
+ break;
+ case GTE_GPL:
+ c2op_prologue(c2op,reglist);
+ c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
+ break;
+#endif
+ default:
+ c2op_prologue(c2op,reglist);
+#ifdef DRC_DBG
+ emit_movimm(source[i],1); // opcode
+ emit_writeword(1,(int)&psxRegs.code);
#endif
- emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
+ emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
+ break;
+ }
+ c2op_epilogue(c2op,reglist);
}
-
- if(i>=slen-1||itype[i+1]!=C2OP)
- restore_regs(reglist);
}
void cop1_unusable(int i,struct regstat *i_regs)
void cop1_assemble(int i,struct regstat *i_regs)
{
-#ifndef DISABLE_COP1
- // Check cop1 unusable
- if(!cop1_usable) {
- signed char rs=get_reg(i_regs->regmap,CSREG);
- assert(rs>=0);
- emit_testimm(rs,0x20000000);
- int jaddr=(int)out;
- emit_jeq(0);
- add_stub(FP_STUB,jaddr,(int)out,i,rs,(int)i_regs,is_delayslot,0);
- cop1_usable=1;
- }
- if (opcode2[i]==0) { // MFC1
- signed char tl=get_reg(i_regs->regmap,rt1[i]);
- if(tl>=0) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],tl);
- emit_readword_indexed(0,tl,tl);
- }
- }
- else if (opcode2[i]==1) { // DMFC1
- signed char tl=get_reg(i_regs->regmap,rt1[i]);
- signed char th=get_reg(i_regs->regmap,rt1[i]|64);
- if(tl>=0) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],tl);
- if(th>=0) emit_readword_indexed(4,tl,th);
- emit_readword_indexed(0,tl,tl);
- }
- }
- else if (opcode2[i]==4) { // MTC1
- signed char sl=get_reg(i_regs->regmap,rs1[i]);
- signed char temp=get_reg(i_regs->regmap,-1);
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- emit_writeword_indexed(sl,0,temp);
- }
- else if (opcode2[i]==5) { // DMTC1
- signed char sl=get_reg(i_regs->regmap,rs1[i]);
- signed char sh=rs1[i]>0?get_reg(i_regs->regmap,rs1[i]|64):sl;
- signed char temp=get_reg(i_regs->regmap,-1);
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp);
- emit_writeword_indexed(sh,4,temp);
- emit_writeword_indexed(sl,0,temp);
- }
- else if (opcode2[i]==2) // CFC1
- {
- signed char tl=get_reg(i_regs->regmap,rt1[i]);
- if(tl>=0) {
- u_int copr=(source[i]>>11)&0x1f;
- if(copr==0) emit_readword((int)&FCR0,tl);
- if(copr==31) emit_readword((int)&FCR31,tl);
- }
- }
- else if (opcode2[i]==6) // CTC1
- {
- signed char sl=get_reg(i_regs->regmap,rs1[i]);
- u_int copr=(source[i]>>11)&0x1f;
- assert(sl>=0);
- if(copr==31)
- {
- emit_writeword(sl,(int)&FCR31);
- // Set the rounding mode
- //FIXME
- //char temp=get_reg(i_regs->regmap,-1);
- //emit_andimm(sl,3,temp);
- //emit_fldcw_indexed((int)&rounding_modes,temp);
- }
- }
-#else
cop1_unusable(i, i_regs);
-#endif
}
void fconv_assemble_arm(int i,struct regstat *i_regs)
{
-#ifndef DISABLE_COP1
- signed char temp=get_reg(i_regs->regmap,-1);
- assert(temp>=0);
- // Check cop1 unusable
- if(!cop1_usable) {
- signed char rs=get_reg(i_regs->regmap,CSREG);
- assert(rs>=0);
- emit_testimm(rs,0x20000000);
- int jaddr=(int)out;
- emit_jeq(0);
- add_stub(FP_STUB,jaddr,(int)out,i,rs,(int)i_regs,is_delayslot,0);
- cop1_usable=1;
- }
-
- #if(defined(__VFP_FP__) && !defined(__SOFTFP__))
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0d) { // trunc_w_s
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- emit_flds(temp,15);
- emit_ftosizs(15,15); // float->int, truncate
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f))
- emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp);
- emit_fsts(15,temp);
- return;
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0d) { // trunc_w_d
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp);
- emit_vldr(temp,7);
- emit_ftosizd(7,13); // double->int, truncate
- emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp);
- emit_fsts(13,temp);
- return;
- }
-
- if(opcode2[i]==0x14&&(source[i]&0x3f)==0x20) { // cvt_s_w
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- emit_flds(temp,13);
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f))
- emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp);
- emit_fsitos(13,15);
- emit_fsts(15,temp);
- return;
- }
- if(opcode2[i]==0x14&&(source[i]&0x3f)==0x21) { // cvt_d_w
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- emit_flds(temp,13);
- emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp);
- emit_fsitod(13,7);
- emit_vstr(7,temp);
- return;
- }
-
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x21) { // cvt_d_s
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- emit_flds(temp,13);
- emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp);
- emit_fcvtds(13,7);
- emit_vstr(7,temp);
- return;
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x20) { // cvt_s_d
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp);
- emit_vldr(temp,7);
- emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp);
- emit_fcvtsd(7,13);
- emit_fsts(13,temp);
- return;
- }
- #endif
-
- // C emulation code
-
- u_int hr,reglist=0;
- for(hr=0;hr<HOST_REGS;hr++) {
- if(i_regs->regmap[hr]>=0) reglist|=1<<hr;
- }
- save_regs(reglist);
-
- if(opcode2[i]==0x14&&(source[i]&0x3f)==0x20) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_s_w);
- }
- if(opcode2[i]==0x14&&(source[i]&0x3f)==0x21) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_d_w);
- }
- if(opcode2[i]==0x15&&(source[i]&0x3f)==0x20) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_s_l);
- }
- if(opcode2[i]==0x15&&(source[i]&0x3f)==0x21) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_d_l);
- }
-
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x21) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_d_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x24) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_w_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x25) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_l_s);
- }
-
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x20) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_s_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x24) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_w_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x25) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)cvt_l_d);
- }
-
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x08) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)round_l_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x09) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)trunc_l_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0a) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)ceil_l_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0b) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)floor_l_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0c) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)round_w_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0d) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)trunc_w_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0e) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)ceil_w_s);
- }
- if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0f) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)floor_w_s);
- }
-
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x08) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)round_l_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x09) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)trunc_l_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0a) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)ceil_l_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0b) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)floor_l_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0c) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)round_w_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0d) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)trunc_w_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0e) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)ceil_w_d);
- }
- if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0f) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- emit_call((int)floor_w_d);
- }
-
- restore_regs(reglist);
-#else
cop1_unusable(i, i_regs);
-#endif
}
#define fconv_assemble fconv_assemble_arm
void fcomp_assemble(int i,struct regstat *i_regs)
{
-#ifndef DISABLE_COP1
- signed char fs=get_reg(i_regs->regmap,FSREG);
- signed char temp=get_reg(i_regs->regmap,-1);
- assert(temp>=0);
- // Check cop1 unusable
- if(!cop1_usable) {
- signed char cs=get_reg(i_regs->regmap,CSREG);
- assert(cs>=0);
- emit_testimm(cs,0x20000000);
- int jaddr=(int)out;
- emit_jeq(0);
- add_stub(FP_STUB,jaddr,(int)out,i,cs,(int)i_regs,is_delayslot,0);
- cop1_usable=1;
- }
-
- if((source[i]&0x3f)==0x30) {
- emit_andimm(fs,~0x800000,fs);
- return;
- }
-
- if((source[i]&0x3e)==0x38) {
- // sf/ngle - these should throw exceptions for NaNs
- emit_andimm(fs,~0x800000,fs);
- return;
- }
-
- #if(defined(__VFP_FP__) && !defined(__SOFTFP__))
- if(opcode2[i]==0x10) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],HOST_TEMPREG);
- emit_orimm(fs,0x800000,fs);
- emit_flds(temp,14);
- emit_flds(HOST_TEMPREG,15);
- emit_fcmps(14,15);
- emit_fmstat();
- if((source[i]&0x3f)==0x31) emit_bicvc_imm(fs,0x800000,fs); // c_un_s
- if((source[i]&0x3f)==0x32) emit_bicne_imm(fs,0x800000,fs); // c_eq_s
- if((source[i]&0x3f)==0x33) {emit_bicne_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ueq_s
- if((source[i]&0x3f)==0x34) emit_biccs_imm(fs,0x800000,fs); // c_olt_s
- if((source[i]&0x3f)==0x35) {emit_biccs_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ult_s
- if((source[i]&0x3f)==0x36) emit_bichi_imm(fs,0x800000,fs); // c_ole_s
- if((source[i]&0x3f)==0x37) {emit_bichi_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ule_s
- if((source[i]&0x3f)==0x3a) emit_bicne_imm(fs,0x800000,fs); // c_seq_s
- if((source[i]&0x3f)==0x3b) emit_bicne_imm(fs,0x800000,fs); // c_ngl_s
- if((source[i]&0x3f)==0x3c) emit_biccs_imm(fs,0x800000,fs); // c_lt_s
- if((source[i]&0x3f)==0x3d) emit_biccs_imm(fs,0x800000,fs); // c_nge_s
- if((source[i]&0x3f)==0x3e) emit_bichi_imm(fs,0x800000,fs); // c_le_s
- if((source[i]&0x3f)==0x3f) emit_bichi_imm(fs,0x800000,fs); // c_ngt_s
- return;
- }
- if(opcode2[i]==0x11) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp);
- emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],HOST_TEMPREG);
- emit_orimm(fs,0x800000,fs);
- emit_vldr(temp,6);
- emit_vldr(HOST_TEMPREG,7);
- emit_fcmpd(6,7);
- emit_fmstat();
- if((source[i]&0x3f)==0x31) emit_bicvc_imm(fs,0x800000,fs); // c_un_d
- if((source[i]&0x3f)==0x32) emit_bicne_imm(fs,0x800000,fs); // c_eq_d
- if((source[i]&0x3f)==0x33) {emit_bicne_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ueq_d
- if((source[i]&0x3f)==0x34) emit_biccs_imm(fs,0x800000,fs); // c_olt_d
- if((source[i]&0x3f)==0x35) {emit_biccs_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ult_d
- if((source[i]&0x3f)==0x36) emit_bichi_imm(fs,0x800000,fs); // c_ole_d
- if((source[i]&0x3f)==0x37) {emit_bichi_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ule_d
- if((source[i]&0x3f)==0x3a) emit_bicne_imm(fs,0x800000,fs); // c_seq_d
- if((source[i]&0x3f)==0x3b) emit_bicne_imm(fs,0x800000,fs); // c_ngl_d
- if((source[i]&0x3f)==0x3c) emit_biccs_imm(fs,0x800000,fs); // c_lt_d
- if((source[i]&0x3f)==0x3d) emit_biccs_imm(fs,0x800000,fs); // c_nge_d
- if((source[i]&0x3f)==0x3e) emit_bichi_imm(fs,0x800000,fs); // c_le_d
- if((source[i]&0x3f)==0x3f) emit_bichi_imm(fs,0x800000,fs); // c_ngt_d
- return;
- }
- #endif
-
- // C only
-
- u_int hr,reglist=0;
- for(hr=0;hr<HOST_REGS;hr++) {
- if(i_regs->regmap[hr]>=0) reglist|=1<<hr;
- }
- reglist&=~(1<<fs);
- save_regs(reglist);
- if(opcode2[i]==0x10) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],ARG2_REG);
- if((source[i]&0x3f)==0x30) emit_call((int)c_f_s);
- if((source[i]&0x3f)==0x31) emit_call((int)c_un_s);
- if((source[i]&0x3f)==0x32) emit_call((int)c_eq_s);
- if((source[i]&0x3f)==0x33) emit_call((int)c_ueq_s);
- if((source[i]&0x3f)==0x34) emit_call((int)c_olt_s);
- if((source[i]&0x3f)==0x35) emit_call((int)c_ult_s);
- if((source[i]&0x3f)==0x36) emit_call((int)c_ole_s);
- if((source[i]&0x3f)==0x37) emit_call((int)c_ule_s);
- if((source[i]&0x3f)==0x38) emit_call((int)c_sf_s);
- if((source[i]&0x3f)==0x39) emit_call((int)c_ngle_s);
- if((source[i]&0x3f)==0x3a) emit_call((int)c_seq_s);
- if((source[i]&0x3f)==0x3b) emit_call((int)c_ngl_s);
- if((source[i]&0x3f)==0x3c) emit_call((int)c_lt_s);
- if((source[i]&0x3f)==0x3d) emit_call((int)c_nge_s);
- if((source[i]&0x3f)==0x3e) emit_call((int)c_le_s);
- if((source[i]&0x3f)==0x3f) emit_call((int)c_ngt_s);
- }
- if(opcode2[i]==0x11) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],ARG2_REG);
- if((source[i]&0x3f)==0x30) emit_call((int)c_f_d);
- if((source[i]&0x3f)==0x31) emit_call((int)c_un_d);
- if((source[i]&0x3f)==0x32) emit_call((int)c_eq_d);
- if((source[i]&0x3f)==0x33) emit_call((int)c_ueq_d);
- if((source[i]&0x3f)==0x34) emit_call((int)c_olt_d);
- if((source[i]&0x3f)==0x35) emit_call((int)c_ult_d);
- if((source[i]&0x3f)==0x36) emit_call((int)c_ole_d);
- if((source[i]&0x3f)==0x37) emit_call((int)c_ule_d);
- if((source[i]&0x3f)==0x38) emit_call((int)c_sf_d);
- if((source[i]&0x3f)==0x39) emit_call((int)c_ngle_d);
- if((source[i]&0x3f)==0x3a) emit_call((int)c_seq_d);
- if((source[i]&0x3f)==0x3b) emit_call((int)c_ngl_d);
- if((source[i]&0x3f)==0x3c) emit_call((int)c_lt_d);
- if((source[i]&0x3f)==0x3d) emit_call((int)c_nge_d);
- if((source[i]&0x3f)==0x3e) emit_call((int)c_le_d);
- if((source[i]&0x3f)==0x3f) emit_call((int)c_ngt_d);
- }
- restore_regs(reglist);
- emit_loadreg(FSREG,fs);
-#else
cop1_unusable(i, i_regs);
-#endif
}
void float_assemble(int i,struct regstat *i_regs)
{
-#ifndef DISABLE_COP1
- signed char temp=get_reg(i_regs->regmap,-1);
- assert(temp>=0);
- // Check cop1 unusable
- if(!cop1_usable) {
- signed char cs=get_reg(i_regs->regmap,CSREG);
- assert(cs>=0);
- emit_testimm(cs,0x20000000);
- int jaddr=(int)out;
- emit_jeq(0);
- add_stub(FP_STUB,jaddr,(int)out,i,cs,(int)i_regs,is_delayslot,0);
- cop1_usable=1;
- }
-
- #if(defined(__VFP_FP__) && !defined(__SOFTFP__))
- if((source[i]&0x3f)==6) // mov
- {
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) {
- if(opcode2[i]==0x10) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],HOST_TEMPREG);
- emit_readword_indexed(0,temp,temp);
- emit_writeword_indexed(temp,0,HOST_TEMPREG);
- }
- if(opcode2[i]==0x11) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp);
- emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],HOST_TEMPREG);
- emit_vldr(temp,7);
- emit_vstr(7,HOST_TEMPREG);
- }
- }
- return;
- }
-
- if((source[i]&0x3f)>3)
- {
- if(opcode2[i]==0x10) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- emit_flds(temp,15);
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) {
- emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp);
- }
- if((source[i]&0x3f)==4) // sqrt
- emit_fsqrts(15,15);
- if((source[i]&0x3f)==5) // abs
- emit_fabss(15,15);
- if((source[i]&0x3f)==7) // neg
- emit_fnegs(15,15);
- emit_fsts(15,temp);
- }
- if(opcode2[i]==0x11) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp);
- emit_vldr(temp,7);
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) {
- emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp);
- }
- if((source[i]&0x3f)==4) // sqrt
- emit_fsqrtd(7,7);
- if((source[i]&0x3f)==5) // abs
- emit_fabsd(7,7);
- if((source[i]&0x3f)==7) // neg
- emit_fnegd(7,7);
- emit_vstr(7,temp);
- }
- return;
- }
- if((source[i]&0x3f)<4)
- {
- if(opcode2[i]==0x10) {
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp);
- }
- if(opcode2[i]==0x11) {
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp);
- }
- if(((source[i]>>11)&0x1f)!=((source[i]>>16)&0x1f)) {
- if(opcode2[i]==0x10) {
- emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],HOST_TEMPREG);
- emit_flds(temp,15);
- emit_flds(HOST_TEMPREG,13);
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) {
- if(((source[i]>>16)&0x1f)!=((source[i]>>6)&0x1f)) {
- emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp);
- }
- }
- if((source[i]&0x3f)==0) emit_fadds(15,13,15);
- if((source[i]&0x3f)==1) emit_fsubs(15,13,15);
- if((source[i]&0x3f)==2) emit_fmuls(15,13,15);
- if((source[i]&0x3f)==3) emit_fdivs(15,13,15);
- if(((source[i]>>16)&0x1f)==((source[i]>>6)&0x1f)) {
- emit_fsts(15,HOST_TEMPREG);
- }else{
- emit_fsts(15,temp);
- }
- }
- else if(opcode2[i]==0x11) {
- emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],HOST_TEMPREG);
- emit_vldr(temp,7);
- emit_vldr(HOST_TEMPREG,6);
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) {
- if(((source[i]>>16)&0x1f)!=((source[i]>>6)&0x1f)) {
- emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp);
- }
- }
- if((source[i]&0x3f)==0) emit_faddd(7,6,7);
- if((source[i]&0x3f)==1) emit_fsubd(7,6,7);
- if((source[i]&0x3f)==2) emit_fmuld(7,6,7);
- if((source[i]&0x3f)==3) emit_fdivd(7,6,7);
- if(((source[i]>>16)&0x1f)==((source[i]>>6)&0x1f)) {
- emit_vstr(7,HOST_TEMPREG);
- }else{
- emit_vstr(7,temp);
- }
- }
- }
- else {
- if(opcode2[i]==0x10) {
- emit_flds(temp,15);
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) {
- emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp);
- }
- if((source[i]&0x3f)==0) emit_fadds(15,15,15);
- if((source[i]&0x3f)==1) emit_fsubs(15,15,15);
- if((source[i]&0x3f)==2) emit_fmuls(15,15,15);
- if((source[i]&0x3f)==3) emit_fdivs(15,15,15);
- emit_fsts(15,temp);
- }
- else if(opcode2[i]==0x11) {
- emit_vldr(temp,7);
- if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) {
- emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp);
- }
- if((source[i]&0x3f)==0) emit_faddd(7,7,7);
- if((source[i]&0x3f)==1) emit_fsubd(7,7,7);
- if((source[i]&0x3f)==2) emit_fmuld(7,7,7);
- if((source[i]&0x3f)==3) emit_fdivd(7,7,7);
- emit_vstr(7,temp);
- }
- }
- return;
- }
- #endif
-
- u_int hr,reglist=0;
- for(hr=0;hr<HOST_REGS;hr++) {
- if(i_regs->regmap[hr]>=0) reglist|=1<<hr;
- }
- if(opcode2[i]==0x10) { // Single precision
- save_regs(reglist);
- emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG);
- if((source[i]&0x3f)<4) {
- emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],ARG2_REG);
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG3_REG);
- }else{
- emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG);
- }
- switch(source[i]&0x3f)
- {
- case 0x00: emit_call((int)add_s);break;
- case 0x01: emit_call((int)sub_s);break;
- case 0x02: emit_call((int)mul_s);break;
- case 0x03: emit_call((int)div_s);break;
- case 0x04: emit_call((int)sqrt_s);break;
- case 0x05: emit_call((int)abs_s);break;
- case 0x06: emit_call((int)mov_s);break;
- case 0x07: emit_call((int)neg_s);break;
- }
- restore_regs(reglist);
- }
- if(opcode2[i]==0x11) { // Double precision
- save_regs(reglist);
- emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG);
- if((source[i]&0x3f)<4) {
- emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],ARG2_REG);
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG3_REG);
- }else{
- emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG);
- }
- switch(source[i]&0x3f)
- {
- case 0x00: emit_call((int)add_d);break;
- case 0x01: emit_call((int)sub_d);break;
- case 0x02: emit_call((int)mul_d);break;
- case 0x03: emit_call((int)div_d);break;
- case 0x04: emit_call((int)sqrt_d);break;
- case 0x05: emit_call((int)abs_d);break;
- case 0x06: emit_call((int)mov_d);break;
- case 0x07: emit_call((int)neg_d);break;
- }
- restore_regs(reglist);
- }
-#else
cop1_unusable(i, i_regs);
-#endif
}
void multdiv_assemble_arm(int i,struct regstat *i_regs)
emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
emit_movs(d2,HOST_TEMPREG);
emit_jeq((int)out+52); // Division by zero
- emit_negmi(HOST_TEMPREG,HOST_TEMPREG);
+ emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
+#ifdef HAVE_ARMV5
emit_clz(HOST_TEMPREG,quotient);
emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
+#else
+ emit_movimm(0,quotient);
+ emit_addpl_imm(quotient,1,quotient);
+ emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
+ emit_jns((int)out-2*4);
+#endif
emit_orimm(quotient,1<<31,quotient);
emit_shr(quotient,quotient,quotient);
emit_cmp(remainder,HOST_TEMPREG);
emit_movimm(0xffffffff,quotient); // div0 case
emit_test(d2,d2);
emit_jeq((int)out+40); // Division by zero
+#ifdef HAVE_ARMV5
emit_clz(d2,HOST_TEMPREG);
emit_movimm(1<<31,quotient);
emit_shl(d2,HOST_TEMPREG,d2);
+#else
+ emit_movimm(0,HOST_TEMPREG);
+ emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
+ emit_lslpls_imm(d2,1,d2);
+ emit_jns((int)out-2*4);
+ emit_movimm(1<<31,quotient);
+#endif
emit_shr(quotient,HOST_TEMPREG,quotient);
emit_cmp(remainder,d2);
emit_subcs(remainder,d2,remainder);
}
}
else // 64-bit
- {
- if(opcode2[i]==0x1C) // DMULT
- {
- assert(opcode2[i]!=0x1C);
- signed char m1h=get_reg(i_regs->regmap,rs1[i]|64);
- signed char m1l=get_reg(i_regs->regmap,rs1[i]);
- signed char m2h=get_reg(i_regs->regmap,rs2[i]|64);
- signed char m2l=get_reg(i_regs->regmap,rs2[i]);
- assert(m1h>=0);
- assert(m2h>=0);
- assert(m1l>=0);
- assert(m2l>=0);
- emit_pushreg(m2h);
- emit_pushreg(m2l);
- emit_pushreg(m1h);
- emit_pushreg(m1l);
- emit_call((int)&mult64);
- emit_popreg(m1l);
- emit_popreg(m1h);
- emit_popreg(m2l);
- emit_popreg(m2h);
- signed char hih=get_reg(i_regs->regmap,HIREG|64);
- signed char hil=get_reg(i_regs->regmap,HIREG);
- if(hih>=0) emit_loadreg(HIREG|64,hih);
- if(hil>=0) emit_loadreg(HIREG,hil);
- signed char loh=get_reg(i_regs->regmap,LOREG|64);
- signed char lol=get_reg(i_regs->regmap,LOREG);
- if(loh>=0) emit_loadreg(LOREG|64,loh);
- if(lol>=0) emit_loadreg(LOREG,lol);
- }
- if(opcode2[i]==0x1D) // DMULTU
- {
- signed char m1h=get_reg(i_regs->regmap,rs1[i]|64);
- signed char m1l=get_reg(i_regs->regmap,rs1[i]);
- signed char m2h=get_reg(i_regs->regmap,rs2[i]|64);
- signed char m2l=get_reg(i_regs->regmap,rs2[i]);
- assert(m1h>=0);
- assert(m2h>=0);
- assert(m1l>=0);
- assert(m2l>=0);
- save_regs(0x100f);
- if(m1l!=0) emit_mov(m1l,0);
- if(m1h==0) emit_readword((int)&dynarec_local,1);
- else if(m1h>1) emit_mov(m1h,1);
- if(m2l<2) emit_readword((int)&dynarec_local+m2l*4,2);
- else if(m2l>2) emit_mov(m2l,2);
- if(m2h<3) emit_readword((int)&dynarec_local+m2h*4,3);
- else if(m2h>3) emit_mov(m2h,3);
- emit_call((int)&multu64);
- restore_regs(0x100f);
- signed char hih=get_reg(i_regs->regmap,HIREG|64);
- signed char hil=get_reg(i_regs->regmap,HIREG);
- signed char loh=get_reg(i_regs->regmap,LOREG|64);
- signed char lol=get_reg(i_regs->regmap,LOREG);
- /*signed char temp=get_reg(i_regs->regmap,-1);
- signed char rh=get_reg(i_regs->regmap,HIREG|64);
- signed char rl=get_reg(i_regs->regmap,HIREG);
- assert(m1h>=0);
- assert(m2h>=0);
- assert(m1l>=0);
- assert(m2l>=0);
- assert(temp>=0);
- //emit_mov(m1l,EAX);
- //emit_mul(m2l);
- emit_umull(rl,rh,m1l,m2l);
- emit_storereg(LOREG,rl);
- emit_mov(rh,temp);
- //emit_mov(m1h,EAX);
- //emit_mul(m2l);
- emit_umull(rl,rh,m1h,m2l);
- emit_adds(rl,temp,temp);
- emit_adcimm(rh,0,rh);
- emit_storereg(HIREG,rh);
- //emit_mov(m2h,EAX);
- //emit_mul(m1l);
- emit_umull(rl,rh,m1l,m2h);
- emit_adds(rl,temp,temp);
- emit_adcimm(rh,0,rh);
- emit_storereg(LOREG|64,temp);
- emit_mov(rh,temp);
- //emit_mov(m2h,EAX);
- //emit_mul(m1h);
- emit_umull(rl,rh,m1h,m2h);
- emit_adds(rl,temp,rl);
- emit_loadreg(HIREG,temp);
- emit_adcimm(rh,0,rh);
- emit_adds(rl,temp,rl);
- emit_adcimm(rh,0,rh);
- // DEBUG
- /*
- emit_pushreg(m2h);
- emit_pushreg(m2l);
- emit_pushreg(m1h);
- emit_pushreg(m1l);
- emit_call((int)&multu64);
- emit_popreg(m1l);
- emit_popreg(m1h);
- emit_popreg(m2l);
- emit_popreg(m2h);
- signed char hih=get_reg(i_regs->regmap,HIREG|64);
- signed char hil=get_reg(i_regs->regmap,HIREG);
- if(hih>=0) emit_loadreg(HIREG|64,hih); // DEBUG
- if(hil>=0) emit_loadreg(HIREG,hil); // DEBUG
- */
- // Shouldn't be necessary
- //char loh=get_reg(i_regs->regmap,LOREG|64);
- //char lol=get_reg(i_regs->regmap,LOREG);
- //if(loh>=0) emit_loadreg(LOREG|64,loh);
- //if(lol>=0) emit_loadreg(LOREG,lol);
- }
- if(opcode2[i]==0x1E) // DDIV
- {
- signed char d1h=get_reg(i_regs->regmap,rs1[i]|64);
- signed char d1l=get_reg(i_regs->regmap,rs1[i]);
- signed char d2h=get_reg(i_regs->regmap,rs2[i]|64);
- signed char d2l=get_reg(i_regs->regmap,rs2[i]);
- assert(d1h>=0);
- assert(d2h>=0);
- assert(d1l>=0);
- assert(d2l>=0);
- save_regs(0x100f);
- if(d1l!=0) emit_mov(d1l,0);
- if(d1h==0) emit_readword((int)&dynarec_local,1);
- else if(d1h>1) emit_mov(d1h,1);
- if(d2l<2) emit_readword((int)&dynarec_local+d2l*4,2);
- else if(d2l>2) emit_mov(d2l,2);
- if(d2h<3) emit_readword((int)&dynarec_local+d2h*4,3);
- else if(d2h>3) emit_mov(d2h,3);
- emit_call((int)&div64);
- restore_regs(0x100f);
- signed char hih=get_reg(i_regs->regmap,HIREG|64);
- signed char hil=get_reg(i_regs->regmap,HIREG);
- signed char loh=get_reg(i_regs->regmap,LOREG|64);
- signed char lol=get_reg(i_regs->regmap,LOREG);
- if(hih>=0) emit_loadreg(HIREG|64,hih);
- if(hil>=0) emit_loadreg(HIREG,hil);
- if(loh>=0) emit_loadreg(LOREG|64,loh);
- if(lol>=0) emit_loadreg(LOREG,lol);
- }
- if(opcode2[i]==0x1F) // DDIVU
- {
- //u_int hr,reglist=0;
- //for(hr=0;hr<HOST_REGS;hr++) {
- // if(i_regs->regmap[hr]>=0 && (i_regs->regmap[hr]&62)!=HIREG) reglist|=1<<hr;
- //}
- signed char d1h=get_reg(i_regs->regmap,rs1[i]|64);
- signed char d1l=get_reg(i_regs->regmap,rs1[i]);
- signed char d2h=get_reg(i_regs->regmap,rs2[i]|64);
- signed char d2l=get_reg(i_regs->regmap,rs2[i]);
- assert(d1h>=0);
- assert(d2h>=0);
- assert(d1l>=0);
- assert(d2l>=0);
- save_regs(0x100f);
- if(d1l!=0) emit_mov(d1l,0);
- if(d1h==0) emit_readword((int)&dynarec_local,1);
- else if(d1h>1) emit_mov(d1h,1);
- if(d2l<2) emit_readword((int)&dynarec_local+d2l*4,2);
- else if(d2l>2) emit_mov(d2l,2);
- if(d2h<3) emit_readword((int)&dynarec_local+d2h*4,3);
- else if(d2h>3) emit_mov(d2h,3);
- emit_call((int)&divu64);
- restore_regs(0x100f);
- signed char hih=get_reg(i_regs->regmap,HIREG|64);
- signed char hil=get_reg(i_regs->regmap,HIREG);
- signed char loh=get_reg(i_regs->regmap,LOREG|64);
- signed char lol=get_reg(i_regs->regmap,LOREG);
- if(hih>=0) emit_loadreg(HIREG|64,hih);
- if(hil>=0) emit_loadreg(HIREG,hil);
- if(loh>=0) emit_loadreg(LOREG|64,loh);
- if(lol>=0) emit_loadreg(LOREG,lol);
- }
- }
+ assert(0);
}
else
{
}
void do_miniht_insert(u_int return_address,int rt,int temp) {
- #ifdef ARMv5_ONLY
+ #ifndef HAVE_ARMV7
emit_movimm(return_address,rt); // PC into link register
add_to_linker((int)out,return_address,1);
emit_pcreladdr(temp);
#endif
}
-// Sign-extend to 64 bits and write out upper half of a register
-// This is useful where we have a 32-bit value in a register, and want to
-// keep it in a 32-bit register, but can't guarantee that it won't be read
-// as a 64-bit value later.
-void wb_sx(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32_pre,uint64_t is32,uint64_t u,uint64_t uu)
-{
-#ifndef FORCE32
- if(is32_pre==is32) return;
- int hr,reg;
- for(hr=0;hr<HOST_REGS;hr++) {
- if(hr!=EXCLUDE_REG) {
- //if(pre[hr]==entry[hr]) {
- if((reg=pre[hr])>=0) {
- if((dirty>>hr)&1) {
- if( ((is32_pre&~is32&~uu)>>reg)&1 ) {
- emit_sarimm(hr,31,HOST_TEMPREG);
- emit_storereg(reg|64,HOST_TEMPREG);
- }
- }
- }
- //}
- }
- }
-#endif
-}
-
void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)
{
//if(dirty_pre==dirty) return;
for(j=0;j<32;j++)
{
if(bitmap&(1<<j)) {
- start=BASE_ADDR+i*131072+j*4096;
+ start=(u_int)BASE_ADDR+i*131072+j*4096;
end=start+4095;
j++;
while(j<32) {
}
// CPU-architecture-specific initialization
-void arch_init() {
-#ifndef DISABLE_COP1
- rounding_modes[0]=0x0<<22; // round
- rounding_modes[1]=0x3<<22; // trunc
- rounding_modes[2]=0x1<<22; // ceil
- rounding_modes[3]=0x2<<22; // floor
-#endif
+static void arch_init() {
}
// vim:shiftwidth=2:expandtab
notaz.gp2x.de / pcsx_rearmed.git / blobdiff