X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.h;h=2d10ac73f2cbdc679087ac9d149c46fb1f012e45;hp=a1a2b528af2087f9fd775f8b26ba9bbfd53681c9;hb=71e490c5930e6e5f71d1f2d5165c3a801ac46be1;hpb=3d624f890e4350179851e958fe071b2fd7a56bec

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index a1a2b528..2d10ac73 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -8,17 +8,20 @@
 #define CORTEX_A8_BRANCH_PREDICTION_HACK 1
 #define USE_MINI_HT 1
 //#define REG_PREFETCH 1
-#define DISABLE_TLB 1
-//#define MUPEN64
-#define FORCE32 1
-#define DISABLE_COP1 1
+#define HAVE_CONDITIONAL_CALL 1
+#define RAM_SIZE 0x200000
 
-#ifdef FORCE32
-#define REG_SHIFT 2
-#else
-#define REG_SHIFT 3
+#ifndef __ARM_ARCH_7A__
+//#undef CORTEX_A8_BRANCH_PREDICTION_HACK
+//#undef USE_MINI_HT
+#endif
+
+#ifndef BASE_ADDR_FIXED
+#define BASE_ADDR_FIXED 0
 #endif
 
+#define REG_SHIFT 2
+
 /* ARM calling convention:
    r0-r3, r12: caller-save
    r4-r11: callee-save */
@@ -45,8 +48,13 @@
 
 extern char *invc_ptr;
 
-#define BASE_ADDR 0x7000000 // Code generator target address
 #define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
 
-// This is defined in linkage_arm.s, but gcc -O3 likes this better
-#define rdram ((unsigned int *)0x80000000)
+// Code generator target address
+#if BASE_ADDR_FIXED
+// "round" address helpful for debug
+#define BASE_ADDR 0x1000000
+#else
+extern char translation_cache[1 << TARGET_SIZE_2];
+#define BASE_ADDR (u_int)translation_cache
+#endif