e898de13 |
1 | /* |
2 | * vim:shiftwidth=2:expandtab |
3 | */ |
679af8a3 |
4 | #include <stdio.h> |
5 | #include <stdlib.h> |
6 | #include <assert.h> |
41397701 |
7 | |
679af8a3 |
8 | #include "sh2.h" |
9 | #include "compiler.h" |
10 | #include "../drc/cmn.h" |
11 | |
e898de13 |
12 | #ifndef DRC_DEBUG |
13 | #define DRC_DEBUG 0 |
14 | #endif |
15 | |
16 | #if DRC_DEBUG |
17 | #include "mame/sh2dasm.h" |
18 | #include <platform/linux/host_dasm.h> |
19 | static int insns_compiled, hash_collisions, host_insn_count; |
20 | #endif |
21 | #if (DRC_DEBUG & 2) |
22 | static void *tcache_dsm_ptr = tcache; |
23 | static char sh2dasm_buff[64]; |
24 | #endif |
25 | |
679af8a3 |
26 | #define BLOCK_CYCLE_LIMIT 100 |
27 | |
e898de13 |
28 | static void *tcache_ptr; |
29 | |
30 | #include "../drc/emit_x86.c" |
31 | |
679af8a3 |
32 | typedef enum { |
33 | SHR_R0 = 0, SHR_R15 = 15, |
34 | SHR_PC, SHR_PPC, SHR_PR, SHR_SR, |
35 | SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL, |
36 | } sh2_reg_e; |
37 | |
38 | typedef struct block_desc_ { |
39 | u32 addr; // SH2 PC address |
40 | void *tcache_ptr; // translated block for above PC |
41 | struct block_desc_ *next; // next block with the same PC hash |
42 | } block_desc; |
43 | |
e898de13 |
44 | #define MAX_BLOCK_COUNT (4*1024) |
679af8a3 |
45 | static block_desc *block_table; |
46 | static int block_count; |
47 | |
48 | #define MAX_HASH_ENTRIES 1024 |
49 | #define HASH_MASK (MAX_HASH_ENTRIES - 1) |
50 | |
679af8a3 |
51 | extern void sh2_drc_entry(SH2 *sh2, void *block); |
52 | extern void sh2_drc_exit(void); |
53 | |
54 | // tmp |
55 | extern void __attribute__((regparm(2))) sh2_do_op(SH2 *sh2, int opcode); |
e898de13 |
56 | static void __attribute__((regparm(1))) sh2_test_irq(SH2 *sh2); |
679af8a3 |
57 | |
58 | static void *dr_find_block(block_desc *tab, u32 addr) |
59 | { |
60 | for (tab = tab->next; tab != NULL; tab = tab->next) |
61 | if (tab->addr == addr) |
62 | break; |
63 | |
64 | if (tab != NULL) |
65 | return tab->tcache_ptr; |
66 | |
67 | printf("block miss for %08x\n", addr); |
68 | return NULL; |
69 | } |
70 | |
71 | static block_desc *dr_add_block(u32 addr, void *tcache_ptr) |
72 | { |
73 | block_desc *bd; |
74 | |
75 | if (block_count == MAX_BLOCK_COUNT) { |
76 | // FIXME: flush cache instead |
77 | printf("block descriptor overflow\n"); |
78 | exit(1); |
79 | } |
80 | |
81 | bd = &block_table[block_count]; |
82 | bd->addr = addr; |
83 | bd->tcache_ptr = tcache_ptr; |
84 | block_count++; |
85 | |
86 | return bd; |
87 | } |
88 | |
89 | #define HASH_FUNC(hash_tab, addr) \ |
90 | ((block_desc **)(hash_tab))[(addr) & HASH_MASK] |
91 | |
92 | // --------------------------------------------------------------- |
93 | |
94 | static void emit_move_r_imm32(sh2_reg_e dst, u32 imm) |
41397701 |
95 | { |
679af8a3 |
96 | int host_dst = reg_map_g2h[dst]; |
97 | int tmp = 0; |
98 | |
99 | if (host_dst != -1) |
100 | tmp = host_dst; |
101 | emith_move_r_imm(tmp, imm); |
102 | if (host_dst == -1) |
103 | emith_ctx_write(tmp, dst * 4); |
104 | } |
105 | |
106 | static void emit_move_r_r(sh2_reg_e dst, sh2_reg_e src) |
107 | { |
108 | int host_dst = reg_map_g2h[dst], host_src = reg_map_g2h[src]; |
109 | int tmp = 0; |
110 | |
111 | if (host_dst != -1 && host_src != -1) { |
112 | emith_move_r_r(host_dst, host_src); |
113 | return; |
114 | } |
115 | |
116 | if (host_src != -1) |
117 | tmp = host_src; |
118 | if (host_dst != -1) |
119 | tmp = host_dst; |
120 | |
121 | if (host_src == -1) |
122 | emith_ctx_read(tmp, src * 4); |
123 | if (host_dst == -1) |
124 | emith_ctx_write(tmp, dst * 4); |
125 | } |
126 | |
127 | static void emit_braf(sh2_reg_e reg, u32 pc) |
128 | { |
129 | int host_reg = reg_map_g2h[reg]; |
130 | if (host_reg == -1) { |
131 | emith_ctx_read(0, reg * 4); |
132 | } else |
133 | emith_move_r_r(0, host_reg); |
134 | emith_add_r_imm(0, pc); |
135 | |
e898de13 |
136 | emith_ctx_write(0, SHR_PPC * 4); |
679af8a3 |
137 | } |
138 | |
679af8a3 |
139 | /* |
140 | static int sh2_translate_op4(int op) |
141 | { |
142 | switch (op & 0x000f) |
143 | { |
144 | case 0x0b: |
145 | default: |
146 | emith_pass_arg(2, sh2, op); |
147 | emith_call(sh2_do_op); |
148 | break; |
149 | } |
150 | |
151 | return 0; |
152 | } |
153 | */ |
154 | |
e898de13 |
155 | #define DELAYED_OP \ |
156 | delayed_op = 2 |
157 | |
158 | #define CHECK_UNHANDLED_BITS(mask) { \ |
159 | if ((op & (mask)) != 0) \ |
160 | goto default_; \ |
161 | } |
162 | |
679af8a3 |
163 | static void *sh2_translate(SH2 *sh2, block_desc *other_block) |
164 | { |
165 | void *block_entry = tcache_ptr; |
166 | block_desc *this_block; |
41397701 |
167 | unsigned int pc = sh2->pc; |
e898de13 |
168 | int op, delayed_op = 0, test_irq = 0; |
679af8a3 |
169 | int cycles = 0; |
e898de13 |
170 | u32 tmp, tmp2; |
679af8a3 |
171 | |
172 | this_block = dr_add_block(pc, block_entry); |
e898de13 |
173 | if (other_block != NULL) |
679af8a3 |
174 | this_block->next = other_block; |
e898de13 |
175 | |
679af8a3 |
176 | HASH_FUNC(sh2->pc_hashtab, pc) = this_block; |
177 | |
e898de13 |
178 | #if (DRC_DEBUG & 1) |
179 | printf("== %csh2 block #%d %08x -> %p\n", sh2->is_slave ? 's' : 'm', |
679af8a3 |
180 | block_count, pc, block_entry); |
e898de13 |
181 | if (other_block != NULL) { |
182 | printf(" hash collision with %08x\n", other_block->addr); |
183 | hash_collisions++; |
184 | } |
679af8a3 |
185 | #endif |
186 | |
e898de13 |
187 | while (cycles < BLOCK_CYCLE_LIMIT || delayed_op) |
679af8a3 |
188 | { |
e898de13 |
189 | if (delayed_op > 0) |
190 | delayed_op--; |
191 | |
192 | op = p32x_sh2_read16(pc, sh2->is_slave); |
193 | |
194 | #if (DRC_DEBUG & 3) |
195 | insns_compiled++; |
196 | #if (DRC_DEBUG & 2) |
197 | DasmSH2(sh2dasm_buff, pc, op); |
198 | printf("%08x %04x %s\n", pc, op, sh2dasm_buff); |
199 | #endif |
679af8a3 |
200 | #endif |
679af8a3 |
201 | |
202 | pc += 2; |
203 | cycles++; |
204 | |
205 | switch ((op >> 12) & 0x0f) |
206 | { |
207 | case 0x00: |
e898de13 |
208 | switch (op & 0x0f) { |
209 | case 0x03: |
210 | CHECK_UNHANDLED_BITS(0xd0); |
211 | // BRAF Rm 0000mmmm00100011 |
212 | // BSRF Rm 0000mmmm00000011 |
679af8a3 |
213 | DELAYED_OP; |
e898de13 |
214 | if (!(op & 0x20)) |
215 | emit_move_r_imm32(SHR_PR, pc + 2); |
216 | emit_braf((op >> 8) & 0x0f, pc + 2); |
679af8a3 |
217 | cycles++; |
e898de13 |
218 | goto end_op; |
219 | case 0x09: |
220 | CHECK_UNHANDLED_BITS(0xf0); |
221 | // NOP 0000000000001001 |
222 | goto end_op; |
223 | case 0x0b: |
224 | CHECK_UNHANDLED_BITS(0xd0); |
679af8a3 |
225 | DELAYED_OP; |
e898de13 |
226 | if (!(op & 0x20)) { |
227 | // RTS 0000000000001011 |
228 | emit_move_r_r(SHR_PPC, SHR_PR); |
229 | cycles++; |
230 | } else { |
231 | // RTE 0000000000101011 |
232 | //emit_move_r_r(SHR_PC, SHR_PR); |
233 | emit_move_r_imm32(SHR_PC, pc - 2); |
234 | emith_pass_arg(2, sh2, op); |
235 | emith_call(sh2_do_op); |
236 | emit_move_r_r(SHR_PPC, SHR_PC); |
237 | test_irq = 1; |
238 | cycles += 3; |
239 | } |
240 | goto end_op; |
679af8a3 |
241 | } |
242 | goto default_; |
243 | |
244 | case 0x04: |
e898de13 |
245 | switch (op & 0x0f) { |
246 | case 0x07: |
247 | if ((op & 0xf0) != 0) |
248 | goto default_; |
249 | // LDC.L @Rm+,SR 0100mmmm00000111 |
250 | test_irq = 1; |
251 | goto default_; |
252 | case 0x0b: |
253 | if ((op & 0xd0) != 0) |
254 | goto default_; |
255 | // JMP @Rm 0100mmmm00101011 |
256 | // JSR @Rm 0100mmmm00001011 |
679af8a3 |
257 | DELAYED_OP; |
e898de13 |
258 | if (!(op & 0x20)) |
259 | emit_move_r_imm32(SHR_PR, pc + 2); |
260 | emit_move_r_r(SHR_PPC, (op >> 8) & 0x0f); |
679af8a3 |
261 | cycles++; |
e898de13 |
262 | goto end_op; |
263 | case 0x0e: |
264 | if ((op & 0xf0) != 0) |
265 | goto default_; |
266 | // LDC Rm,SR 0100mmmm00001110 |
267 | test_irq = 1; |
268 | goto default_; |
679af8a3 |
269 | } |
270 | goto default_; |
271 | |
e898de13 |
272 | case 0x08: |
679af8a3 |
273 | switch (op & 0x0f00) { |
274 | // BT/S label 10001101dddddddd |
275 | case 0x0d00: |
276 | // BF/S label 10001111dddddddd |
277 | case 0x0f00: |
278 | DELAYED_OP; |
279 | cycles--; |
679af8a3 |
280 | // fallthrough |
281 | // BT label 10001001dddddddd |
282 | case 0x0900: |
283 | // BF label 10001011dddddddd |
284 | case 0x0b00: |
679af8a3 |
285 | tmp = ((signed int)(op << 24) >> 23); |
e898de13 |
286 | tmp2 = delayed_op ? SHR_PPC : SHR_PC; |
287 | emit_move_r_imm32(tmp2, pc + (delayed_op ? 2 : 0)); |
288 | emith_test_t(); |
289 | EMIT_CONDITIONAL(emit_move_r_imm32(tmp2, pc + tmp + 2), (op & 0x0200) ? 1 : 0); |
290 | cycles += 2; |
291 | if (!delayed_op) |
292 | goto end_block; |
293 | goto end_op; |
679af8a3 |
294 | } |
295 | goto default_; |
679af8a3 |
296 | |
297 | case 0x0a: |
298 | // BRA label 1010dddddddddddd |
299 | DELAYED_OP; |
300 | do_bra: |
301 | tmp = ((signed int)(op << 20) >> 19); |
e898de13 |
302 | emit_move_r_imm32(SHR_PPC, pc + tmp + 2); |
679af8a3 |
303 | cycles++; |
e898de13 |
304 | break; |
679af8a3 |
305 | |
306 | case 0x0b: |
307 | // BSR label 1011dddddddddddd |
308 | DELAYED_OP; |
e898de13 |
309 | emit_move_r_imm32(SHR_PR, pc + 2); |
679af8a3 |
310 | goto do_bra; |
311 | |
312 | default: |
313 | default_: |
314 | emit_move_r_imm32(SHR_PC, pc - 2); |
315 | emith_pass_arg(2, sh2, op); |
316 | emith_call(sh2_do_op); |
317 | break; |
318 | } |
319 | |
e898de13 |
320 | end_op: |
6add7875 |
321 | if (delayed_op == 1) |
e898de13 |
322 | emit_move_r_r(SHR_PC, SHR_PPC); |
6add7875 |
323 | |
e898de13 |
324 | if (test_irq && delayed_op != 2) { |
325 | emith_pass_arg(1, sh2); |
326 | emith_call(sh2_test_irq); |
327 | break; |
328 | } |
6add7875 |
329 | if (delayed_op == 1) |
330 | break; |
e898de13 |
331 | |
332 | #if (DRC_DEBUG & 2) |
679af8a3 |
333 | host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr); |
334 | tcache_dsm_ptr = tcache_ptr; |
335 | #endif |
336 | } |
337 | |
338 | end_block: |
339 | if ((char *)tcache_ptr - (char *)tcache > DRC_TCACHE_SIZE) { |
340 | printf("tcache overflow!\n"); |
341 | fflush(stdout); |
342 | exit(1); |
343 | } |
344 | |
345 | if (reg_map_g2h[SHR_SR] == -1) { |
346 | emith_ctx_sub(cycles << 12, SHR_SR * 4); |
347 | } else |
348 | emith_sub_r_imm(reg_map_g2h[SHR_SR], cycles << 12); |
349 | emith_jump(sh2_drc_exit); |
350 | |
e898de13 |
351 | #if (DRC_DEBUG & 2) |
679af8a3 |
352 | host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr); |
353 | tcache_dsm_ptr = tcache_ptr; |
e898de13 |
354 | #endif |
355 | #if (DRC_DEBUG & 1) |
356 | printf(" tcache %d/%d, hash collisions %d/%d, insns %d -> %d %.3f\n", |
357 | (char *)tcache_ptr - (char *)tcache, DRC_TCACHE_SIZE, |
358 | hash_collisions, block_count, insns_compiled, host_insn_count, |
359 | (double)host_insn_count / insns_compiled); |
679af8a3 |
360 | #endif |
361 | return block_entry; |
362 | |
363 | unimplemented: |
364 | // last op |
e898de13 |
365 | #if (DRC_DEBUG & 2) |
679af8a3 |
366 | host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr); |
367 | tcache_dsm_ptr = tcache_ptr; |
368 | #endif |
369 | exit(1); |
370 | } |
371 | |
372 | void __attribute__((noinline)) sh2_drc_dispatcher(SH2 *sh2) |
373 | { |
374 | while (((signed int)sh2->sr >> 12) > 0) |
375 | { |
679af8a3 |
376 | void *block = NULL; |
6add7875 |
377 | block_desc *bd; |
378 | |
379 | // FIXME: must avoid doing it so often.. |
380 | sh2_test_irq(sh2); |
381 | |
382 | bd = HASH_FUNC(sh2->pc_hashtab, sh2->pc); |
679af8a3 |
383 | |
384 | if (bd != NULL) { |
385 | if (bd->addr == sh2->pc) |
386 | block = bd->tcache_ptr; |
387 | else |
388 | block = dr_find_block(bd, sh2->pc); |
389 | } |
390 | |
391 | if (block == NULL) |
392 | block = sh2_translate(sh2, bd); |
393 | |
e898de13 |
394 | #if (DRC_DEBUG & 4) |
679af8a3 |
395 | printf("= %csh2 enter %08x %p\n", sh2->is_slave ? 's' : 'm', sh2->pc, block); |
396 | #endif |
397 | sh2_drc_entry(sh2, block); |
398 | } |
399 | } |
400 | |
401 | void sh2_execute(SH2 *sh2, int cycles) |
402 | { |
403 | sh2->cycles_aim += cycles; |
404 | cycles = sh2->cycles_aim - sh2->cycles_done; |
405 | |
406 | // cycles are kept in SHR_SR unused bits (upper 20) |
407 | sh2->sr &= 0x3f3; |
408 | sh2->sr |= cycles << 12; |
409 | sh2_drc_dispatcher(sh2); |
410 | |
411 | sh2->cycles_done += cycles - ((signed int)sh2->sr >> 12); |
412 | } |
413 | |
e898de13 |
414 | static void __attribute__((regparm(1))) sh2_test_irq(SH2 *sh2) |
679af8a3 |
415 | { |
6add7875 |
416 | if (sh2->pending_level > ((sh2->sr >> 4) & 0x0f)) |
417 | { |
418 | if (sh2->pending_irl > sh2->pending_int_irq) |
419 | sh2_do_irq(sh2, sh2->pending_irl, 64 + sh2->pending_irl/2); |
420 | else { |
421 | sh2_do_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector); |
422 | sh2->pending_int_irq = 0; // auto-clear |
423 | sh2->pending_level = sh2->pending_irl; |
424 | } |
425 | } |
679af8a3 |
426 | } |
427 | |
428 | int sh2_drc_init(SH2 *sh2) |
429 | { |
e898de13 |
430 | if (block_table == NULL) { |
431 | block_count = 0; |
432 | block_table = calloc(MAX_BLOCK_COUNT, sizeof(*block_table)); |
433 | if (block_table == NULL) |
434 | return -1; |
435 | |
436 | tcache_ptr = tcache; |
437 | #if (DRC_DEBUG & 1) |
438 | hash_collisions = 0; |
439 | #endif |
679af8a3 |
440 | } |
441 | |
e898de13 |
442 | //assert(sh2->pc_hashtab == NULL); |
679af8a3 |
443 | sh2->pc_hashtab = calloc(sizeof(sh2->pc_hashtab[0]), MAX_HASH_ENTRIES); |
444 | if (sh2->pc_hashtab == NULL) |
445 | return -1; |
41397701 |
446 | |
679af8a3 |
447 | return 0; |
41397701 |
448 | } |
449 | |
e898de13 |
450 | void sh2_drc_finish(SH2 *sh2) |
451 | { |
452 | if (block_table != NULL) { |
453 | free(block_table); |
454 | block_table = NULL; |
455 | } |
456 | |
457 | free(sh2->pc_hashtab); |
458 | sh2->pc_hashtab = NULL; |
459 | } |