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ef79bbde P |
1 | /*************************************************************************** |
2 | * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team * | |
3 | * * | |
4 | * This program is free software; you can redistribute it and/or modify * | |
5 | * it under the terms of the GNU General Public License as published by * | |
6 | * the Free Software Foundation; either version 2 of the License, or * | |
7 | * (at your option) any later version. * | |
8 | * * | |
9 | * This program is distributed in the hope that it will be useful, * | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * | |
12 | * GNU General Public License for more details. * | |
13 | * * | |
14 | * You should have received a copy of the GNU General Public License * | |
15 | * along with this program; if not, write to the * | |
16 | * Free Software Foundation, Inc., * | |
17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. * | |
18 | ***************************************************************************/ | |
19 | ||
20 | /* | |
21 | * R3000A CPU functions. | |
22 | */ | |
23 | ||
24 | #include "r3000a.h" | |
25 | #include "cdrom.h" | |
26 | #include "mdec.h" | |
27 | #include "gte.h" | |
630b122b | 28 | #include "psxinterpreter.h" |
584fc319 | 29 | #include "psxbios.h" |
c6a249e3 | 30 | #include "psxevents.h" |
dec3c1d7 | 31 | #include "../include/compiler_features.h" |
ef79bbde P |
32 | |
33 | R3000Acpu *psxCpu = NULL; | |
630b122b | 34 | #ifdef DRC_DISABLE |
93c9e42a | 35 | psxRegisters psxRegs; |
1a32b0f8 | 36 | #endif |
ef79bbde P |
37 | |
38 | int psxInit() { | |
202b29d4 | 39 | SysPrintf(_("Running PCSX Version %s (%s).\n"), PCSX_VERSION, __DATE__); |
ef79bbde | 40 | |
630b122b | 41 | #ifndef DRC_DISABLE |
ef79bbde P |
42 | if (Config.Cpu == CPU_INTERPRETER) { |
43 | psxCpu = &psxInt; | |
44 | } else psxCpu = &psxRec; | |
45 | #else | |
630b122b | 46 | Config.Cpu = CPU_INTERPRETER; |
ef79bbde P |
47 | psxCpu = &psxInt; |
48 | #endif | |
49 | ||
50 | Log = 0; | |
51 | ||
52 | if (psxMemInit() == -1) return -1; | |
53 | ||
54 | return psxCpu->Init(); | |
55 | } | |
56 | ||
57 | void psxReset() { | |
7575a4aa | 58 | boolean introBypassed = FALSE; |
ef79bbde P |
59 | psxMemReset(); |
60 | ||
630b122b | 61 | memset(&psxRegs, 0, sizeof(psxRegs)); |
62 | ||
ef79bbde P |
63 | psxRegs.pc = 0xbfc00000; // Start in bootstrap |
64 | ||
6d79a06f | 65 | psxRegs.CP0.n.SR = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1 |
66 | psxRegs.CP0.n.PRid = 0x00000002; // PRevID = Revision ID, same as R3000A | |
3807a976 | 67 | if (Config.HLE) { |
68 | psxRegs.CP0.n.SR |= 1u << 30; // COP2 enabled | |
69 | psxRegs.CP0.n.SR &= ~(1u << 22); // RAM exception vector | |
70 | } | |
ef79bbde | 71 | |
1562ed57 | 72 | psxCpu->ApplyConfig(); |
c24732c0 | 73 | psxCpu->Reset(); |
74 | ||
ef79bbde P |
75 | psxHwReset(); |
76 | psxBiosInit(); | |
77 | ||
f5f5f5dd | 78 | if (!Config.HLE) { |
ef79bbde | 79 | psxExecuteBios(); |
7575a4aa | 80 | if (psxRegs.pc == 0x80030000 && !Config.SlowBoot) { |
f5f5f5dd | 81 | BiosBootBypass(); |
7575a4aa | 82 | introBypassed = TRUE; |
83 | } | |
f5f5f5dd | 84 | } |
7575a4aa | 85 | if (Config.HLE || introBypassed) |
86 | psxBiosSetupBootState(); | |
ef79bbde P |
87 | |
88 | #ifdef EMU_LOG | |
89 | EMU_LOG("*BIOS END*\n"); | |
90 | #endif | |
91 | Log = 0; | |
92 | } | |
93 | ||
94 | void psxShutdown() { | |
ef79bbde P |
95 | psxBiosShutdown(); |
96 | ||
97 | psxCpu->Shutdown(); | |
479d58cf PC |
98 | |
99 | psxMemShutdown(); | |
ef79bbde P |
100 | } |
101 | ||
6c62131f | 102 | // cp0 is passed separately for lightrec to be less messy |
6d79a06f | 103 | void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) { |
dec3c1d7 | 104 | u32 opcode = intFakeFetch(psxRegs.pc); |
630b122b | 105 | |
8659d7fd | 106 | if (unlikely(!Config.HLE && (opcode >> 25) == 0x25)) { |
665e364a | 107 | // "hokuto no ken" / "Crash Bandicot 2" ... |
108 | // BIOS does not allow to return to GTE instructions | |
109 | // (just skips it, supposedly because it's scheduled already) | |
62656449 | 110 | // so we execute it here |
6d79a06f | 111 | psxCP2Regs *cp2 = (psxCP2Regs *)(cp0 + 1); |
dec3c1d7 | 112 | psxRegs.code = opcode; |
113 | psxCP2[opcode & 0x3f](cp2); | |
665e364a | 114 | } |
115 | ||
ef79bbde | 116 | // Set the Cause |
c41449cb | 117 | cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x700) | cause; |
ef79bbde P |
118 | |
119 | // Set the EPC & PC | |
6d79a06f | 120 | cp0->n.EPC = bdt ? psxRegs.pc - 4 : psxRegs.pc; |
ef79bbde | 121 | |
6d79a06f | 122 | if (cp0->n.SR & 0x400000) |
ef79bbde P |
123 | psxRegs.pc = 0xbfc00180; |
124 | else | |
125 | psxRegs.pc = 0x80000080; | |
126 | ||
6d79a06f | 127 | // Set the SR |
128 | cp0->n.SR = (cp0->n.SR & ~0x3f) | ((cp0->n.SR & 0x0f) << 2); | |
ef79bbde P |
129 | } |
130 | ||
131 | void psxBranchTest() { | |
132 | if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter) | |
133 | psxRcntUpdate(); | |
134 | ||
c6a249e3 | 135 | irq_test(&psxRegs.CP0); |
ef79bbde | 136 | |
c6a249e3 | 137 | if (unlikely(psxRegs.pc == psxRegs.biosBranchCheck)) |
584fc319 | 138 | psxBiosCheckBranch(); |
ef79bbde P |
139 | } |
140 | ||
141 | void psxJumpTest() { | |
142 | if (!Config.HLE && Config.PsxOut) { | |
143 | u32 call = psxRegs.GPR.n.t1 & 0xff; | |
144 | switch (psxRegs.pc & 0x1fffff) { | |
145 | case 0xa0: | |
146 | #ifdef PSXBIOS_LOG | |
147 | if (call != 0x28 && call != 0xe) { | |
148 | PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); } | |
149 | #endif | |
150 | if (biosA0[call]) | |
151 | biosA0[call](); | |
152 | break; | |
153 | case 0xb0: | |
154 | #ifdef PSXBIOS_LOG | |
155 | if (call != 0x17 && call != 0xb) { | |
156 | PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); } | |
157 | #endif | |
158 | if (biosB0[call]) | |
159 | biosB0[call](); | |
160 | break; | |
161 | case 0xc0: | |
162 | #ifdef PSXBIOS_LOG | |
163 | PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); | |
164 | #endif | |
165 | if (biosC0[call]) | |
166 | biosC0[call](); | |
167 | break; | |
168 | } | |
169 | } | |
170 | } | |
171 | ||
172 | void psxExecuteBios() { | |
f5f5f5dd | 173 | int i; |
f3bc907d | 174 | for (i = 0; i < 5000000; i++) { |
175 | psxCpu->ExecuteBlock(EXEC_CALLER_BOOT); | |
176 | if ((psxRegs.pc & 0xff800000) == 0x80000000) | |
177 | break; | |
178 | } | |
179 | if (psxRegs.pc != 0x80030000) | |
180 | SysPrintf("non-standard BIOS detected (%d, %08x)\n", i, psxRegs.pc); | |
ef79bbde P |
181 | } |
182 | ||
d3d41455 | 183 | // irq10 stuff, very preliminary |
184 | static int irq10count; | |
185 | ||
186 | static void psxScheduleIrq10One(u32 cycles_abs) { | |
187 | // schedule relative to frame start | |
188 | u32 c = cycles_abs - rcnts[3].cycleStart; | |
189 | assert((s32)c >= 0); | |
190 | psxRegs.interrupt |= 1 << PSXINT_IRQ10; | |
191 | psxRegs.intCycle[PSXINT_IRQ10].cycle = c; | |
192 | psxRegs.intCycle[PSXINT_IRQ10].sCycle = rcnts[3].cycleStart; | |
c6a249e3 | 193 | set_event_raw_abs(PSXINT_IRQ10, cycles_abs); |
d3d41455 | 194 | } |
195 | ||
196 | void irq10Interrupt() { | |
197 | u32 prevc = psxRegs.intCycle[PSXINT_IRQ10].sCycle | |
198 | + psxRegs.intCycle[PSXINT_IRQ10].cycle; | |
199 | ||
200 | psxHu32ref(0x1070) |= SWAPu32(0x400); | |
201 | ||
202 | #if 0 | |
203 | s32 framec = psxRegs.cycle - rcnts[3].cycleStart; | |
204 | printf("%d:%03d irq10 #%d %3d m=%d,%d\n", frame_counter, | |
205 | (s32)((float)framec / (PSXCLK / 60 / 263.0f)), | |
206 | irq10count, psxRegs.cycle - prevc, | |
207 | (psxRegs.CP0.n.SR & 0x401) != 0x401, !(psxHu32(0x1074) & 0x400)); | |
208 | #endif | |
d6b2a130 | 209 | if (--irq10count > 0) { |
210 | u32 cycles_per_line = Config.PsxType | |
211 | ? PSXCLK / 50 / 314 : PSXCLK / 60 / 263; | |
212 | psxScheduleIrq10One(prevc + cycles_per_line); | |
213 | } | |
d3d41455 | 214 | } |
215 | ||
216 | void psxScheduleIrq10(int irq_count, int x_cycles, int y) { | |
217 | //printf("%s %d, %d, %d\n", __func__, irq_count, x_cycles, y); | |
218 | u32 cycles_per_frame = Config.PsxType ? PSXCLK / 50 : PSXCLK / 60; | |
219 | u32 cycles = rcnts[3].cycleStart + cycles_per_frame; | |
220 | cycles += y * cycles_per_frame / (Config.PsxType ? 314 : 263); | |
221 | cycles += x_cycles; | |
222 | psxScheduleIrq10One(cycles); | |
223 | irq10count = irq_count; | |
224 | } |