cff531af |
1 | /*\r |
2 | * Memory I/O handlers for Sega/Mega CD.\r |
3 | * (C) notaz, 2007-2009\r |
4 | *\r |
5 | * This work is licensed under the terms of MAME license.\r |
6 | * See COPYING file in the top-level directory.\r |
7 | */\r |
cc68a136 |
8 | \r |
efcba75f |
9 | #include "../pico_int.h"\r |
af37bca8 |
10 | #include "../memory.h"\r |
cc68a136 |
11 | \r |
cb4a513a |
12 | #include "gfx_cd.h"\r |
4f265db7 |
13 | #include "pcm.h"\r |
cb4a513a |
14 | \r |
bcf65fd6 |
15 | uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
16 | uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r |
17 | uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r |
18 | uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r |
cc68a136 |
19 | \r |
af37bca8 |
20 | MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r |
21 | MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r |
22 | MAKE_68K_READ32(s68k_read32, s68k_read16_map)\r |
23 | MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)\r |
24 | MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)\r |
25 | MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r |
b5e5172d |
26 | \r |
cc68a136 |
27 | // -----------------------------------------------------------------\r |
28 | \r |
0ace9b9a |
29 | // provided by ASM code:\r |
30 | #ifdef _ASM_CD_MEMORY_C\r |
31 | u32 PicoReadM68k8_io(u32 a);\r |
32 | u32 PicoReadM68k16_io(u32 a);\r |
33 | void PicoWriteM68k8_io(u32 a, u32 d);\r |
34 | void PicoWriteM68k16_io(u32 a, u32 d);\r |
35 | \r |
36 | u32 PicoReadS68k8_pr(u32 a);\r |
37 | u32 PicoReadS68k16_pr(u32 a);\r |
38 | void PicoWriteS68k8_pr(u32 a, u32 d);\r |
39 | void PicoWriteS68k16_pr(u32 a, u32 d);\r |
40 | \r |
41 | u32 PicoReadM68k8_cell0(u32 a);\r |
42 | u32 PicoReadM68k8_cell1(u32 a);\r |
43 | u32 PicoReadM68k16_cell0(u32 a);\r |
44 | u32 PicoReadM68k16_cell1(u32 a);\r |
45 | void PicoWriteM68k8_cell0(u32 a, u32 d);\r |
46 | void PicoWriteM68k8_cell1(u32 a, u32 d);\r |
47 | void PicoWriteM68k16_cell0(u32 a, u32 d);\r |
48 | void PicoWriteM68k16_cell1(u32 a, u32 d);\r |
49 | \r |
50 | u32 PicoReadS68k8_dec0(u32 a);\r |
51 | u32 PicoReadS68k8_dec1(u32 a);\r |
52 | u32 PicoReadS68k16_dec0(u32 a);\r |
53 | u32 PicoReadS68k16_dec1(u32 a);\r |
54 | void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r |
55 | void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r |
56 | void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r |
57 | void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r |
58 | void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r |
59 | void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r |
60 | void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r |
61 | void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r |
62 | void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r |
63 | void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r |
64 | void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r |
65 | void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r |
66 | #endif\r |
67 | \r |
4fb43555 |
68 | static void remap_prg_window(u32 r1, u32 r3);\r |
69 | static void remap_word_ram(u32 r3);\r |
0ace9b9a |
70 | \r |
7a1f6e45 |
71 | // poller detection\r |
7a1f6e45 |
72 | #define POLL_LIMIT 16\r |
73 | #define POLL_CYCLES 124\r |
cc68a136 |
74 | \r |
cc5ffc3c |
75 | void m68k_comm_check(u32 a)\r |
bc3c13d3 |
76 | {\r |
08769494 |
77 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
bc3c13d3 |
78 | if (a != Pico_mcd->m.m68k_poll_a) {\r |
79 | Pico_mcd->m.m68k_poll_a = a;\r |
80 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
cc5ffc3c |
81 | return;\r |
bc3c13d3 |
82 | }\r |
08769494 |
83 | Pico_mcd->m.m68k_poll_cnt++;\r |
bc3c13d3 |
84 | }\r |
85 | \r |
4ff2d527 |
86 | #ifndef _ASM_CD_MEMORY_C\r |
cb4a513a |
87 | static u32 m68k_reg_read16(u32 a)\r |
cc68a136 |
88 | {\r |
4fb43555 |
89 | u32 d = 0;\r |
cc68a136 |
90 | a &= 0x3e;\r |
cc68a136 |
91 | \r |
92 | switch (a) {\r |
672ad671 |
93 | case 0:\r |
4fb43555 |
94 | // here IFL2 is always 0, just like in Gens\r |
95 | d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)\r |
96 | | Pico_mcd->m.busreq;\r |
672ad671 |
97 | goto end;\r |
cc68a136 |
98 | case 2:\r |
cc5ffc3c |
99 | m68k_comm_check(a);\r |
672ad671 |
100 | d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r |
af37bca8 |
101 | elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r |
cc5ffc3c |
102 | goto end;\r |
c459aefd |
103 | case 4:\r |
104 | d = Pico_mcd->s68k_regs[4]<<8;\r |
105 | goto end;\r |
106 | case 6:\r |
913ef4b7 |
107 | d = *(u16 *)(Pico_mcd->bios + 0x72);\r |
c459aefd |
108 | goto end;\r |
cc68a136 |
109 | case 8:\r |
cc68a136 |
110 | d = Read_CDC_Host(0);\r |
111 | goto end;\r |
c459aefd |
112 | case 0xA:\r |
ca61ee42 |
113 | elprintf(EL_UIO, "m68k FIXME: reserved read");\r |
c459aefd |
114 | goto end;\r |
ae214f1c |
115 | case 0xC: // 384 cycle stopwatch timer\r |
116 | // ugh..\r |
117 | d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r |
118 | d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r |
119 | d &= 0x0fff;\r |
af37bca8 |
120 | elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r |
1cd356a3 |
121 | goto end;\r |
cc68a136 |
122 | }\r |
123 | \r |
cc68a136 |
124 | if (a < 0x30) {\r |
125 | // comm flag/cmd/status (0xE-0x2F)\r |
cc5ffc3c |
126 | m68k_comm_check(a);\r |
cc68a136 |
127 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
cc5ffc3c |
128 | goto end;\r |
cc68a136 |
129 | }\r |
130 | \r |
ca61ee42 |
131 | elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r |
cc68a136 |
132 | \r |
133 | end:\r |
cc68a136 |
134 | return d;\r |
135 | }\r |
4ff2d527 |
136 | #endif\r |
cc68a136 |
137 | \r |
4ff2d527 |
138 | #ifndef _ASM_CD_MEMORY_C\r |
139 | static\r |
140 | #endif\r |
141 | void m68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
142 | {\r |
af37bca8 |
143 | u32 dold;\r |
cc68a136 |
144 | a &= 0x3f;\r |
cc68a136 |
145 | \r |
08769494 |
146 | Pico_mcd->m.m68k_poll_a =\r |
147 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
bc3c13d3 |
148 | \r |
cc68a136 |
149 | switch (a) {\r |
150 | case 0:\r |
672ad671 |
151 | d &= 1;\r |
08769494 |
152 | if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {\r |
153 | elprintf(EL_INTS, "m68k: s68k irq 2");\r |
154 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
155 | SekInterruptS68k(2);\r |
156 | }\r |
c459aefd |
157 | return;\r |
cc68a136 |
158 | case 1:\r |
672ad671 |
159 | d &= 3;\r |
4fb43555 |
160 | dold = Pico_mcd->m.busreq;\r |
161 | if (!(d & 1))\r |
162 | d |= 2; // verified: can't release bus on reset\r |
163 | if (dold == d)\r |
bc3c13d3 |
164 | return;\r |
4fb43555 |
165 | \r |
08769494 |
166 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
bc3c13d3 |
167 | \r |
4fb43555 |
168 | if ((dold ^ d) & 1)\r |
bc3c13d3 |
169 | elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r |
4fb43555 |
170 | if (!(d & 1))\r |
171 | Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;\r |
172 | else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {\r |
173 | Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;\r |
174 | elprintf(EL_CDREGS, "m68k: resetting s68k");\r |
175 | SekResetS68k();\r |
cc68a136 |
176 | }\r |
4fb43555 |
177 | if ((dold ^ d) & 2) {\r |
bc3c13d3 |
178 | elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r |
4fb43555 |
179 | remap_prg_window(d, Pico_mcd->s68k_regs[3]);\r |
bc3c13d3 |
180 | }\r |
c459aefd |
181 | Pico_mcd->m.busreq = d;\r |
182 | return;\r |
672ad671 |
183 | case 2:\r |
af37bca8 |
184 | elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);\r |
672ad671 |
185 | Pico_mcd->s68k_regs[2] = d; // really use s68k side register\r |
186 | return;\r |
af37bca8 |
187 | case 3:\r |
188 | dold = Pico_mcd->s68k_regs[3];\r |
189 | elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r |
af37bca8 |
190 | if ((d ^ dold) & 0xc0) {\r |
08769494 |
191 | elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r |
192 | (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r |
4fb43555 |
193 | remap_prg_window(Pico_mcd->m.busreq, d);\r |
7a1f6e45 |
194 | }\r |
ba6e8bfd |
195 | \r |
196 | // 2M mode state is tracked regardless of current mode\r |
197 | if (d & 2) {\r |
198 | Pico_mcd->m.dmna_ret_2m |= 2;\r |
199 | Pico_mcd->m.dmna_ret_2m &= ~1;\r |
200 | }\r |
201 | if (dold & 4) { // 1M mode\r |
202 | d ^= 2; // 0 sets DMNA, 1 does nothing\r |
203 | d = (d & 0xc2) | (dold & 0x1f);\r |
204 | }\r |
205 | else\r |
206 | d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;\r |
207 | \r |
08769494 |
208 | goto write_comm;\r |
c459aefd |
209 | case 6:\r |
d1df8786 |
210 | Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r |
c459aefd |
211 | return;\r |
212 | case 7:\r |
d1df8786 |
213 | Pico_mcd->bios[0x72] = d;\r |
af37bca8 |
214 | elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r |
215 | ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r |
c459aefd |
216 | return;\r |
08769494 |
217 | case 0x0f:\r |
08769494 |
218 | a = 0x0e;\r |
219 | case 0x0e:\r |
220 | goto write_comm;\r |
672ad671 |
221 | }\r |
222 | \r |
08769494 |
223 | if ((a&0xf0) == 0x10)\r |
224 | goto write_comm;\r |
cc68a136 |
225 | \r |
ca61ee42 |
226 | elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r |
08769494 |
227 | return;\r |
228 | \r |
229 | write_comm:\r |
230 | if (d == Pico_mcd->s68k_regs[a])\r |
231 | return;\r |
232 | \r |
233 | Pico_mcd->s68k_regs[a] = d;\r |
234 | pcd_sync_s68k(SekCyclesDone(), 0);\r |
235 | if (Pico_mcd->m.s68k_poll_a == a && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r |
236 | SekSetStopS68k(0);\r |
237 | Pico_mcd->m.s68k_poll_a = 0;\r |
238 | elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r |
239 | }\r |
cc68a136 |
240 | }\r |
241 | \r |
2433f409 |
242 | #ifndef _ASM_CD_MEMORY_C\r |
243 | static\r |
244 | #endif\r |
245 | u32 s68k_poll_detect(u32 a, u32 d)\r |
246 | {\r |
247 | #ifdef USE_POLL_DETECT\r |
08769494 |
248 | u32 cycles, cnt = 0;\r |
249 | if (SekIsStoppedS68k())\r |
250 | return d;\r |
251 | \r |
252 | cycles = SekCyclesDoneS68k();\r |
253 | if (a == Pico_mcd->m.s68k_poll_a) {\r |
254 | u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;\r |
2433f409 |
255 | if (clkdiff <= POLL_CYCLES) {\r |
08769494 |
256 | cnt = Pico_mcd->m.s68k_poll_cnt + 1;\r |
257 | //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r |
258 | if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r |
2433f409 |
259 | SekSetStopS68k(1);\r |
cc5ffc3c |
260 | elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",\r |
08769494 |
261 | SekPcS68k, a);\r |
2433f409 |
262 | }\r |
2433f409 |
263 | }\r |
264 | }\r |
08769494 |
265 | Pico_mcd->m.s68k_poll_a = a;\r |
266 | Pico_mcd->m.s68k_poll_clk = cycles;\r |
267 | Pico_mcd->m.s68k_poll_cnt = cnt;\r |
2433f409 |
268 | #endif\r |
269 | return d;\r |
270 | }\r |
cc68a136 |
271 | \r |
913ef4b7 |
272 | #define READ_FONT_DATA(basemask) \\r |
273 | { \\r |
274 | unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \\r |
275 | unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \\r |
276 | if (fnt & (basemask << 0)) d = col1 ; else d = col0; \\r |
277 | if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \\r |
278 | if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \\r |
279 | if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \\r |
280 | }\r |
281 | \r |
cc68a136 |
282 | \r |
4ff2d527 |
283 | #ifndef _ASM_CD_MEMORY_C\r |
284 | static\r |
285 | #endif\r |
286 | u32 s68k_reg_read16(u32 a)\r |
cc68a136 |
287 | {\r |
288 | u32 d=0;\r |
cc68a136 |
289 | \r |
cc68a136 |
290 | switch (a) {\r |
291 | case 0:\r |
7a1f6e45 |
292 | return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state\r |
672ad671 |
293 | case 2:\r |
2433f409 |
294 | d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);\r |
af37bca8 |
295 | elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);\r |
2433f409 |
296 | return s68k_poll_detect(a, d);\r |
cc68a136 |
297 | case 6:\r |
7a1f6e45 |
298 | return CDC_Read_Reg();\r |
cc68a136 |
299 | case 8:\r |
7a1f6e45 |
300 | return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r |
cc68a136 |
301 | case 0xC:\r |
ae214f1c |
302 | d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r |
303 | d /= 384;\r |
304 | d &= 0x0fff;\r |
af37bca8 |
305 | elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r |
7a1f6e45 |
306 | return d;\r |
d1df8786 |
307 | case 0x30:\r |
af37bca8 |
308 | elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);\r |
7a1f6e45 |
309 | return Pico_mcd->s68k_regs[31];\r |
cc68a136 |
310 | case 0x34: // fader\r |
7a1f6e45 |
311 | return 0; // no busy bit\r |
913ef4b7 |
312 | case 0x50: // font data (check: Lunar 2, Silpheed)\r |
313 | READ_FONT_DATA(0x00100000);\r |
7a1f6e45 |
314 | return d;\r |
913ef4b7 |
315 | case 0x52:\r |
316 | READ_FONT_DATA(0x00010000);\r |
7a1f6e45 |
317 | return d;\r |
913ef4b7 |
318 | case 0x54:\r |
319 | READ_FONT_DATA(0x10000000);\r |
7a1f6e45 |
320 | return d;\r |
913ef4b7 |
321 | case 0x56:\r |
322 | READ_FONT_DATA(0x01000000);\r |
7a1f6e45 |
323 | return d;\r |
cc68a136 |
324 | }\r |
325 | \r |
326 | d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r |
327 | \r |
2433f409 |
328 | if (a >= 0x0e && a < 0x30)\r |
329 | return s68k_poll_detect(a, d);\r |
7a1f6e45 |
330 | \r |
cc68a136 |
331 | return d;\r |
332 | }\r |
333 | \r |
4ff2d527 |
334 | #ifndef _ASM_CD_MEMORY_C\r |
335 | static\r |
336 | #endif\r |
337 | void s68k_reg_write8(u32 a, u32 d)\r |
cc68a136 |
338 | {\r |
48e8482f |
339 | // Warning: d might have upper bits set\r |
cc68a136 |
340 | switch (a) {\r |
672ad671 |
341 | case 2:\r |
342 | return; // only m68k can change WP\r |
fa1e5e29 |
343 | case 3: {\r |
344 | int dold = Pico_mcd->s68k_regs[3];\r |
af37bca8 |
345 | elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r |
672ad671 |
346 | d &= 0x1d;\r |
af37bca8 |
347 | d |= dold & 0xc2;\r |
ba6e8bfd |
348 | \r |
349 | // 2M mode state\r |
350 | if (d & 1) {\r |
351 | Pico_mcd->m.dmna_ret_2m |= 1;\r |
352 | Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears\r |
353 | }\r |
354 | \r |
af37bca8 |
355 | if (d & 4)\r |
39230401 |
356 | {\r |
fa1e5e29 |
357 | if (!(dold & 4)) {\r |
af37bca8 |
358 | elprintf(EL_CDREG3, "wram mode 2M->1M");\r |
fa1e5e29 |
359 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
4ff2d527 |
360 | }\r |
ba6e8bfd |
361 | \r |
362 | if ((d ^ dold) & 0x1d)\r |
363 | remap_word_ram(d);\r |
364 | \r |
365 | if ((d ^ dold) & 0x05)\r |
366 | d &= ~2; // clear DMNA - swap complete\r |
39230401 |
367 | }\r |
368 | else\r |
369 | {\r |
fa1e5e29 |
370 | if (dold & 4) {\r |
af37bca8 |
371 | elprintf(EL_CDREG3, "wram mode 1M->2M");\r |
fa1e5e29 |
372 | wram_1M_to_2M(Pico_mcd->word_ram2M);\r |
0ace9b9a |
373 | remap_word_ram(d);\r |
4ff2d527 |
374 | }\r |
ba6e8bfd |
375 | d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;\r |
d0d47c5b |
376 | }\r |
08769494 |
377 | goto write_comm;\r |
fa1e5e29 |
378 | }\r |
cc68a136 |
379 | case 4:\r |
af37bca8 |
380 | elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r |
cc68a136 |
381 | Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode\r |
382 | return;\r |
383 | case 5:\r |
c459aefd |
384 | //dprintf("s68k CDC reg addr: %x", d&0xf);\r |
cc68a136 |
385 | break;\r |
386 | case 7:\r |
387 | CDC_Write_Reg(d);\r |
388 | return;\r |
389 | case 0xa:\r |
af37bca8 |
390 | elprintf(EL_CDREGS, "s68k set CDC dma addr");\r |
cc68a136 |
391 | break;\r |
d1df8786 |
392 | case 0xc:\r |
ae214f1c |
393 | case 0xd: // 384 cycle stopwatch timer\r |
394 | elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r |
395 | // does this also reset internal 384 cycle counter?\r |
396 | Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r |
4f265db7 |
397 | return;\r |
08769494 |
398 | case 0x0e:\r |
08769494 |
399 | a = 0x0f;\r |
400 | case 0x0f:\r |
401 | goto write_comm;\r |
ae214f1c |
402 | case 0x31: // 384 cycle int3 timer\r |
403 | d &= 0xff;\r |
404 | elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r |
405 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
406 | if (d) // d or d+1??\r |
407 | pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r |
408 | else\r |
409 | pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r |
d1df8786 |
410 | break;\r |
cc68a136 |
411 | case 0x33: // IRQ mask\r |
ae214f1c |
412 | elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r |
413 | d &= 0x7e;\r |
414 | if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r |
415 | if (Pico_mcd->s68k_regs[0x37] & 4)\r |
416 | CDD_Export_Status();\r |
cc68a136 |
417 | }\r |
418 | break;\r |
419 | case 0x34: // fader\r |
420 | Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;\r |
421 | return;\r |
672ad671 |
422 | case 0x36:\r |
423 | return; // d/m bit is unsetable\r |
424 | case 0x37: {\r |
425 | u32 d_old = Pico_mcd->s68k_regs[0x37];\r |
426 | Pico_mcd->s68k_regs[0x37] = d&7;\r |
427 | if ((d&4) && !(d_old&4)) {\r |
cc68a136 |
428 | CDD_Export_Status();\r |
cc68a136 |
429 | }\r |
672ad671 |
430 | return;\r |
431 | }\r |
cc68a136 |
432 | case 0x4b:\r |
433 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
434 | CDD_Import_Command();\r |
435 | return;\r |
436 | }\r |
437 | \r |
08769494 |
438 | if ((a&0x1f0) == 0x20)\r |
439 | goto write_comm;\r |
440 | \r |
1cd356a3 |
441 | if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r |
cc68a136 |
442 | {\r |
ca61ee42 |
443 | elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r |
cc68a136 |
444 | return;\r |
445 | }\r |
446 | \r |
08769494 |
447 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
448 | return;\r |
bc3c13d3 |
449 | \r |
08769494 |
450 | write_comm:\r |
cc68a136 |
451 | Pico_mcd->s68k_regs[a] = (u8) d;\r |
08769494 |
452 | if (Pico_mcd->m.m68k_poll_cnt)\r |
453 | SekEndRunS68k(0);\r |
454 | Pico_mcd->m.m68k_poll_cnt = 0;\r |
cc68a136 |
455 | }\r |
456 | \r |
af37bca8 |
457 | // -----------------------------------------------------------------\r |
458 | // Main 68k\r |
459 | // -----------------------------------------------------------------\r |
cc68a136 |
460 | \r |
af37bca8 |
461 | #ifndef _ASM_CD_MEMORY_C\r |
462 | #include "cell_map.c"\r |
af37bca8 |
463 | \r |
464 | // WORD RAM, cell aranged area (220000 - 23ffff)\r |
0ace9b9a |
465 | static u32 PicoReadM68k8_cell0(u32 a)\r |
cc68a136 |
466 | {\r |
af37bca8 |
467 | a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r |
0ace9b9a |
468 | return Pico_mcd->word_ram1M[0][a ^ 1];\r |
469 | }\r |
470 | \r |
471 | static u32 PicoReadM68k8_cell1(u32 a)\r |
472 | {\r |
473 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
474 | return Pico_mcd->word_ram1M[1][a ^ 1];\r |
475 | }\r |
476 | \r |
477 | static u32 PicoReadM68k16_cell0(u32 a)\r |
478 | {\r |
479 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
480 | return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r |
af37bca8 |
481 | }\r |
cc68a136 |
482 | \r |
0ace9b9a |
483 | static u32 PicoReadM68k16_cell1(u32 a)\r |
af37bca8 |
484 | {\r |
af37bca8 |
485 | a = (a&2) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
486 | return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r |
af37bca8 |
487 | }\r |
cc68a136 |
488 | \r |
0ace9b9a |
489 | static void PicoWriteM68k8_cell0(u32 a, u32 d)\r |
af37bca8 |
490 | {\r |
af37bca8 |
491 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
492 | Pico_mcd->word_ram1M[0][a ^ 1] = d;\r |
af37bca8 |
493 | }\r |
8022f53d |
494 | \r |
0ace9b9a |
495 | static void PicoWriteM68k8_cell1(u32 a, u32 d)\r |
af37bca8 |
496 | {\r |
af37bca8 |
497 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
0ace9b9a |
498 | Pico_mcd->word_ram1M[1][a ^ 1] = d;\r |
af37bca8 |
499 | }\r |
500 | \r |
0ace9b9a |
501 | static void PicoWriteM68k16_cell0(u32 a, u32 d)\r |
502 | {\r |
503 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
504 | *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r |
505 | }\r |
506 | \r |
507 | static void PicoWriteM68k16_cell1(u32 a, u32 d)\r |
508 | {\r |
509 | a = (a&3) | (cell_map(a >> 2) << 2);\r |
510 | *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r |
511 | }\r |
512 | #endif\r |
513 | \r |
af37bca8 |
514 | // RAM cart (40000 - 7fffff, optional)\r |
515 | static u32 PicoReadM68k8_ramc(u32 a)\r |
516 | {\r |
517 | u32 d = 0;\r |
518 | if (a == 0x400001) {\r |
519 | if (SRam.data != NULL)\r |
520 | d = 3; // 64k cart\r |
521 | return d;\r |
8022f53d |
522 | }\r |
523 | \r |
af37bca8 |
524 | if ((a & 0xfe0000) == 0x600000) {\r |
525 | if (SRam.data != NULL)\r |
526 | d = SRam.data[((a >> 1) & 0xffff) + 0x2000];\r |
527 | return d;\r |
8022f53d |
528 | }\r |
529 | \r |
af37bca8 |
530 | if (a == 0x7fffff)\r |
531 | return Pico_mcd->m.bcram_reg;\r |
cc68a136 |
532 | \r |
af37bca8 |
533 | elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
cc68a136 |
534 | return d;\r |
535 | }\r |
536 | \r |
af37bca8 |
537 | static u32 PicoReadM68k16_ramc(u32 a)\r |
cc68a136 |
538 | {\r |
af37bca8 |
539 | elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r |
540 | return PicoReadM68k8_ramc(a + 1);\r |
541 | }\r |
cc68a136 |
542 | \r |
af37bca8 |
543 | static void PicoWriteM68k8_ramc(u32 a, u32 d)\r |
544 | {\r |
545 | if ((a & 0xfe0000) == 0x600000) {\r |
546 | if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {\r |
547 | SRam.data[((a>>1) & 0xffff) + 0x2000] = d;\r |
8022f53d |
548 | SRam.changed = 1;\r |
549 | }\r |
550 | return;\r |
551 | }\r |
552 | \r |
af37bca8 |
553 | if (a == 0x7fffff) {\r |
554 | Pico_mcd->m.bcram_reg = d;\r |
8022f53d |
555 | return;\r |
556 | }\r |
557 | \r |
af37bca8 |
558 | elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
cc68a136 |
559 | }\r |
560 | \r |
af37bca8 |
561 | static void PicoWriteM68k16_ramc(u32 a, u32 d)\r |
cc68a136 |
562 | {\r |
af37bca8 |
563 | elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
564 | PicoWriteM68k8_ramc(a + 1, d);\r |
cc68a136 |
565 | }\r |
566 | \r |
af37bca8 |
567 | // IO/control/cd registers (a10000 - ...)\r |
0ace9b9a |
568 | #ifndef _ASM_CD_MEMORY_C\r |
af37bca8 |
569 | static u32 PicoReadM68k8_io(u32 a)\r |
cc68a136 |
570 | {\r |
af37bca8 |
571 | u32 d;\r |
572 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
573 | d = m68k_reg_read16(a); // TODO: m68k_reg_read8\r |
574 | if (!(a & 1))\r |
575 | d >>= 8;\r |
576 | d &= 0xff;\r |
577 | elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);\r |
578 | return d;\r |
579 | }\r |
580 | \r |
581 | // fallback to default MD handler\r |
582 | return PicoRead8_io(a);\r |
cc68a136 |
583 | }\r |
584 | \r |
af37bca8 |
585 | static u32 PicoReadM68k16_io(u32 a)\r |
cc68a136 |
586 | {\r |
af37bca8 |
587 | u32 d;\r |
588 | if ((a & 0xff00) == 0x2000) {\r |
589 | d = m68k_reg_read16(a);\r |
590 | elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);\r |
591 | return d;\r |
b542be46 |
592 | }\r |
cc68a136 |
593 | \r |
af37bca8 |
594 | return PicoRead16_io(a);\r |
cc68a136 |
595 | }\r |
596 | \r |
af37bca8 |
597 | static void PicoWriteM68k8_io(u32 a, u32 d)\r |
cc68a136 |
598 | {\r |
af37bca8 |
599 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
600 | elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);\r |
2433f409 |
601 | m68k_reg_write8(a, d);\r |
602 | return;\r |
603 | }\r |
672ad671 |
604 | \r |
af37bca8 |
605 | PicoWrite16_io(a, d);\r |
cc68a136 |
606 | }\r |
ab0607f7 |
607 | \r |
af37bca8 |
608 | static void PicoWriteM68k16_io(u32 a, u32 d)\r |
cc68a136 |
609 | {\r |
af37bca8 |
610 | if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r |
611 | elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r |
08769494 |
612 | \r |
af37bca8 |
613 | m68k_reg_write8(a, d >> 8);\r |
08769494 |
614 | if ((a & 0x3e) != 0x0e) // special case\r |
615 | m68k_reg_write8(a + 1, d & 0xff);\r |
b542be46 |
616 | return;\r |
617 | }\r |
618 | \r |
af37bca8 |
619 | PicoWrite16_io(a, d);\r |
cc68a136 |
620 | }\r |
0ace9b9a |
621 | #endif\r |
cc68a136 |
622 | \r |
721cd396 |
623 | // -----------------------------------------------------------------\r |
af37bca8 |
624 | // Sub 68k\r |
cc68a136 |
625 | // -----------------------------------------------------------------\r |
626 | \r |
af37bca8 |
627 | static u32 s68k_unmapped_read8(u32 a)\r |
cc68a136 |
628 | {\r |
af37bca8 |
629 | elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);\r |
630 | return 0;\r |
cc68a136 |
631 | }\r |
632 | \r |
af37bca8 |
633 | static u32 s68k_unmapped_read16(u32 a)\r |
cc68a136 |
634 | {\r |
af37bca8 |
635 | elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);\r |
636 | return 0;\r |
637 | }\r |
4f265db7 |
638 | \r |
af37bca8 |
639 | static void s68k_unmapped_write8(u32 a, u32 d)\r |
640 | {\r |
641 | elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);\r |
642 | }\r |
cc68a136 |
643 | \r |
af37bca8 |
644 | static void s68k_unmapped_write16(u32 a, u32 d)\r |
645 | {\r |
646 | elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r |
647 | }\r |
cc68a136 |
648 | \r |
59991f11 |
649 | // PRG RAM protected range (000000 - 01fdff)?\r |
0ace9b9a |
650 | // XXX verify: ff00 or 1fe00 max?\r |
651 | static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r |
652 | {\r |
59991f11 |
653 | if (a >= (Pico_mcd->s68k_regs[2] << 9))\r |
0ace9b9a |
654 | Pico_mcd->prg_ram[a ^ 1] = d;\r |
655 | }\r |
656 | \r |
657 | static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r |
658 | {\r |
59991f11 |
659 | if (a >= (Pico_mcd->s68k_regs[2] << 9))\r |
0ace9b9a |
660 | *(u16 *)(Pico_mcd->prg_ram + a) = d;\r |
661 | }\r |
662 | \r |
663 | #ifndef _ASM_CD_MEMORY_C\r |
664 | \r |
af37bca8 |
665 | // decode (080000 - 0bffff, in 1M mode)\r |
0ace9b9a |
666 | static u32 PicoReadS68k8_dec0(u32 a)\r |
667 | {\r |
668 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
669 | if (a & 1)\r |
670 | d &= 0x0f;\r |
671 | else\r |
672 | d >>= 4;\r |
673 | return d;\r |
674 | }\r |
675 | \r |
676 | static u32 PicoReadS68k8_dec1(u32 a)\r |
af37bca8 |
677 | {\r |
0ace9b9a |
678 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
679 | if (a & 1)\r |
680 | d &= 0x0f;\r |
681 | else\r |
682 | d >>= 4;\r |
cc68a136 |
683 | return d;\r |
684 | }\r |
685 | \r |
0ace9b9a |
686 | static u32 PicoReadS68k16_dec0(u32 a)\r |
cc68a136 |
687 | {\r |
0ace9b9a |
688 | u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r |
af37bca8 |
689 | d |= d << 4;\r |
690 | d &= ~0xf0;\r |
cc68a136 |
691 | return d;\r |
692 | }\r |
ab0607f7 |
693 | \r |
0ace9b9a |
694 | static u32 PicoReadS68k16_dec1(u32 a)\r |
0a051f55 |
695 | {\r |
0ace9b9a |
696 | u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r |
697 | d |= d << 4;\r |
698 | d &= ~0xf0;\r |
699 | return d;\r |
0a051f55 |
700 | }\r |
701 | \r |
0ace9b9a |
702 | /* check: jaguar xj 220 (draws entire world using decode) */\r |
703 | #define mk_decode_w8(bank) \\r |
704 | static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \\r |
705 | { \\r |
706 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
707 | \\r |
708 | if (!(a & 1)) \\r |
709 | *pd = (*pd & 0x0f) | (d << 4); \\r |
710 | else \\r |
711 | *pd = (*pd & 0xf0) | (d & 0x0f); \\r |
712 | } \\r |
713 | \\r |
714 | static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \\r |
715 | { \\r |
716 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
717 | u8 mask = (a & 1) ? 0x0f : 0xf0; \\r |
718 | \\r |
719 | if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \\r |
720 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
721 | } \\r |
722 | \\r |
723 | static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r |
724 | { \\r |
725 | if (d & 0x0f) /* overwrite */ \\r |
726 | PicoWriteS68k8_dec_m0b##bank(a, d); \\r |
727 | }\r |
0a051f55 |
728 | \r |
0ace9b9a |
729 | mk_decode_w8(0)\r |
730 | mk_decode_w8(1)\r |
731 | \r |
732 | #define mk_decode_w16(bank) \\r |
733 | static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \\r |
734 | { \\r |
735 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
736 | \\r |
737 | d &= 0x0f0f; \\r |
738 | *pd = d | (d >> 4); \\r |
739 | } \\r |
740 | \\r |
741 | static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \\r |
742 | { \\r |
743 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
744 | \\r |
745 | d &= 0x0f0f; /* underwrite */ \\r |
746 | if (!(*pd & 0xf0)) *pd |= d >> 4; \\r |
747 | if (!(*pd & 0x0f)) *pd |= d; \\r |
748 | } \\r |
749 | \\r |
750 | static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \\r |
751 | { \\r |
752 | u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r |
753 | \\r |
754 | d &= 0x0f0f; /* overwrite */ \\r |
755 | d |= d >> 4; \\r |
756 | \\r |
757 | if (!(d & 0xf0)) d |= *pd & 0xf0; \\r |
758 | if (!(d & 0x0f)) d |= *pd & 0x0f; \\r |
759 | *pd = d; \\r |
760 | }\r |
0a051f55 |
761 | \r |
0ace9b9a |
762 | mk_decode_w16(0)\r |
763 | mk_decode_w16(1)\r |
0a051f55 |
764 | \r |
0ace9b9a |
765 | #endif\r |
0a051f55 |
766 | \r |
af37bca8 |
767 | // backup RAM (fe0000 - feffff)\r |
768 | static u32 PicoReadS68k8_bram(u32 a)\r |
769 | {\r |
770 | return Pico_mcd->bram[(a>>1)&0x1fff];\r |
771 | }\r |
cc68a136 |
772 | \r |
af37bca8 |
773 | static u32 PicoReadS68k16_bram(u32 a)\r |
cc68a136 |
774 | {\r |
af37bca8 |
775 | u32 d;\r |
776 | elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);\r |
777 | a = (a >> 1) & 0x1fff;\r |
778 | d = Pico_mcd->bram[a++];\r |
779 | d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify\r |
780 | return d;\r |
781 | }\r |
cc68a136 |
782 | \r |
af37bca8 |
783 | static void PicoWriteS68k8_bram(u32 a, u32 d)\r |
784 | {\r |
785 | Pico_mcd->bram[(a >> 1) & 0x1fff] = d;\r |
786 | SRam.changed = 1;\r |
787 | }\r |
cc68a136 |
788 | \r |
af37bca8 |
789 | static void PicoWriteS68k16_bram(u32 a, u32 d)\r |
790 | {\r |
791 | elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);\r |
792 | a = (a >> 1) & 0x1fff;\r |
793 | Pico_mcd->bram[a++] = d;\r |
794 | Pico_mcd->bram[a++] = d >> 8; // TODO: verify..\r |
795 | SRam.changed = 1;\r |
796 | }\r |
b5e5172d |
797 | \r |
0ace9b9a |
798 | #ifndef _ASM_CD_MEMORY_C\r |
799 | \r |
af37bca8 |
800 | // PCM and registers (ff0000 - ffffff)\r |
801 | static u32 PicoReadS68k8_pr(u32 a)\r |
802 | {\r |
803 | u32 d = 0;\r |
cc68a136 |
804 | \r |
805 | // regs\r |
af37bca8 |
806 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
807 | a &= 0x1ff;\r |
af37bca8 |
808 | if (a >= 0x0e && a < 0x30) {\r |
809 | d = Pico_mcd->s68k_regs[a];\r |
810 | s68k_poll_detect(a, d);\r |
ba6e8bfd |
811 | goto regs_done;\r |
d0d47c5b |
812 | }\r |
af37bca8 |
813 | else if (a >= 0x58 && a < 0x68)\r |
814 | d = gfx_cd_read(a & ~1);\r |
815 | else d = s68k_reg_read16(a & ~1);\r |
816 | if (!(a & 1))\r |
817 | d >>= 8;\r |
ba6e8bfd |
818 | \r |
819 | regs_done:\r |
820 | d &= 0xff;\r |
cc5ffc3c |
821 | elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x",\r |
ba6e8bfd |
822 | a, d, SekPcS68k);\r |
823 | return d;\r |
d0d47c5b |
824 | }\r |
825 | \r |
4f265db7 |
826 | // PCM\r |
0ace9b9a |
827 | // XXX: verify: probably odd addrs only?\r |
af37bca8 |
828 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
829 | a &= 0x7fff;\r |
830 | if (a >= 0x2000)\r |
af37bca8 |
831 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];\r |
832 | else if (a >= 0x20) {\r |
833 | a &= 0x1e;\r |
834 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
835 | if (a & 2)\r |
836 | d >>= 8;\r |
837 | }\r |
838 | return d & 0xff;\r |
ab0607f7 |
839 | }\r |
840 | \r |
af37bca8 |
841 | return s68k_unmapped_read8(a);\r |
cc68a136 |
842 | }\r |
843 | \r |
af37bca8 |
844 | static u32 PicoReadS68k16_pr(u32 a)\r |
cc68a136 |
845 | {\r |
af37bca8 |
846 | u32 d = 0;\r |
cc68a136 |
847 | \r |
848 | // regs\r |
af37bca8 |
849 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
850 | a &= 0x1fe;\r |
af37bca8 |
851 | if (0x58 <= a && a < 0x68)\r |
852 | d = gfx_cd_read(a);\r |
853 | else d = s68k_reg_read16(a);\r |
ba6e8bfd |
854 | \r |
cc5ffc3c |
855 | elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x",\r |
ba6e8bfd |
856 | a, d, SekPcS68k);\r |
af37bca8 |
857 | return d;\r |
cc68a136 |
858 | }\r |
859 | \r |
af37bca8 |
860 | // PCM\r |
861 | if ((a & 0x8000) == 0x0000) {\r |
862 | //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);\r |
863 | a &= 0x7fff;\r |
864 | if (a >= 0x2000)\r |
865 | d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];\r |
866 | else if (a >= 0x20) {\r |
867 | a &= 0x1e;\r |
868 | d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;\r |
869 | if (a & 2) d >>= 8;\r |
d0d47c5b |
870 | }\r |
af37bca8 |
871 | elprintf(EL_CDREGS, "ret = %04x", d);\r |
872 | return d;\r |
d0d47c5b |
873 | }\r |
874 | \r |
af37bca8 |
875 | return s68k_unmapped_read16(a);\r |
876 | }\r |
877 | \r |
878 | static void PicoWriteS68k8_pr(u32 a, u32 d)\r |
879 | {\r |
880 | // regs\r |
881 | if ((a & 0xfe00) == 0x8000) {\r |
882 | a &= 0x1ff;\r |
cc5ffc3c |
883 | elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k);\r |
af37bca8 |
884 | if (0x58 <= a && a < 0x68)\r |
885 | gfx_cd_write16(a&~1, (d<<8)|d);\r |
886 | else s68k_reg_write8(a,d);\r |
d0d47c5b |
887 | return;\r |
888 | }\r |
889 | \r |
4f265db7 |
890 | // PCM\r |
af37bca8 |
891 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
892 | a &= 0x7fff;\r |
893 | if (a >= 0x2000)\r |
894 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
895 | else if (a < 0x12)\r |
af37bca8 |
896 | pcm_write(a>>1, d);\r |
ab0607f7 |
897 | return;\r |
898 | }\r |
899 | \r |
af37bca8 |
900 | s68k_unmapped_write8(a, d);\r |
cc68a136 |
901 | }\r |
ab0607f7 |
902 | \r |
af37bca8 |
903 | static void PicoWriteS68k16_pr(u32 a, u32 d)\r |
cc68a136 |
904 | {\r |
cc68a136 |
905 | // regs\r |
af37bca8 |
906 | if ((a & 0xfe00) == 0x8000) {\r |
cb4a513a |
907 | a &= 0x1fe;\r |
cc5ffc3c |
908 | elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k);\r |
af37bca8 |
909 | if (a >= 0x58 && a < 0x68)\r |
910 | gfx_cd_write16(a, d);\r |
911 | else {\r |
912 | if (a == 0xe) {\r |
913 | // special case, 2 byte writes would be handled differently\r |
914 | // TODO: verify\r |
915 | Pico_mcd->s68k_regs[0xf] = d;\r |
916 | return;\r |
917 | }\r |
918 | s68k_reg_write8(a, d >> 8);\r |
919 | s68k_reg_write8(a + 1, d & 0xff);\r |
d0d47c5b |
920 | }\r |
921 | return;\r |
922 | }\r |
923 | \r |
4f265db7 |
924 | // PCM\r |
af37bca8 |
925 | if ((a & 0x8000) == 0x0000) {\r |
4f265db7 |
926 | a &= 0x7fff;\r |
af37bca8 |
927 | if (a >= 0x2000)\r |
928 | Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;\r |
929 | else if (a < 0x12)\r |
930 | pcm_write(a>>1, d & 0xff);\r |
ab0607f7 |
931 | return;\r |
932 | }\r |
933 | \r |
af37bca8 |
934 | s68k_unmapped_write16(a, d);\r |
cc68a136 |
935 | }\r |
cc68a136 |
936 | \r |
0ace9b9a |
937 | #endif\r |
938 | \r |
939 | static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r |
940 | static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r |
941 | static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r |
942 | static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r |
943 | \r |
944 | static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r |
945 | static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r |
946 | \r |
947 | static const void *s68k_dec_write8[2][4] = {\r |
948 | { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r |
949 | { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r |
950 | };\r |
951 | \r |
952 | static const void *s68k_dec_write16[2][4] = {\r |
953 | { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r |
954 | { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r |
955 | };\r |
956 | \r |
cc68a136 |
957 | // -----------------------------------------------------------------\r |
958 | \r |
4fb43555 |
959 | static void remap_prg_window(u32 r1, u32 r3)\r |
3aa1e148 |
960 | {\r |
af37bca8 |
961 | // PRG RAM\r |
4fb43555 |
962 | if (r1 & 2) {\r |
963 | void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];\r |
af37bca8 |
964 | cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r |
965 | }\r |
966 | else {\r |
967 | m68k_map_unmap(0x020000, 0x03ffff);\r |
968 | }\r |
0ace9b9a |
969 | }\r |
970 | \r |
4fb43555 |
971 | static void remap_word_ram(u32 r3)\r |
0ace9b9a |
972 | {\r |
973 | void *bank;\r |
af37bca8 |
974 | \r |
975 | // WORD RAM\r |
976 | if (!(r3 & 4)) {\r |
977 | // 2M mode. XXX: allowing access in all cases for simplicity\r |
978 | bank = Pico_mcd->word_ram2M;\r |
979 | cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r |
980 | cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r |
981 | // TODO: handle 0x0c0000\r |
982 | }\r |
983 | else {\r |
0ace9b9a |
984 | int b0 = r3 & 1;\r |
985 | int m = (r3 & 0x18) >> 3;\r |
986 | bank = Pico_mcd->word_ram1M[b0];\r |
af37bca8 |
987 | cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r |
0ace9b9a |
988 | bank = Pico_mcd->word_ram1M[b0 ^ 1];\r |
af37bca8 |
989 | cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r |
990 | // "cell arrange" on m68k\r |
0ace9b9a |
991 | cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r |
992 | cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r |
993 | cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r |
994 | cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r |
af37bca8 |
995 | // "decode format" on s68k\r |
0ace9b9a |
996 | cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r |
997 | cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r |
998 | cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r |
999 | cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r |
af37bca8 |
1000 | }\r |
1001 | \r |
3aa1e148 |
1002 | #ifdef EMU_F68K\r |
1003 | // update fetchmap..\r |
1004 | int i;\r |
1005 | if (!(r3 & 4))\r |
1006 | {\r |
1007 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r |
be26eb23 |
1008 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;\r |
3aa1e148 |
1009 | }\r |
1010 | else\r |
1011 | {\r |
1012 | for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r |
be26eb23 |
1013 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r |
3aa1e148 |
1014 | for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r |
be26eb23 |
1015 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r |
3aa1e148 |
1016 | }\r |
1017 | #endif\r |
1018 | }\r |
b837b69b |
1019 | \r |
ae214f1c |
1020 | void pcd_state_loaded_mem(void)\r |
0ace9b9a |
1021 | {\r |
4fb43555 |
1022 | u32 r3 = Pico_mcd->s68k_regs[3];\r |
0ace9b9a |
1023 | \r |
1024 | /* after load events */\r |
1025 | if (r3 & 4) // 1M mode?\r |
1026 | wram_2M_to_1M(Pico_mcd->word_ram2M);\r |
1027 | remap_word_ram(r3);\r |
4fb43555 |
1028 | remap_prg_window(Pico_mcd->m.busreq, r3);\r |
ba6e8bfd |
1029 | Pico_mcd->m.dmna_ret_2m &= 3;\r |
0ace9b9a |
1030 | \r |
1031 | // restore hint vector\r |
1032 | *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r |
1033 | }\r |
1034 | \r |
9037e45d |
1035 | #ifdef EMU_M68K\r |
1036 | static void m68k_mem_setup_cd(void);\r |
1037 | #endif\r |
1038 | \r |
eff55556 |
1039 | PICO_INTERNAL void PicoMemSetupCD(void)\r |
b837b69b |
1040 | {\r |
af37bca8 |
1041 | // setup default main68k map\r |
1042 | PicoMemSetup();\r |
1043 | \r |
af37bca8 |
1044 | // main68k map (BIOS mapped by PicoMemSetup()):\r |
1045 | // RAM cart\r |
1046 | if (PicoOpt & POPT_EN_MCD_RAMCART) {\r |
1047 | cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);\r |
1048 | cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);\r |
1049 | cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);\r |
1050 | cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);\r |
1051 | }\r |
1052 | \r |
1053 | // registers/IO:\r |
1054 | cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);\r |
1055 | cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);\r |
1056 | cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);\r |
1057 | cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);\r |
1058 | \r |
1059 | // sub68k map\r |
1060 | cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);\r |
1061 | cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);\r |
1062 | cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);\r |
1063 | cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r |
1064 | \r |
1065 | // PRG RAM\r |
1066 | cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1067 | cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1068 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
1069 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r |
59991f11 |
1070 | cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);\r |
1071 | cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);\r |
af37bca8 |
1072 | \r |
1073 | // BRAM\r |
1074 | cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r |
1075 | cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r |
1076 | cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r |
1077 | cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r |
1078 | \r |
1079 | // PCM, regs\r |
1080 | cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r |
1081 | cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r |
1082 | cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r |
1083 | cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r |
f53f286a |
1084 | \r |
0ace9b9a |
1085 | // RAMs\r |
1086 | remap_word_ram(1);\r |
1087 | \r |
b837b69b |
1088 | #ifdef EMU_C68K\r |
b837b69b |
1089 | // s68k\r |
5e89f0f5 |
1090 | PicoCpuCS68k.read8 = (void *)s68k_read8_map;\r |
1091 | PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r |
1092 | PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r |
1093 | PicoCpuCS68k.write8 = (void *)s68k_write8_map;\r |
1094 | PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r |
1095 | PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r |
1096 | PicoCpuCS68k.checkpc = NULL; /* unused */\r |
1097 | PicoCpuCS68k.fetch8 = NULL;\r |
1098 | PicoCpuCS68k.fetch16 = NULL;\r |
1099 | PicoCpuCS68k.fetch32 = NULL;\r |
b837b69b |
1100 | #endif\r |
3aa1e148 |
1101 | #ifdef EMU_F68K\r |
3aa1e148 |
1102 | // s68k\r |
af37bca8 |
1103 | PicoCpuFS68k.read_byte = s68k_read8;\r |
1104 | PicoCpuFS68k.read_word = s68k_read16;\r |
1105 | PicoCpuFS68k.read_long = s68k_read32;\r |
1106 | PicoCpuFS68k.write_byte = s68k_write8;\r |
1107 | PicoCpuFS68k.write_word = s68k_write16;\r |
1108 | PicoCpuFS68k.write_long = s68k_write32;\r |
3aa1e148 |
1109 | \r |
1110 | // setup FAME fetchmap\r |
1111 | {\r |
1112 | int i;\r |
1113 | // M68k\r |
1114 | // by default, point everything to fitst 64k of ROM (BIOS)\r |
1115 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1116 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1117 | // now real ROM (BIOS)\r |
1118 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r |
be26eb23 |
1119 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r |
3aa1e148 |
1120 | // .. and RAM\r |
1121 | for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1122 | PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1123 | // S68k\r |
1124 | // PRG RAM is default\r |
1125 | for (i = 0; i < M68K_FETCHBANK1; i++)\r |
be26eb23 |
1126 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r |
3aa1e148 |
1127 | // real PRG RAM\r |
1128 | for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r |
be26eb23 |
1129 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r |
3aa1e148 |
1130 | // WORD RAM 2M area\r |
1131 | for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r |
be26eb23 |
1132 | PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r |
0ace9b9a |
1133 | // remap_word_ram() will setup word ram for both\r |
3aa1e148 |
1134 | }\r |
1135 | #endif\r |
9037e45d |
1136 | #ifdef EMU_M68K\r |
1137 | m68k_mem_setup_cd();\r |
1138 | #endif\r |
b837b69b |
1139 | }\r |
1140 | \r |
1141 | \r |
cc68a136 |
1142 | #ifdef EMU_M68K\r |
af37bca8 |
1143 | u32 m68k_read8(u32 a);\r |
1144 | u32 m68k_read16(u32 a);\r |
1145 | u32 m68k_read32(u32 a);\r |
1146 | void m68k_write8(u32 a, u8 d);\r |
1147 | void m68k_write16(u32 a, u16 d);\r |
1148 | void m68k_write32(u32 a, u32 d);\r |
1149 | \r |
9037e45d |
1150 | static unsigned int PicoReadCD8w (unsigned int a) {\r |
af37bca8 |
1151 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);\r |
cc68a136 |
1152 | }\r |
9037e45d |
1153 | static unsigned int PicoReadCD16w(unsigned int a) {\r |
af37bca8 |
1154 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);\r |
cc68a136 |
1155 | }\r |
9037e45d |
1156 | static unsigned int PicoReadCD32w(unsigned int a) {\r |
af37bca8 |
1157 | return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);\r |
cc68a136 |
1158 | }\r |
9037e45d |
1159 | static void PicoWriteCD8w (unsigned int a, unsigned char d) {\r |
af37bca8 |
1160 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);\r |
cc68a136 |
1161 | }\r |
9037e45d |
1162 | static void PicoWriteCD16w(unsigned int a, unsigned short d) {\r |
af37bca8 |
1163 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);\r |
cc68a136 |
1164 | }\r |
9037e45d |
1165 | static void PicoWriteCD32w(unsigned int a, unsigned int d) {\r |
af37bca8 |
1166 | if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r |
cc68a136 |
1167 | }\r |
1168 | \r |
9037e45d |
1169 | extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r |
1170 | extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r |
1171 | extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r |
1172 | extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r |
1173 | extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r |
1174 | extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r |
9037e45d |
1175 | \r |
1176 | static void m68k_mem_setup_cd(void)\r |
1177 | {\r |
1178 | pm68k_read_memory_8 = PicoReadCD8w;\r |
1179 | pm68k_read_memory_16 = PicoReadCD16w;\r |
1180 | pm68k_read_memory_32 = PicoReadCD32w;\r |
1181 | pm68k_write_memory_8 = PicoWriteCD8w;\r |
1182 | pm68k_write_memory_16 = PicoWriteCD16w;\r |
1183 | pm68k_write_memory_32 = PicoWriteCD32w;\r |
9037e45d |
1184 | }\r |
cc68a136 |
1185 | #endif // EMU_M68K\r |
1186 | \r |
ae214f1c |
1187 | // vim:shiftwidth=2:ts=2:expandtab\r |