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1 | /*\r |
2 | * PicoDrive\r |
3 | * (C) notaz, 2006-2009\r |
4 | *\r |
5 | * This work is licensed under the terms of MAME license.\r |
6 | * See COPYING file in the top-level directory.\r |
7 | */\r |
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8 | \r |
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9 | #include "pico_int_o32.h"\r |
10 | \r |
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11 | .equ SRR_MAPPED, (1 << 0)\r |
12 | .equ SRR_READONLY, (1 << 1)\r |
13 | .equ SRF_EEPROM, (1 << 1)\r |
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14 | .equ POPT_EN_32X, (1 << 20)\r |
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15 | \r |
16 | .text\r |
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17 | .align 4\r |
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18 | \r |
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19 | .global PicoRead8_sram\r |
20 | .global PicoRead8_io\r |
21 | .global PicoRead16_sram\r |
22 | .global PicoRead16_io\r |
23 | .global PicoWrite8_io\r |
24 | .global PicoWrite16_io\r |
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25 | \r |
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26 | PicoRead8_sram: @ u32 a\r |
27 | ldr r3, =Pico\r |
28 | ldr r1, [r3, #OFS_Pico_sv_end]\r |
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29 | cmp r0, r1\r |
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30 | bgt m_read8_nosram\r |
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31 | ldr r2, [r3, #OFS_Pico_sv_start]\r |
32 | cmp r0, r2\r |
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33 | blt m_read8_nosram\r |
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34 | ldrb r1, [r3, #OFS_Pico_m_sram_reg]\r |
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35 | tst r1, #SRR_MAPPED\r |
36 | beq m_read8_nosram\r |
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37 | ldr r1, [r3, #OFS_Pico_sv_flags]\r |
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38 | tst r1, #SRF_EEPROM\r |
39 | bne m_read8_eeprom\r |
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40 | ldr r1, [r3, #OFS_Pico_sv_data]\r |
41 | sub r0, r0, r2\r |
42 | ldrb r0, [r0, r1]\r |
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43 | bx lr\r |
44 | \r |
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45 | m_read8_nosram:\r |
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46 | ldr r1, [r3, #OFS_Pico_romsize]\r |
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47 | cmp r0, r1\r |
48 | movgt r0, #0\r |
49 | bxgt lr @ bad location\r |
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50 | @ XXX: banking unfriendly\r |
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51 | ldr r1, [r3, #OFS_Pico_rom]\r |
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52 | eor r0, r0, #1\r |
53 | ldrb r0, [r1, r0]\r |
54 | bx lr\r |
55 | \r |
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56 | m_read8_eeprom:\r |
57 | stmfd sp!,{r0,lr}\r |
58 | bl EEPROM_read\r |
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59 | ldmfd sp!,{r1,lr}\r |
60 | tst r1, #1\r |
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61 | moveq r0, r0, lsr #8\r |
62 | bx lr\r |
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63 | \r |
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64 | \r |
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65 | PicoRead8_io: @ u32 a\r |
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66 | bic r2, r0, #0x001f @ most commonly we get i/o port read,\r |
67 | cmp r2, #0xa10000 @ so check for it first\r |
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68 | beq io_ports_read\r |
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69 | \r |
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70 | m_read8_not_io:\r |
71 | and r2, r0, #0xfc00\r |
72 | cmp r2, #0x1000\r |
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73 | bne PicoRead8_32x\r |
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74 | \r |
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75 | ldr r3, =Pico\r |
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76 | mov r1, r0\r |
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77 | ldr r0, [r3, #OFS_Pico_m_rotate]\r |
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78 | add r0, r0, #1\r |
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79 | strb r0, [r3, #OFS_Pico_m_rotate]\r |
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80 | eor r0, r0, r0, lsl #6\r |
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81 | \r |
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82 | tst r1, #1\r |
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83 | bxne lr @ odd addr -> open bus\r |
84 | bic r0, r0, #1 @ bit0 defined in this area\r |
85 | and r2, r1, #0xff00\r |
86 | cmp r2, #0x1100\r |
87 | bxne lr @ not busreq\r |
88 | \r |
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89 | ldrb r1, [r3, #OFS_Pico_m_z80Run]\r |
90 | ldrb r2, [r3, #OFS_Pico_m_z80_reset]\r |
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91 | orr r0, r0, r1\r |
92 | orr r0, r0, r2\r |
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93 | bx lr\r |
94 | \r |
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95 | @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r |
96 | \r |
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97 | PicoRead16_sram: @ u32 a, u32 d\r |
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98 | ldr r3, =Pico\r |
99 | ldr r1, [r3, #OFS_Pico_sv_end]\r |
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100 | cmp r0, r1\r |
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101 | bgt m_read16_nosram\r |
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102 | ldr r2, [r3, #OFS_Pico_sv_start]\r |
103 | cmp r0, r2\r |
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104 | blt m_read16_nosram\r |
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105 | ldrb r1, [r3, #OFS_Pico_m_sram_reg]\r |
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106 | tst r1, #SRR_MAPPED\r |
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107 | beq m_read16_nosram\r |
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108 | ldr r1, [r3, #OFS_Pico_sv_flags]\r |
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109 | tst r1, #SRF_EEPROM\r |
110 | bne EEPROM_read\r |
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111 | ldr r1, [r3, #OFS_Pico_sv_data]\r |
112 | sub r0, r0, r2\r |
113 | ldrb r1, [r0, r1]!\r |
114 | ldrb r0, [r0, #1]\r |
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115 | orr r0, r0, r1, lsl #8\r |
116 | bx lr\r |
117 | \r |
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118 | m_read16_nosram:\r |
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119 | ldr r1, [r3, #OFS_Pico_romsize]\r |
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120 | cmp r0, r1\r |
121 | movgt r0, #0\r |
122 | bxgt lr @ bad location\r |
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123 | @ XXX: banking unfriendly\r |
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124 | ldr r1, [r3, #OFS_Pico_rom]\r |
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125 | ldrh r0, [r1, r0]\r |
126 | bx lr\r |
127 | \r |
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128 | \r |
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129 | PicoRead16_io: @ u32 a, u32 d\r |
130 | bic r2, r0, #0x001f @ most commonly we get i/o port read,\r |
131 | cmp r2, #0xa10000 @ so check for it first\r |
132 | bne m_read16_not_io\r |
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133 | stmfd sp!,{lr}\r |
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134 | bl io_ports_read @ same as read8\r |
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135 | orr r0, r0, r0, lsl #8 @ only has bytes mirrored\r |
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136 | ldmfd sp!,{pc}\r |
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137 | \r |
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138 | m_read16_not_io:\r |
139 | and r2, r0, #0xfc00\r |
140 | cmp r2, #0x1000\r |
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141 | bne PicoRead16_32x\r |
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142 | \r |
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143 | ldr r3, =Pico\r |
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144 | and r2, r0, #0xff00\r |
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145 | ldr r0, [r3, #OFS_Pico_m_rotate]\r |
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146 | add r0, r0, #1\r |
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147 | strb r0, [r3, #OFS_Pico_m_rotate]\r |
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148 | eor r0, r0, r0, lsl #5\r |
149 | eor r0, r0, r0, lsl #8\r |
150 | bic r0, r0, #0x100 @ bit8 defined in this area\r |
151 | cmp r2, #0x1100\r |
152 | bxne lr @ not busreq\r |
153 | \r |
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154 | ldrb r1, [r3, #OFS_Pico_m_z80Run]\r |
155 | ldrb r2, [r3, #OFS_Pico_m_z80_reset]\r |
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156 | orr r0, r0, r1, lsl #8\r |
157 | orr r0, r0, r2, lsl #8\r |
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158 | bx lr\r |
159 | \r |
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160 | @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r |
161 | \r |
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162 | PicoWrite8_io: @ u32 a, u32 d\r |
163 | bic r2, r0, #0x1e @ most commonly we get i/o port write,\r |
164 | eor r2, r2, #0xa10000 @ so check for it first\r |
165 | eors r2, r2, #1\r |
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166 | beq io_ports_write\r |
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167 | \r |
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168 | m_write8_not_io:\r |
169 | tst r0, #1\r |
170 | bne m_write8_not_z80ctl @ even addrs only\r |
171 | and r2, r0, #0xff00\r |
172 | cmp r2, #0x1100\r |
173 | moveq r0, r1\r |
174 | beq ctl_write_z80busreq\r |
175 | cmp r2, #0x1200\r |
176 | moveq r0, r1\r |
177 | beq ctl_write_z80reset\r |
178 | \r |
179 | m_write8_not_z80ctl:\r |
180 | @ unlikely\r |
181 | eor r2, r0, #0xa10000\r |
182 | eor r2, r2, #0x003000\r |
183 | eors r2, r2, #0x0000f1\r |
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184 | bne PicoWrite8_32x\r |
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185 | ldr r3, =Pico\r |
186 | ldrb r2, [r3, #OFS_Pico_m_sram_reg]\r |
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187 | and r1, r1, #(SRR_MAPPED|SRR_READONLY)\r |
188 | bic r2, r2, #(SRR_MAPPED|SRR_READONLY)\r |
189 | orr r2, r2, r1\r |
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190 | strb r2, [r3, #OFS_Pico_m_sram_reg]\r |
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191 | bx lr\r |
192 | \r |
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193 | @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r |
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194 | \r |
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195 | PicoWrite16_io: @ u32 a, u32 d\r |
196 | bic r2, r0, #0x1f @ most commonly we get i/o port write,\r |
197 | cmp r2, #0xa10000 @ so check for it first\r |
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198 | beq io_ports_write\r |
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199 | \r |
200 | m_write16_not_io:\r |
201 | and r2, r0, #0xff00\r |
202 | cmp r2, #0x1100\r |
203 | moveq r0, r1, lsr #8\r |
204 | beq ctl_write_z80busreq\r |
205 | cmp r2, #0x1200\r |
206 | moveq r0, r1, lsr #8\r |
207 | beq ctl_write_z80reset\r |
208 | \r |
209 | m_write16_not_z80ctl:\r |
210 | @ unlikely\r |
211 | eor r2, r0, #0xa10000\r |
212 | eor r2, r2, #0x003000\r |
213 | eors r2, r2, #0x0000f0\r |
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214 | bne PicoWrite16_32x\r |
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215 | ldr r3, =Pico\r |
216 | ldrb r2, [r3, #OFS_Pico_m_sram_reg]\r |
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217 | and r1, r1, #(SRR_MAPPED|SRR_READONLY)\r |
218 | bic r2, r2, #(SRR_MAPPED|SRR_READONLY)\r |
219 | orr r2, r2, r1\r |
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220 | strb r2, [r3, #OFS_Pico_m_sram_reg]\r |
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221 | bx lr\r |
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222 | \r |
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223 | .pool\r |
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224 | \r |
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225 | @ vim:filetype=armasm\r |