| 1 | // Pico Library - Internal Header File\r |
| 2 | \r |
| 3 | // (c) Copyright 2004 Dave, All rights reserved.\r |
| 4 | // (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved.\r |
| 5 | // Free for non-commercial use.\r |
| 6 | \r |
| 7 | // For commercial use, separate licencing terms must be obtained.\r |
| 8 | \r |
| 9 | #ifndef PICO_INTERNAL_INCLUDED\r |
| 10 | #define PICO_INTERNAL_INCLUDED\r |
| 11 | \r |
| 12 | #include <stdio.h>\r |
| 13 | #include <stdlib.h>\r |
| 14 | #include <string.h>\r |
| 15 | #include "Pico.h"\r |
| 16 | \r |
| 17 | //\r |
| 18 | #define USE_POLL_DETECT\r |
| 19 | \r |
| 20 | #ifndef PICO_INTERNAL\r |
| 21 | #define PICO_INTERNAL\r |
| 22 | #endif\r |
| 23 | #ifndef PICO_INTERNAL_ASM\r |
| 24 | #define PICO_INTERNAL_ASM\r |
| 25 | #endif\r |
| 26 | \r |
| 27 | // to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project\r |
| 28 | \r |
| 29 | #ifdef __cplusplus\r |
| 30 | extern "C" {\r |
| 31 | #endif\r |
| 32 | \r |
| 33 | \r |
| 34 | // ----------------------- 68000 CPU -----------------------\r |
| 35 | #ifdef EMU_C68K\r |
| 36 | #include "../cpu/Cyclone/Cyclone.h"\r |
| 37 | extern struct Cyclone PicoCpu, PicoCpuS68k;\r |
| 38 | #define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run\r |
| 39 | #define SekCyclesLeft \\r |
| 40 | (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r |
| 41 | #define SekCyclesLeftS68k \\r |
| 42 | ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.cycles)\r |
| 43 | #define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c\r |
| 44 | #define SekSetCyclesLeft(c) { \\r |
| 45 | if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r |
| 46 | }\r |
| 47 | #define SekPc (PicoCpu.pc-PicoCpu.membase)\r |
| 48 | #define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r |
| 49 | #define SekSetStop(x) { PicoCpu.state_flags&=~1; if (x) { PicoCpu.state_flags|=1; PicoCpu.cycles=0; } }\r |
| 50 | #define SekSetStopS68k(x) { PicoCpuS68k.state_flags&=~1; if (x) { PicoCpuS68k.state_flags|=1; PicoCpuS68k.cycles=0; } }\r |
| 51 | #endif\r |
| 52 | \r |
| 53 | #ifdef EMU_A68K\r |
| 54 | void __cdecl M68000_RUN();\r |
| 55 | // The format of the data in a68k.asm (at the _M68000_regs location)\r |
| 56 | struct A68KContext\r |
| 57 | {\r |
| 58 | unsigned int d[8],a[8];\r |
| 59 | unsigned int isp,srh,ccr,xc,pc,irq,sr;\r |
| 60 | int (*IrqCallback) (int nIrq);\r |
| 61 | unsigned int ppc;\r |
| 62 | void *pResetCallback;\r |
| 63 | unsigned int sfc,dfc,usp,vbr;\r |
| 64 | unsigned int AsmBank,CpuVersion;\r |
| 65 | };\r |
| 66 | struct A68KContext M68000_regs;\r |
| 67 | extern int m68k_ICount;\r |
| 68 | #define SekCyclesLeft m68k_ICount\r |
| 69 | #define SekSetCyclesLeft(c) m68k_ICount=c\r |
| 70 | #define SekPc M68000_regs.pc\r |
| 71 | #endif\r |
| 72 | \r |
| 73 | #ifdef EMU_M68K\r |
| 74 | #include "../cpu/musashi/m68kcpu.h"\r |
| 75 | extern m68ki_cpu_core PicoM68kCPU; // MD's CPU\r |
| 76 | extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU\r |
| 77 | #ifndef SekCyclesLeft\r |
| 78 | #define SekCyclesLeftNoMCD PicoM68kCPU.cyc_remaining_cycles\r |
| 79 | #define SekCyclesLeft \\r |
| 80 | (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r |
| 81 | #define SekCyclesLeftS68k \\r |
| 82 | ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoS68kCPU.cyc_remaining_cycles)\r |
| 83 | #define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)\r |
| 84 | #define SekSetCyclesLeft(c) { \\r |
| 85 | if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \\r |
| 86 | }\r |
| 87 | #define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)\r |
| 88 | #define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)\r |
| 89 | #define SekSetStop(x) { \\r |
| 90 | if(x) { SET_CYCLES(0); PicoM68kCPU.stopped=STOP_LEVEL_STOP; } \\r |
| 91 | else PicoM68kCPU.stopped=0; \\r |
| 92 | }\r |
| 93 | #define SekSetStopS68k(x) { \\r |
| 94 | if(x) { SET_CYCLES(0); PicoS68kCPU.stopped=STOP_LEVEL_STOP; } \\r |
| 95 | else PicoS68kCPU.stopped=0; \\r |
| 96 | }\r |
| 97 | #endif\r |
| 98 | #endif\r |
| 99 | \r |
| 100 | extern int SekCycleCnt; // cycles done in this frame\r |
| 101 | extern int SekCycleAim; // cycle aim\r |
| 102 | extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r |
| 103 | \r |
| 104 | #define SekCyclesReset() { \\r |
| 105 | SekCycleCntT+=SekCycleAim; \\r |
| 106 | SekCycleCnt-=SekCycleAim; \\r |
| 107 | SekCycleAim=0; \\r |
| 108 | }\r |
| 109 | #define SekCyclesBurn(c) SekCycleCnt+=c\r |
| 110 | #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)\r |
| 111 | #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r |
| 112 | \r |
| 113 | #define SekEndRun(after) { \\r |
| 114 | SekCycleCnt -= SekCyclesLeft - after; \\r |
| 115 | if(SekCycleCnt < 0) SekCycleCnt = 0; \\r |
| 116 | SekSetCyclesLeft(after); \\r |
| 117 | }\r |
| 118 | \r |
| 119 | extern int SekCycleCntS68k;\r |
| 120 | extern int SekCycleAimS68k;\r |
| 121 | \r |
| 122 | #define SekCyclesResetS68k() { \\r |
| 123 | SekCycleCntS68k-=SekCycleAimS68k; \\r |
| 124 | SekCycleAimS68k=0; \\r |
| 125 | }\r |
| 126 | #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r |
| 127 | \r |
| 128 | // debug cyclone\r |
| 129 | #if defined(EMU_C68K) && defined(EMU_M68K)\r |
| 130 | #undef SekSetCyclesLeftNoMCD\r |
| 131 | #undef SekSetCyclesLeft\r |
| 132 | #undef SekCyclesBurn\r |
| 133 | #undef SekEndRun\r |
| 134 | #define SekSetCyclesLeftNoMCD(c)\r |
| 135 | #define SekSetCyclesLeft(c)\r |
| 136 | #define SekCyclesBurn(c) c\r |
| 137 | #define SekEndRun(c)\r |
| 138 | #endif\r |
| 139 | \r |
| 140 | extern int PicoMCD;\r |
| 141 | \r |
| 142 | // ---------------------------------------------------------\r |
| 143 | \r |
| 144 | // main oscillator clock which controls timing\r |
| 145 | #define OSC_NTSC 53693100\r |
| 146 | // seems to be accurate, see scans from http://www.hot.ee/tmeeco/\r |
| 147 | #define OSC_PAL 53203424\r |
| 148 | \r |
| 149 | struct PicoVideo\r |
| 150 | {\r |
| 151 | unsigned char reg[0x20];\r |
| 152 | unsigned int command; // 32-bit Command\r |
| 153 | unsigned char pending; // 1 if waiting for second half of 32-bit command\r |
| 154 | unsigned char type; // Command type (v/c/vsram read/write)\r |
| 155 | unsigned short addr; // Read/Write address\r |
| 156 | int status; // Status bits\r |
| 157 | unsigned char pending_ints; // pending interrupts: ??VH????\r |
| 158 | signed char lwrite_cnt; // VDP write count during active display line\r |
| 159 | unsigned char pad[0x12];\r |
| 160 | };\r |
| 161 | \r |
| 162 | struct PicoMisc\r |
| 163 | {\r |
| 164 | unsigned char rotate;\r |
| 165 | unsigned char z80Run;\r |
| 166 | unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches\r |
| 167 | short scanline; // 04 0 to 261||311; -1 in fast mode\r |
| 168 | char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)\r |
| 169 | unsigned char hardware; // 07 Hardware value for country\r |
| 170 | unsigned char pal; // 08 1=PAL 0=NTSC\r |
| 171 | unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r |
| 172 | unsigned short z80_bank68k; // 0a\r |
| 173 | unsigned short z80_lastaddr; // this is for Z80 faking\r |
| 174 | unsigned char z80_fakeval;\r |
| 175 | unsigned char pad0;\r |
| 176 | unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay\r |
| 177 | unsigned short eeprom_addr; // EEPROM address register\r |
| 178 | unsigned char eeprom_cycle; // EEPROM SRAM cycle number\r |
| 179 | unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs\r |
| 180 | unsigned char prot_bytes[2]; // simple protection faking\r |
| 181 | unsigned short dma_xfers;\r |
| 182 | unsigned char pad[2];\r |
| 183 | unsigned int frame_count; // mainly for movies\r |
| 184 | };\r |
| 185 | \r |
| 186 | // some assembly stuff depend on these, do not touch!\r |
| 187 | struct Pico\r |
| 188 | {\r |
| 189 | unsigned char ram[0x10000]; // 0x00000 scratch ram\r |
| 190 | unsigned short vram[0x8000]; // 0x10000\r |
| 191 | unsigned char zram[0x2000]; // 0x20000 Z80 ram\r |
| 192 | unsigned char ioports[0x10];\r |
| 193 | unsigned int pad[0x3c]; // unused\r |
| 194 | unsigned short cram[0x40]; // 0x22100\r |
| 195 | unsigned short vsram[0x40]; // 0x22180\r |
| 196 | \r |
| 197 | unsigned char *rom; // 0x22200\r |
| 198 | unsigned int romsize; // 0x22204\r |
| 199 | \r |
| 200 | struct PicoMisc m;\r |
| 201 | struct PicoVideo video;\r |
| 202 | };\r |
| 203 | \r |
| 204 | // sram\r |
| 205 | struct PicoSRAM\r |
| 206 | {\r |
| 207 | unsigned char *data; // actual data\r |
| 208 | unsigned int start; // start address in 68k address space\r |
| 209 | unsigned int end;\r |
| 210 | unsigned char unused1; // 0c: unused\r |
| 211 | unsigned char unused2;\r |
| 212 | unsigned char changed;\r |
| 213 | unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words\r |
| 214 | unsigned char eeprom_abits; // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out\r |
| 215 | unsigned char eeprom_bit_cl; // bit number for cl\r |
| 216 | unsigned char eeprom_bit_in; // bit number for in\r |
| 217 | unsigned char eeprom_bit_out; // bit number for out\r |
| 218 | };\r |
| 219 | \r |
| 220 | // MCD\r |
| 221 | #include "cd/cd_sys.h"\r |
| 222 | #include "cd/LC89510.h"\r |
| 223 | #include "cd/gfx_cd.h"\r |
| 224 | \r |
| 225 | struct mcd_pcm\r |
| 226 | {\r |
| 227 | unsigned char control; // reg7\r |
| 228 | unsigned char enabled; // reg8\r |
| 229 | unsigned char cur_ch;\r |
| 230 | unsigned char bank;\r |
| 231 | int pad1;\r |
| 232 | \r |
| 233 | struct pcm_chan // 08, size 0x10\r |
| 234 | {\r |
| 235 | unsigned char regs[8];\r |
| 236 | unsigned int addr; // .08: played sample address\r |
| 237 | int pad;\r |
| 238 | } ch[8];\r |
| 239 | };\r |
| 240 | \r |
| 241 | struct mcd_misc\r |
| 242 | {\r |
| 243 | unsigned short hint_vector;\r |
| 244 | unsigned char busreq;\r |
| 245 | unsigned char s68k_pend_ints;\r |
| 246 | unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending\r |
| 247 | unsigned int counter75hz;\r |
| 248 | unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023)\r |
| 249 | unsigned char audio_track; // playing audio track # (zero based)\r |
| 250 | char pad1;\r |
| 251 | int timer_int3; // 10\r |
| 252 | unsigned int timer_stopwatch;\r |
| 253 | unsigned char bcram_reg; // 18: battery-backed RAM cart register\r |
| 254 | unsigned char pad2;\r |
| 255 | unsigned short pad3;\r |
| 256 | int pad[9];\r |
| 257 | };\r |
| 258 | \r |
| 259 | typedef struct\r |
| 260 | {\r |
| 261 | unsigned char bios[0x20000]; // 000000: 128K\r |
| 262 | union { // 020000: 512K\r |
| 263 | unsigned char prg_ram[0x80000];\r |
| 264 | unsigned char prg_ram_b[4][0x20000];\r |
| 265 | };\r |
| 266 | union { // 0a0000: 256K\r |
| 267 | struct {\r |
| 268 | unsigned char word_ram2M[0x40000];\r |
| 269 | unsigned char unused[0x20000];\r |
| 270 | };\r |
| 271 | struct {\r |
| 272 | unsigned char unused[0x20000];\r |
| 273 | unsigned char word_ram1M[2][0x20000];\r |
| 274 | };\r |
| 275 | };\r |
| 276 | union { // 100000: 64K\r |
| 277 | unsigned char pcm_ram[0x10000];\r |
| 278 | unsigned char pcm_ram_b[0x10][0x1000];\r |
| 279 | };\r |
| 280 | unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs\r |
| 281 | unsigned char bram[0x2000]; // 110200: 8K\r |
| 282 | struct mcd_misc m; // 112200: misc\r |
| 283 | struct mcd_pcm pcm; // 112240:\r |
| 284 | _scd_toc TOC; // not to be saved\r |
| 285 | CDD cdd;\r |
| 286 | CDC cdc;\r |
| 287 | _scd scd;\r |
| 288 | Rot_Comp rot_comp;\r |
| 289 | } mcd_state;\r |
| 290 | \r |
| 291 | #define Pico_mcd ((mcd_state *)Pico.rom)\r |
| 292 | \r |
| 293 | // Area.c\r |
| 294 | PICO_INTERNAL int PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r |
| 295 | PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);\r |
| 296 | \r |
| 297 | // cd/Area.c\r |
| 298 | PICO_INTERNAL int PicoCdSaveState(void *file);\r |
| 299 | PICO_INTERNAL int PicoCdLoadState(void *file);\r |
| 300 | \r |
| 301 | // Cart.c\r |
| 302 | PICO_INTERNAL void PicoCartDetect(void);\r |
| 303 | \r |
| 304 | // Draw.c\r |
| 305 | PICO_INTERNAL int PicoLine(int scan);\r |
| 306 | PICO_INTERNAL void PicoFrameStart(void);\r |
| 307 | \r |
| 308 | // Draw2.c\r |
| 309 | PICO_INTERNAL void PicoFrameFull();\r |
| 310 | \r |
| 311 | // Memory.c\r |
| 312 | PICO_INTERNAL int PicoInitPc(unsigned int pc);\r |
| 313 | PICO_INTERNAL_ASM unsigned int CPU_CALL PicoRead32(unsigned int a);\r |
| 314 | PICO_INTERNAL void PicoMemSetup(void);\r |
| 315 | PICO_INTERNAL_ASM void PicoMemReset(void);\r |
| 316 | PICO_INTERNAL int PadRead(int i);\r |
| 317 | PICO_INTERNAL unsigned char z80_read(unsigned short a);\r |
| 318 | PICO_INTERNAL unsigned short z80_read16(unsigned short a);\r |
| 319 | PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a);\r |
| 320 | PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a);\r |
| 321 | \r |
| 322 | // cd/Memory.c\r |
| 323 | PICO_INTERNAL void PicoMemSetupCD(void);\r |
| 324 | PICO_INTERNAL_ASM void PicoMemResetCD(int r3);\r |
| 325 | PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);\r |
| 326 | \r |
| 327 | // Pico.c\r |
| 328 | extern struct Pico Pico;\r |
| 329 | extern struct PicoSRAM SRam;\r |
| 330 | extern int emustatus;\r |
| 331 | extern int z80startCycle, z80stopCycle; // in 68k cycles\r |
| 332 | PICO_INTERNAL int CheckDMA(void);\r |
| 333 | \r |
| 334 | // cd/Pico.c\r |
| 335 | PICO_INTERNAL int PicoInitMCD(void);\r |
| 336 | PICO_INTERNAL void PicoExitMCD(void);\r |
| 337 | PICO_INTERNAL int PicoResetMCD(int hard);\r |
| 338 | PICO_INTERNAL int PicoFrameMCD(void);\r |
| 339 | \r |
| 340 | // Sek.c\r |
| 341 | PICO_INTERNAL int SekInit(void);\r |
| 342 | PICO_INTERNAL int SekReset(void);\r |
| 343 | PICO_INTERNAL int SekInterrupt(int irq);\r |
| 344 | PICO_INTERNAL void SekState(unsigned char *data);\r |
| 345 | PICO_INTERNAL void SekSetRealTAS(int use_real);\r |
| 346 | \r |
| 347 | // cd/Sek.c\r |
| 348 | PICO_INTERNAL int SekInitS68k(void);\r |
| 349 | PICO_INTERNAL int SekResetS68k(void);\r |
| 350 | PICO_INTERNAL int SekInterruptS68k(int irq);\r |
| 351 | \r |
| 352 | // sound/sound.c\r |
| 353 | extern int PsndLen_exc_cnt;\r |
| 354 | extern int PsndLen_exc_add;\r |
| 355 | \r |
| 356 | // VideoPort.c\r |
| 357 | PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);\r |
| 358 | PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);\r |
| 359 | \r |
| 360 | // Misc.c\r |
| 361 | PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);\r |
| 362 | PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d);\r |
| 363 | PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void);\r |
| 364 | PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count);\r |
| 365 | PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);\r |
| 366 | PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count\r |
| 367 | PICO_INTERNAL_ASM void memset32(int *dest, int c, int count);\r |
| 368 | \r |
| 369 | // cd/Misc.c\r |
| 370 | PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);\r |
| 371 | PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);\r |
| 372 | \r |
| 373 | // cd/buffering.c\r |
| 374 | PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba);\r |
| 375 | \r |
| 376 | // sound/sound.c\r |
| 377 | PICO_INTERNAL void sound_reset(void);\r |
| 378 | PICO_INTERNAL void sound_timers_and_dac(int raster);\r |
| 379 | PICO_INTERNAL int sound_render(int offset, int length);\r |
| 380 | PICO_INTERNAL void sound_clear(void);\r |
| 381 | // z80 functionality wrappers\r |
| 382 | PICO_INTERNAL void z80_init(void);\r |
| 383 | PICO_INTERNAL void z80_resetCycles(void);\r |
| 384 | PICO_INTERNAL void z80_int(void);\r |
| 385 | PICO_INTERNAL int z80_run(int cycles);\r |
| 386 | PICO_INTERNAL void z80_pack(unsigned char *data);\r |
| 387 | PICO_INTERNAL void z80_unpack(unsigned char *data);\r |
| 388 | PICO_INTERNAL void z80_reset(void);\r |
| 389 | PICO_INTERNAL void z80_exit(void);\r |
| 390 | \r |
| 391 | \r |
| 392 | #ifdef __cplusplus\r |
| 393 | } // End of extern "C"\r |
| 394 | #endif\r |
| 395 | \r |
| 396 | // emulation event logging\r |
| 397 | #ifndef EL_LOGMASK\r |
| 398 | #define EL_LOGMASK 0\r |
| 399 | #endif\r |
| 400 | \r |
| 401 | #define EL_HVCNT 0x0001 /* hv counter reads */\r |
| 402 | #define EL_SR 0x0002 /* SR reads */\r |
| 403 | #define EL_INTS 0x0004 /* ints and acks */\r |
| 404 | #define EL_YM2612R 0x0008 /* 68k ym2612 reads */\r |
| 405 | #define EL_INTSW 0x0010 /* log irq switching on/off */\r |
| 406 | #define EL_ASVDP 0x0020 /* VDP accesses during active scan */\r |
| 407 | #define EL_VDPDMA 0x0040 /* VDP DMA transfers and their timing */\r |
| 408 | #define EL_BUSREQ 0x0080 /* z80 busreq r/w or reset w */\r |
| 409 | #define EL_Z80BNK 0x0100 /* z80 i/o through bank area */\r |
| 410 | #define EL_SRAMIO 0x0200 /* sram i/o */\r |
| 411 | #define EL_EEPROM 0x0400 /* eeprom debug */\r |
| 412 | #define EL_UIO 0x0800 /* unmapped i/o */\r |
| 413 | #define EL_IO 0x1000 /* all i/o (TODO) */\r |
| 414 | \r |
| 415 | #define EL_STATUS 0x4000 /* status messages */\r |
| 416 | #define EL_ANOMALY 0x8000 /* some unexpected conditions */\r |
| 417 | \r |
| 418 | #if EL_LOGMASK\r |
| 419 | #define elprintf(w,f,...) \\r |
| 420 | { \\r |
| 421 | if ((w) & EL_LOGMASK) \\r |
| 422 | printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \\r |
| 423 | }\r |
| 424 | #else\r |
| 425 | #define elprintf(w,f,...)\r |
| 426 | #endif\r |
| 427 | \r |
| 428 | #endif // PICO_INTERNAL_INCLUDED\r |
| 429 | \r |