| 1 | #include "new_dynarec.h" |
| 2 | #include "../r3000a.h" |
| 3 | |
| 4 | extern char invalid_code[0x100000]; |
| 5 | |
| 6 | /* weird stuff */ |
| 7 | #define EAX 0 |
| 8 | #define ECX 1 |
| 9 | |
| 10 | /* same as psxRegs */ |
| 11 | extern int reg[]; |
| 12 | |
| 13 | /* same as psxRegs.GPR.n.* */ |
| 14 | extern int hi, lo; |
| 15 | |
| 16 | /* same as psxRegs.CP0.n.* */ |
| 17 | extern int reg_cop0[]; |
| 18 | #define Status psxRegs.CP0.n.Status |
| 19 | #define Cause psxRegs.CP0.n.Cause |
| 20 | #define EPC psxRegs.CP0.n.EPC |
| 21 | #define BadVAddr psxRegs.CP0.n.BadVAddr |
| 22 | #define Context psxRegs.CP0.n.Context |
| 23 | #define EntryHi psxRegs.CP0.n.EntryHi |
| 24 | #define Count psxRegs.cycle // psxRegs.CP0.n.Count |
| 25 | |
| 26 | /* COP2/GTE */ |
| 27 | extern int reg_cop2d[], reg_cop2c[]; |
| 28 | extern void *gte_handlers[64]; |
| 29 | extern void *gte_handlers_nf[64]; |
| 30 | extern const char *gte_regnames[64]; |
| 31 | extern const char gte_cycletab[64]; |
| 32 | |
| 33 | /* dummy */ |
| 34 | extern int FCR0, FCR31; |
| 35 | |
| 36 | /* mem */ |
| 37 | extern void *mem_rtab; |
| 38 | extern void *mem_wtab; |
| 39 | |
| 40 | void jump_handler_read8(u32 addr, u32 *table, u32 cycles); |
| 41 | void jump_handler_read16(u32 addr, u32 *table, u32 cycles); |
| 42 | void jump_handler_read32(u32 addr, u32 *table, u32 cycles); |
| 43 | void jump_handler_write8(u32 addr, u32 data, u32 cycles, u32 *table); |
| 44 | void jump_handler_write16(u32 addr, u32 data, u32 cycles, u32 *table); |
| 45 | void jump_handler_write32(u32 addr, u32 data, u32 cycles, u32 *table); |
| 46 | void jump_handler_write_h(u32 addr, u32 data, u32 cycles, void *handler); |
| 47 | void jump_handle_swl(u32 addr, u32 data, u32 cycles); |
| 48 | void jump_handle_swr(u32 addr, u32 data, u32 cycles); |
| 49 | |
| 50 | extern void (*readmem[0x10000])(); |
| 51 | extern void (*readmemb[0x10000])(); |
| 52 | extern void (*readmemh[0x10000])(); |
| 53 | extern void (*writemem[0x10000])(); |
| 54 | extern void (*writememb[0x10000])(); |
| 55 | extern void (*writememh[0x10000])(); |
| 56 | |
| 57 | extern unsigned int address; |
| 58 | extern unsigned int readmem_word; /* same as readmem_dword */ |
| 59 | extern unsigned int word; /* write */ |
| 60 | extern unsigned short hword; |
| 61 | extern unsigned char byte; |
| 62 | |
| 63 | extern void *psxH_ptr; |
| 64 | |
| 65 | // same as invalid_code, just a region for ram write checks (inclusive) |
| 66 | extern u32 inv_code_start, inv_code_end; |
| 67 | |
| 68 | /* cycles/irqs */ |
| 69 | extern unsigned int next_interupt; |
| 70 | extern int pending_exception; |
| 71 | |
| 72 | /* called by drc */ |
| 73 | void pcsx_mtc0(u32 reg); |
| 74 | void pcsx_mtc0_ds(u32 reg); |
| 75 | |
| 76 | /* misc */ |
| 77 | extern void (*psxHLEt[])(); |