| 1 | #include "../pico_int.h" |
| 2 | #include "../sound/ym2612.h" |
| 3 | |
| 4 | struct Pico32x Pico32x; |
| 5 | |
| 6 | static void sh2_irq_cb(int id, int level) |
| 7 | { |
| 8 | // diagnostic for now |
| 9 | elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id)); |
| 10 | } |
| 11 | |
| 12 | void p32x_update_irls(void) |
| 13 | { |
| 14 | int irqs, mlvl = 0, slvl = 0; |
| 15 | |
| 16 | // msh2 |
| 17 | irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES); |
| 18 | while ((irqs >>= 1)) |
| 19 | mlvl++; |
| 20 | mlvl *= 2; |
| 21 | |
| 22 | // ssh2 |
| 23 | irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES); |
| 24 | while ((irqs >>= 1)) |
| 25 | slvl++; |
| 26 | slvl *= 2; |
| 27 | |
| 28 | elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl); |
| 29 | sh2_irl_irq(&msh2, mlvl); |
| 30 | if (mlvl) |
| 31 | p32x_poll_event(0); |
| 32 | sh2_irl_irq(&ssh2, slvl); |
| 33 | } |
| 34 | |
| 35 | void Pico32xStartup(void) |
| 36 | { |
| 37 | elprintf(EL_STATUS|EL_32X, "32X startup"); |
| 38 | |
| 39 | PicoAHW |= PAHW_32X; |
| 40 | PicoMemSetup32x(); |
| 41 | |
| 42 | sh2_init(&msh2, 0); |
| 43 | msh2.irq_callback = sh2_irq_cb; |
| 44 | sh2_reset(&msh2); |
| 45 | |
| 46 | sh2_init(&ssh2, 1); |
| 47 | ssh2.irq_callback = sh2_irq_cb; |
| 48 | sh2_reset(&ssh2); |
| 49 | |
| 50 | if (!Pico.m.pal) |
| 51 | Pico32x.vdp_regs[0] |= P32XV_nPAL; |
| 52 | |
| 53 | emu_32x_startup(); |
| 54 | } |
| 55 | |
| 56 | void Pico32xInit(void) |
| 57 | { |
| 58 | } |
| 59 | |
| 60 | void PicoPower32x(void) |
| 61 | { |
| 62 | memset(&Pico32x, 0, sizeof(Pico32x)); |
| 63 | |
| 64 | Pico32x.regs[0] = 0x0082; // SH2 reset? |
| 65 | Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN; |
| 66 | } |
| 67 | |
| 68 | void PicoUnload32x(void) |
| 69 | { |
| 70 | if (Pico32xMem != NULL) |
| 71 | free(Pico32xMem); |
| 72 | Pico32xMem = NULL; |
| 73 | |
| 74 | PicoAHW &= ~PAHW_32X; |
| 75 | } |
| 76 | |
| 77 | void PicoReset32x(void) |
| 78 | { |
| 79 | extern int p32x_csum_faked; |
| 80 | p32x_csum_faked = 0; // tmp |
| 81 | } |
| 82 | |
| 83 | static void p32x_start_blank(void) |
| 84 | { |
| 85 | // enter vblank |
| 86 | Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN; |
| 87 | |
| 88 | // FB swap waits until vblank |
| 89 | if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) { |
| 90 | Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS; |
| 91 | Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb; |
| 92 | Pico32xSwapDRAM(Pico32x.pending_fb ^ 1); |
| 93 | } |
| 94 | |
| 95 | Pico32x.sh2irqs |= P32XI_VINT; |
| 96 | p32x_update_irls(); |
| 97 | p32x_poll_event(1); |
| 98 | } |
| 99 | |
| 100 | // FIXME.. |
| 101 | static __inline void SekRunM68k(int cyc) |
| 102 | { |
| 103 | int cyc_do; |
| 104 | SekCycleAim += cyc; |
| 105 | if (Pico32x.emu_flags & P32XF_68KPOLL) { |
| 106 | SekCycleCnt = SekCycleAim; |
| 107 | return; |
| 108 | } |
| 109 | if ((cyc_do = SekCycleAim - SekCycleCnt) <= 0) |
| 110 | return; |
| 111 | #if defined(EMU_CORE_DEBUG) |
| 112 | // this means we do run-compare |
| 113 | SekCycleCnt+=CM_compareRun(cyc_do, 0); |
| 114 | #elif defined(EMU_C68K) |
| 115 | PicoCpuCM68k.cycles=cyc_do; |
| 116 | CycloneRun(&PicoCpuCM68k); |
| 117 | SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles; |
| 118 | #elif defined(EMU_M68K) |
| 119 | SekCycleCnt+=m68k_execute(cyc_do); |
| 120 | #elif defined(EMU_F68K) |
| 121 | SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0); |
| 122 | #endif |
| 123 | } |
| 124 | |
| 125 | // ~1463.8, but due to cache misses and slow mem |
| 126 | // it's much lower than that |
| 127 | #define SH2_LINE_CYCLES 735 |
| 128 | |
| 129 | #define PICO_32X |
| 130 | #define RUN_SH2S \ |
| 131 | if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \ |
| 132 | sh2_execute(&msh2, SH2_LINE_CYCLES); \ |
| 133 | if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \ |
| 134 | sh2_execute(&ssh2, SH2_LINE_CYCLES); |
| 135 | |
| 136 | #include "../pico_cmn.c" |
| 137 | |
| 138 | void PicoFrame32x(void) |
| 139 | { |
| 140 | pwm_frame_smp_cnt = 0; |
| 141 | |
| 142 | Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank |
| 143 | if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking |
| 144 | Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access |
| 145 | |
| 146 | p32x_poll_event(1); |
| 147 | |
| 148 | PicoFrameStart(); |
| 149 | PicoFrameHints(); |
| 150 | } |
| 151 | |