| 1 | /*************************************************************************** |
| 2 | * Copyright (C) 2010 PCSX4ALL Team * |
| 3 | * Copyright (C) 2010 Unai * |
| 4 | * * |
| 5 | * This program is free software; you can redistribute it and/or modify * |
| 6 | * it under the terms of the GNU General Public License as published by * |
| 7 | * the Free Software Foundation; either version 2 of the License, or * |
| 8 | * (at your option) any later version. * |
| 9 | * * |
| 10 | * This program is distributed in the hope that it will be useful, * |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * |
| 13 | * GNU General Public License for more details. * |
| 14 | * * |
| 15 | * You should have received a copy of the GNU General Public License * |
| 16 | * along with this program; if not, write to the * |
| 17 | * Free Software Foundation, Inc., * |
| 18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. * |
| 19 | ***************************************************************************/ |
| 20 | |
| 21 | #include "port.h" |
| 22 | #include "gpu.h" |
| 23 | #include "profiler.h" |
| 24 | #include "debug.h" |
| 25 | |
| 26 | int skipCount = 2; /* frame skip (0,1,2,3...) */ |
| 27 | int skCount = 0; /* internal frame skip */ |
| 28 | int linesInterlace = 0; /* internal lines interlace */ |
| 29 | int linesInterlace_user = 0; /* Lines interlace */ |
| 30 | |
| 31 | bool isSkip = false; /* skip frame (info coming from GPU) */ |
| 32 | bool wasSkip = false; |
| 33 | bool skipFrame = false; /* skip frame (according to frame skip) */ |
| 34 | bool alt_fps = false; /* Alternative FPS algorithm */ |
| 35 | bool show_fps = false; /* Show FPS statistics */ |
| 36 | |
| 37 | bool isPAL = false; /* PAL video timing */ |
| 38 | bool progressInterlace_flag = false; /* Progressive interlace flag */ |
| 39 | bool progressInterlace = false; /* Progressive interlace option*/ |
| 40 | bool frameLimit = false; /* frames to wait */ |
| 41 | |
| 42 | bool light = true; /* lighting */ |
| 43 | bool blend = true; /* blending */ |
| 44 | bool FrameToRead = false; /* load image in progress */ |
| 45 | bool FrameToWrite = false; /* store image in progress */ |
| 46 | bool fb_dirty = false; |
| 47 | |
| 48 | bool enableAbbeyHack = false; /* Abe's Odyssey hack */ |
| 49 | |
| 50 | u8 BLEND_MODE; |
| 51 | u8 TEXT_MODE; |
| 52 | u8 Masking; |
| 53 | |
| 54 | u16 PixelMSB; |
| 55 | u16 PixelData; |
| 56 | |
| 57 | /////////////////////////////////////////////////////////////////////////////// |
| 58 | // GPU Global data |
| 59 | /////////////////////////////////////////////////////////////////////////////// |
| 60 | |
| 61 | /////////////////////////////////////////////////////////////////////////////// |
| 62 | // Dma Transfers info |
| 63 | s32 px,py; |
| 64 | s32 x_end,y_end; |
| 65 | u16* pvram; |
| 66 | |
| 67 | u32 GP0; |
| 68 | s32 PacketCount; |
| 69 | s32 PacketIndex; |
| 70 | |
| 71 | /////////////////////////////////////////////////////////////////////////////// |
| 72 | // Display status |
| 73 | u32 DisplayArea [6]; |
| 74 | |
| 75 | /////////////////////////////////////////////////////////////////////////////// |
| 76 | // Rasterizer status |
| 77 | u32 TextureWindow [4]; |
| 78 | u32 DrawingArea [4]; |
| 79 | u32 DrawingOffset [2]; |
| 80 | |
| 81 | /////////////////////////////////////////////////////////////////////////////// |
| 82 | // Rasterizer status |
| 83 | |
| 84 | u16* TBA; |
| 85 | u16* CBA; |
| 86 | |
| 87 | /////////////////////////////////////////////////////////////////////////////// |
| 88 | // Inner Loops |
| 89 | s32 u4, du4; |
| 90 | s32 v4, dv4; |
| 91 | s32 r4, dr4; |
| 92 | s32 g4, dg4; |
| 93 | s32 b4, db4; |
| 94 | u32 lInc; |
| 95 | u32 tInc, tMsk; |
| 96 | |
| 97 | GPUPacket PacketBuffer; |
| 98 | // FRAME_BUFFER_SIZE is defined in bytes; 512K is guard memory for out of range reads |
| 99 | u16 GPU_FrameBuffer[(FRAME_BUFFER_SIZE+512*1024)/2] __attribute__((aligned(2048))); |
| 100 | u32 GPU_GP1; |
| 101 | |
| 102 | /////////////////////////////////////////////////////////////////////////////// |
| 103 | // Inner loop driver instanciation file |
| 104 | #include "gpu_inner.h" |
| 105 | |
| 106 | /////////////////////////////////////////////////////////////////////////////// |
| 107 | // GPU Raster Macros |
| 108 | #define GPU_RGB16(rgb) ((((rgb)&0xF80000)>>9)|(((rgb)&0xF800)>>6)|(((rgb)&0xF8)>>3)) |
| 109 | |
| 110 | #define GPU_EXPANDSIGN_POLY(x) (((s32)(x)<<20)>>20) |
| 111 | //#define GPU_EXPANDSIGN_POLY(x) (((s32)(x)<<21)>>21) |
| 112 | #define GPU_EXPANDSIGN_SPRT(x) (((s32)(x)<<21)>>21) |
| 113 | |
| 114 | //#define GPU_TESTRANGE(x) { if((u32)(x+1024) > 2047) return; } |
| 115 | #define GPU_TESTRANGE(x) { if ((x<-1023) || (x>1023)) return; } |
| 116 | |
| 117 | #define GPU_SWAP(a,b,t) {(t)=(a);(a)=(b);(b)=(t);} |
| 118 | |
| 119 | /////////////////////////////////////////////////////////////////////////////// |
| 120 | // GPU internal image drawing functions |
| 121 | #include "gpu_raster_image.h" |
| 122 | |
| 123 | /////////////////////////////////////////////////////////////////////////////// |
| 124 | // GPU internal line drawing functions |
| 125 | #include "gpu_raster_line.h" |
| 126 | |
| 127 | /////////////////////////////////////////////////////////////////////////////// |
| 128 | // GPU internal polygon drawing functions |
| 129 | #include "gpu_raster_polygon.h" |
| 130 | |
| 131 | /////////////////////////////////////////////////////////////////////////////// |
| 132 | // GPU internal sprite drawing functions |
| 133 | #include "gpu_raster_sprite.h" |
| 134 | |
| 135 | /////////////////////////////////////////////////////////////////////////////// |
| 136 | // GPU command buffer execution/store |
| 137 | #include "gpu_command.h" |
| 138 | |
| 139 | /////////////////////////////////////////////////////////////////////////////// |
| 140 | INLINE void gpuReset(void) |
| 141 | { |
| 142 | GPU_GP1 = 0x14802000; |
| 143 | TextureWindow[0] = 0; |
| 144 | TextureWindow[1] = 0; |
| 145 | TextureWindow[2] = 255; |
| 146 | TextureWindow[3] = 255; |
| 147 | DrawingArea[2] = 256; |
| 148 | DrawingArea[3] = 240; |
| 149 | DisplayArea[2] = 256; |
| 150 | DisplayArea[3] = 240; |
| 151 | DisplayArea[5] = 240; |
| 152 | } |
| 153 | |
| 154 | /////////////////////////////////////////////////////////////////////////////// |
| 155 | bool GPU_init(void) |
| 156 | { |
| 157 | gpuReset(); |
| 158 | |
| 159 | // s_invTable |
| 160 | for(int i=1;i<=(1<<TABLE_BITS);++i) |
| 161 | { |
| 162 | double v = 1.0 / double(i); |
| 163 | #ifdef GPU_TABLE_10_BITS |
| 164 | v *= double(0xffffffff>>1); |
| 165 | #else |
| 166 | v *= double(0x80000000); |
| 167 | #endif |
| 168 | s_invTable[i-1]=s32(v); |
| 169 | } |
| 170 | return (0); |
| 171 | } |
| 172 | |
| 173 | /////////////////////////////////////////////////////////////////////////////// |
| 174 | void GPU_shutdown(void) |
| 175 | { |
| 176 | } |
| 177 | |
| 178 | /////////////////////////////////////////////////////////////////////////////// |
| 179 | long GPU_freeze(unsigned int bWrite, GPUFreeze_t* p2) |
| 180 | { |
| 181 | if (!p2) return (0); |
| 182 | if (p2->Version != 1) return (0); |
| 183 | |
| 184 | if (bWrite) |
| 185 | { |
| 186 | p2->GPU_gp1 = GPU_GP1; |
| 187 | memset(p2->Control, 0, sizeof(p2->Control)); |
| 188 | // save resolution and registers for P.E.Op.S. compatibility |
| 189 | p2->Control[3] = (3 << 24) | ((GPU_GP1 >> 23) & 1); |
| 190 | p2->Control[4] = (4 << 24) | ((GPU_GP1 >> 29) & 3); |
| 191 | p2->Control[5] = (5 << 24) | (DisplayArea[0] | (DisplayArea[1] << 10)); |
| 192 | p2->Control[6] = (6 << 24) | (2560 << 12); |
| 193 | p2->Control[7] = (7 << 24) | (DisplayArea[4] | (DisplayArea[5] << 10)); |
| 194 | p2->Control[8] = (8 << 24) | ((GPU_GP1 >> 17) & 0x3f) | ((GPU_GP1 >> 10) & 0x40); |
| 195 | memcpy(p2->FrameBuffer, (u16*)GPU_FrameBuffer, FRAME_BUFFER_SIZE); |
| 196 | return (1); |
| 197 | } |
| 198 | else |
| 199 | { |
| 200 | GPU_GP1 = p2->GPU_gp1; |
| 201 | memcpy((u16*)GPU_FrameBuffer, p2->FrameBuffer, FRAME_BUFFER_SIZE); |
| 202 | GPU_writeStatus((5 << 24) | p2->Control[5]); |
| 203 | GPU_writeStatus((7 << 24) | p2->Control[7]); |
| 204 | GPU_writeStatus((8 << 24) | p2->Control[8]); |
| 205 | gpuSetTexture(GPU_GP1); |
| 206 | return (1); |
| 207 | } |
| 208 | return (0); |
| 209 | } |
| 210 | |
| 211 | /////////////////////////////////////////////////////////////////////////////// |
| 212 | // GPU DMA comunication |
| 213 | |
| 214 | /////////////////////////////////////////////////////////////////////////////// |
| 215 | u8 PacketSize[256] = |
| 216 | { |
| 217 | 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0-15 |
| 218 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 16-31 |
| 219 | 3, 3, 3, 3, 6, 6, 6, 6, 4, 4, 4, 4, 8, 8, 8, 8, // 32-47 |
| 220 | 5, 5, 5, 5, 8, 8, 8, 8, 7, 7, 7, 7, 11, 11, 11, 11, // 48-63 |
| 221 | 2, 2, 2, 2, 0, 0, 0, 0, 3, 3, 3, 3, 3, 3, 3, 3, // 64-79 |
| 222 | 3, 3, 3, 3, 0, 0, 0, 0, 4, 4, 4, 4, 4, 4, 4, 4, // 80-95 |
| 223 | 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 1, 1, 2, 2, 2, 2, // 96-111 |
| 224 | 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 1, 1, 2, 2, 2, 2, // 112-127 |
| 225 | 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 128- |
| 226 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 144 |
| 227 | 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 160 |
| 228 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // |
| 229 | 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // |
| 230 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // |
| 231 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // |
| 232 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // |
| 233 | }; |
| 234 | |
| 235 | /////////////////////////////////////////////////////////////////////////////// |
| 236 | INLINE void gpuSendPacket() |
| 237 | { |
| 238 | #ifdef DEBUG_ANALYSIS |
| 239 | dbg_anacnt_GPU_sendPacket++; |
| 240 | #endif |
| 241 | gpuSendPacketFunction(PacketBuffer.U4[0]>>24); |
| 242 | } |
| 243 | |
| 244 | /////////////////////////////////////////////////////////////////////////////// |
| 245 | INLINE void gpuCheckPacket(u32 uData) |
| 246 | { |
| 247 | if (PacketCount) |
| 248 | { |
| 249 | PacketBuffer.U4[PacketIndex++] = uData; |
| 250 | --PacketCount; |
| 251 | } |
| 252 | else |
| 253 | { |
| 254 | PacketBuffer.U4[0] = uData; |
| 255 | PacketCount = PacketSize[uData >> 24]; |
| 256 | PacketIndex = 1; |
| 257 | } |
| 258 | if (!PacketCount) gpuSendPacket(); |
| 259 | } |
| 260 | |
| 261 | /////////////////////////////////////////////////////////////////////////////// |
| 262 | void GPU_writeDataMem(u32* dmaAddress, s32 dmaCount) |
| 263 | { |
| 264 | #ifdef DEBUG_ANALYSIS |
| 265 | dbg_anacnt_GPU_writeDataMem++; |
| 266 | #endif |
| 267 | pcsx4all_prof_pause(PCSX4ALL_PROF_CPU); |
| 268 | pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 269 | u32 data; |
| 270 | const u16 *VIDEO_END=(GPU_FrameBuffer+(FRAME_BUFFER_SIZE/2)-1); |
| 271 | GPU_GP1 &= ~0x14000000; |
| 272 | |
| 273 | while (dmaCount) |
| 274 | { |
| 275 | if (FrameToWrite) |
| 276 | { |
| 277 | while (dmaCount--) |
| 278 | { |
| 279 | data = *dmaAddress++; |
| 280 | if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024; |
| 281 | pvram[px] = data; |
| 282 | if (++px>=x_end) |
| 283 | { |
| 284 | px = 0; |
| 285 | pvram += 1024; |
| 286 | if (++py>=y_end) |
| 287 | { |
| 288 | FrameToWrite = false; |
| 289 | GPU_GP1 &= ~0x08000000; |
| 290 | break; |
| 291 | } |
| 292 | } |
| 293 | if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024; |
| 294 | pvram[px] = data>>16; |
| 295 | if (++px>=x_end) |
| 296 | { |
| 297 | px = 0; |
| 298 | pvram += 1024; |
| 299 | if (++py>=y_end) |
| 300 | { |
| 301 | FrameToWrite = false; |
| 302 | GPU_GP1 &= ~0x08000000; |
| 303 | break; |
| 304 | } |
| 305 | } |
| 306 | } |
| 307 | } |
| 308 | else |
| 309 | { |
| 310 | data = *dmaAddress++; |
| 311 | dmaCount--; |
| 312 | gpuCheckPacket(data); |
| 313 | } |
| 314 | } |
| 315 | |
| 316 | GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000; |
| 317 | fb_dirty = true; |
| 318 | pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 319 | pcsx4all_prof_resume(PCSX4ALL_PROF_CPU); |
| 320 | } |
| 321 | |
| 322 | u32 *lUsedAddr[3]; |
| 323 | INLINE int CheckForEndlessLoop(u32 *laddr) |
| 324 | { |
| 325 | if(laddr==lUsedAddr[1]) return 1; |
| 326 | if(laddr==lUsedAddr[2]) return 1; |
| 327 | |
| 328 | if(laddr<lUsedAddr[0]) lUsedAddr[1]=laddr; |
| 329 | else lUsedAddr[2]=laddr; |
| 330 | lUsedAddr[0]=laddr; |
| 331 | return 0; |
| 332 | } |
| 333 | |
| 334 | /////////////////////////////////////////////////////////////////////////////// |
| 335 | long GPU_dmaChain(u32* baseAddr, u32 dmaVAddr) |
| 336 | { |
| 337 | #ifdef DEBUG_ANALYSIS |
| 338 | dbg_anacnt_GPU_dmaChain++; |
| 339 | #endif |
| 340 | pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 341 | u32 data, *address, count, offset; |
| 342 | unsigned int DMACommandCounter = 0; |
| 343 | long dma_words = 0; |
| 344 | |
| 345 | GPU_GP1 &= ~0x14000000; |
| 346 | lUsedAddr[0]=lUsedAddr[1]=lUsedAddr[2]=(u32*)0x1fffff; |
| 347 | dmaVAddr &= 0x001FFFFF; |
| 348 | while (dmaVAddr != 0x1FFFFF) |
| 349 | { |
| 350 | address = (baseAddr + (dmaVAddr >> 2)); |
| 351 | if(DMACommandCounter++ > 2000000) break; |
| 352 | if(CheckForEndlessLoop(address)) break; |
| 353 | data = *address++; |
| 354 | count = (data >> 24); |
| 355 | offset = data & 0x001FFFFF; |
| 356 | if (dmaVAddr != offset) dmaVAddr = offset; |
| 357 | else dmaVAddr = 0x1FFFFF; |
| 358 | |
| 359 | if(count>0) GPU_writeDataMem(address,count); |
| 360 | dma_words += 1 + count; |
| 361 | } |
| 362 | GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000; |
| 363 | pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 364 | |
| 365 | return dma_words; |
| 366 | } |
| 367 | |
| 368 | /////////////////////////////////////////////////////////////////////////////// |
| 369 | void GPU_writeData(u32 data) |
| 370 | { |
| 371 | const u16 *VIDEO_END=(GPU_FrameBuffer+(FRAME_BUFFER_SIZE/2)-1); |
| 372 | #ifdef DEBUG_ANALYSIS |
| 373 | dbg_anacnt_GPU_writeData++; |
| 374 | #endif |
| 375 | pcsx4all_prof_pause(PCSX4ALL_PROF_CPU); |
| 376 | pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 377 | GPU_GP1 &= ~0x14000000; |
| 378 | |
| 379 | if (FrameToWrite) |
| 380 | { |
| 381 | if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024; |
| 382 | pvram[px]=(u16)data; |
| 383 | if (++px>=x_end) |
| 384 | { |
| 385 | px = 0; |
| 386 | pvram += 1024; |
| 387 | if (++py>=y_end) |
| 388 | { |
| 389 | FrameToWrite = false; |
| 390 | GPU_GP1 &= ~0x08000000; |
| 391 | } |
| 392 | } |
| 393 | if (FrameToWrite) |
| 394 | { |
| 395 | if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024; |
| 396 | pvram[px]=data>>16; |
| 397 | if (++px>=x_end) |
| 398 | { |
| 399 | px = 0; |
| 400 | pvram += 1024; |
| 401 | if (++py>=y_end) |
| 402 | { |
| 403 | FrameToWrite = false; |
| 404 | GPU_GP1 &= ~0x08000000; |
| 405 | } |
| 406 | } |
| 407 | } |
| 408 | } |
| 409 | else |
| 410 | { |
| 411 | gpuCheckPacket(data); |
| 412 | } |
| 413 | GPU_GP1 |= 0x14000000; |
| 414 | fb_dirty = true; |
| 415 | pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 416 | pcsx4all_prof_resume(PCSX4ALL_PROF_CPU); |
| 417 | |
| 418 | } |
| 419 | |
| 420 | |
| 421 | /////////////////////////////////////////////////////////////////////////////// |
| 422 | void GPU_readDataMem(u32* dmaAddress, s32 dmaCount) |
| 423 | { |
| 424 | const u16 *VIDEO_END=(GPU_FrameBuffer+(FRAME_BUFFER_SIZE/2)-1); |
| 425 | #ifdef DEBUG_ANALYSIS |
| 426 | dbg_anacnt_GPU_readDataMem++; |
| 427 | #endif |
| 428 | if(!FrameToRead) return; |
| 429 | |
| 430 | pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 431 | GPU_GP1 &= ~0x14000000; |
| 432 | do |
| 433 | { |
| 434 | if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024; |
| 435 | // lower 16 bit |
| 436 | u32 data = (unsigned long)pvram[px]; |
| 437 | |
| 438 | if (++px>=x_end) |
| 439 | { |
| 440 | px = 0; |
| 441 | pvram += 1024; |
| 442 | } |
| 443 | |
| 444 | if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024; |
| 445 | // higher 16 bit (always, even if it's an odd width) |
| 446 | data |= (unsigned long)(pvram[px])<<16; |
| 447 | |
| 448 | *dmaAddress++ = data; |
| 449 | |
| 450 | if (++px>=x_end) |
| 451 | { |
| 452 | px = 0; |
| 453 | pvram += 1024; |
| 454 | if (++py>=y_end) |
| 455 | { |
| 456 | FrameToRead = false; |
| 457 | GPU_GP1 &= ~0x08000000; |
| 458 | break; |
| 459 | } |
| 460 | } |
| 461 | } while (--dmaCount); |
| 462 | |
| 463 | GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000; |
| 464 | pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 465 | } |
| 466 | |
| 467 | |
| 468 | |
| 469 | /////////////////////////////////////////////////////////////////////////////// |
| 470 | u32 GPU_readData(void) |
| 471 | { |
| 472 | const u16 *VIDEO_END=(GPU_FrameBuffer+(FRAME_BUFFER_SIZE/2)-1); |
| 473 | #ifdef DEBUG_ANALYSIS |
| 474 | dbg_anacnt_GPU_readData++; |
| 475 | #endif |
| 476 | pcsx4all_prof_pause(PCSX4ALL_PROF_CPU); |
| 477 | pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_READ); |
| 478 | GPU_GP1 &= ~0x14000000; |
| 479 | if (FrameToRead) |
| 480 | { |
| 481 | if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024; |
| 482 | GP0 = pvram[px]; |
| 483 | if (++px>=x_end) |
| 484 | { |
| 485 | px = 0; |
| 486 | pvram += 1024; |
| 487 | if (++py>=y_end) |
| 488 | { |
| 489 | FrameToRead = false; |
| 490 | GPU_GP1 &= ~0x08000000; |
| 491 | } |
| 492 | } |
| 493 | if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024; |
| 494 | GP0 |= pvram[px]<<16; |
| 495 | if (++px>=x_end) |
| 496 | { |
| 497 | px = 0; |
| 498 | pvram +=1024; |
| 499 | if (++py>=y_end) |
| 500 | { |
| 501 | FrameToRead = false; |
| 502 | GPU_GP1 &= ~0x08000000; |
| 503 | } |
| 504 | } |
| 505 | |
| 506 | } |
| 507 | GPU_GP1 |= 0x14000000; |
| 508 | |
| 509 | pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_READ); |
| 510 | pcsx4all_prof_resume(PCSX4ALL_PROF_CPU); |
| 511 | return (GP0); |
| 512 | } |
| 513 | |
| 514 | /////////////////////////////////////////////////////////////////////////////// |
| 515 | u32 GPU_readStatus(void) |
| 516 | { |
| 517 | #ifdef DEBUG_ANALYSIS |
| 518 | dbg_anacnt_GPU_readStatus++; |
| 519 | #endif |
| 520 | return GPU_GP1; |
| 521 | } |
| 522 | |
| 523 | /////////////////////////////////////////////////////////////////////////////// |
| 524 | void GPU_writeStatus(u32 data) |
| 525 | { |
| 526 | #ifdef DEBUG_ANALYSIS |
| 527 | dbg_anacnt_GPU_writeStatus++; |
| 528 | #endif |
| 529 | pcsx4all_prof_pause(PCSX4ALL_PROF_CPU); |
| 530 | pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 531 | switch (data >> 24) { |
| 532 | case 0x00: |
| 533 | gpuReset(); |
| 534 | break; |
| 535 | case 0x01: |
| 536 | GPU_GP1 &= ~0x08000000; |
| 537 | PacketCount = 0; FrameToRead = FrameToWrite = false; |
| 538 | break; |
| 539 | case 0x02: |
| 540 | GPU_GP1 &= ~0x08000000; |
| 541 | PacketCount = 0; FrameToRead = FrameToWrite = false; |
| 542 | break; |
| 543 | case 0x03: |
| 544 | GPU_GP1 = (GPU_GP1 & ~0x00800000) | ((data & 1) << 23); |
| 545 | break; |
| 546 | case 0x04: |
| 547 | if (data == 0x04000000) |
| 548 | PacketCount = 0; |
| 549 | GPU_GP1 = (GPU_GP1 & ~0x60000000) | ((data & 3) << 29); |
| 550 | break; |
| 551 | case 0x05: |
| 552 | DisplayArea[0] = (data & 0x000003FF); //(short)(data & 0x3ff); |
| 553 | DisplayArea[1] = ((data & 0x0007FC00)>>10); //(data & 0x000FFC00) >> 10; //(short)((data>>10)&0x1ff); |
| 554 | fb_dirty = true; |
| 555 | wasSkip = isSkip; |
| 556 | if (isSkip) |
| 557 | isSkip = false; |
| 558 | else |
| 559 | isSkip = skipFrame; |
| 560 | break; |
| 561 | case 0x07: |
| 562 | DisplayArea[4] = data & 0x000003FF; //(short)(data & 0x3ff); |
| 563 | DisplayArea[5] = (data & 0x000FFC00) >> 10; //(short)((data>>10) & 0x3ff); |
| 564 | fb_dirty = true; |
| 565 | break; |
| 566 | case 0x08: |
| 567 | { |
| 568 | GPU_GP1 = (GPU_GP1 & ~0x007F0000) | ((data & 0x3F) << 17) | ((data & 0x40) << 10); |
| 569 | static u32 HorizontalResolution[8] = { 256, 368, 320, 384, 512, 512, 640, 640 }; |
| 570 | DisplayArea[2] = HorizontalResolution[(GPU_GP1 >> 16) & 7]; |
| 571 | static u32 VerticalResolution[4] = { 240, 480, 256, 480 }; |
| 572 | DisplayArea[3] = VerticalResolution[(GPU_GP1 >> 19) & 3]; |
| 573 | isPAL = (data & 0x08) ? true : false; // if 1 - PAL mode, else NTSC |
| 574 | } |
| 575 | fb_dirty = true; |
| 576 | break; |
| 577 | case 0x10: |
| 578 | switch (data & 0xffff) { |
| 579 | case 0: |
| 580 | case 1: |
| 581 | case 3: |
| 582 | GP0 = (DrawingArea[1] << 10) | DrawingArea[0]; |
| 583 | break; |
| 584 | case 4: |
| 585 | GP0 = ((DrawingArea[3]-1) << 10) | (DrawingArea[2]-1); |
| 586 | break; |
| 587 | case 6: |
| 588 | case 5: |
| 589 | GP0 = (DrawingOffset[1] << 11) | DrawingOffset[0]; |
| 590 | break; |
| 591 | case 7: |
| 592 | GP0 = 2; |
| 593 | break; |
| 594 | default: |
| 595 | GP0 = 0; |
| 596 | } |
| 597 | break; |
| 598 | } |
| 599 | pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE); |
| 600 | pcsx4all_prof_resume(PCSX4ALL_PROF_CPU); |
| 601 | } |
| 602 | |
| 603 | #ifndef REARMED |
| 604 | |
| 605 | // Blitting functions |
| 606 | #include "gpu_blit.h" |
| 607 | |
| 608 | INLINE void gpuVideoOutput(void) |
| 609 | { |
| 610 | static s16 old_res_horz, old_res_vert, old_rgb24; |
| 611 | s16 h0, x0, y0, w0, h1; |
| 612 | |
| 613 | x0 = DisplayArea[0]; |
| 614 | y0 = DisplayArea[1]; |
| 615 | |
| 616 | w0 = DisplayArea[2]; |
| 617 | h0 = DisplayArea[3]; // video mode |
| 618 | |
| 619 | h1 = DisplayArea[5] - DisplayArea[4]; // display needed |
| 620 | if (h0 == 480) h1 = Min2(h1*2,480); |
| 621 | |
| 622 | u16* dest_screen16 = SCREEN; |
| 623 | u16* src_screen16 = &((u16*)GPU_FrameBuffer)[FRAME_OFFSET(x0,y0)]; |
| 624 | u32 isRGB24 = (GPU_GP1 & 0x00200000 ? 32 : 0); |
| 625 | |
| 626 | /* Clear the screen if resolution changed to prevent interlacing and clipping to clash */ |
| 627 | if( (w0 != old_res_horz || h1 != old_res_vert || (s16)isRGB24 != old_rgb24) ) |
| 628 | { |
| 629 | // Update old resolution |
| 630 | old_res_horz = w0; |
| 631 | old_res_vert = h1; |
| 632 | old_rgb24 = (s16)isRGB24; |
| 633 | // Finally, clear the screen for this special case |
| 634 | video_clear(); |
| 635 | } |
| 636 | |
| 637 | // Height centering |
| 638 | int sizeShift = 1; |
| 639 | if(h0==256) h0 = 240; else if(h0==480) sizeShift = 2; |
| 640 | if(h1>h0) { src_screen16 += ((h1-h0)>>sizeShift)*1024; h1 = h0; } |
| 641 | else if(h1<h0) dest_screen16 += ((h0-h1)>>sizeShift)*VIDEO_WIDTH; |
| 642 | |
| 643 | /* Main blitter */ |
| 644 | int incY = (h0==480) ? 2 : 1; |
| 645 | h0=(h0==480 ? 2048 : 1024); |
| 646 | |
| 647 | { |
| 648 | const int li=linesInterlace; |
| 649 | bool pi=progressInterlace; |
| 650 | bool pif=progressInterlace_flag; |
| 651 | switch ( w0 ) |
| 652 | { |
| 653 | case 256: |
| 654 | for(int y1=y0+h1; y0<y1; y0+=incY) |
| 655 | { |
| 656 | if(( 0 == (y0&li) ) && ((!pi) || (pif=!pif))) GPU_BlitWWDWW( src_screen16, dest_screen16, isRGB24); |
| 657 | dest_screen16 += VIDEO_WIDTH; |
| 658 | src_screen16 += h0; |
| 659 | } |
| 660 | break; |
| 661 | case 368: |
| 662 | for(int y1=y0+h1; y0<y1; y0+=incY) |
| 663 | { |
| 664 | if(( 0 == (y0&li) ) && ((!pi) || (pif=!pif))) GPU_BlitWWWWWWWWS( src_screen16, dest_screen16, isRGB24, 4); |
| 665 | dest_screen16 += VIDEO_WIDTH; |
| 666 | src_screen16 += h0; |
| 667 | } |
| 668 | break; |
| 669 | case 320: |
| 670 | for(int y1=y0+h1; y0<y1; y0+=incY) |
| 671 | { |
| 672 | if(( 0 == (y0&li) ) && ((!pi) || (pif=!pif))) GPU_BlitWW( src_screen16, dest_screen16, isRGB24); |
| 673 | dest_screen16 += VIDEO_WIDTH; |
| 674 | src_screen16 += h0; |
| 675 | } |
| 676 | break; |
| 677 | case 384: |
| 678 | for(int y1=y0+h1; y0<y1; y0+=incY) |
| 679 | { |
| 680 | if(( 0 == (y0&li) ) && ((!pi) || (pif=!pif))) GPU_BlitWWWWWS( src_screen16, dest_screen16, isRGB24); |
| 681 | dest_screen16 += VIDEO_WIDTH; |
| 682 | src_screen16 += h0; |
| 683 | } |
| 684 | break; |
| 685 | case 512: |
| 686 | for(int y1=y0+h1; y0<y1; y0+=incY) |
| 687 | { |
| 688 | if(( 0 == (y0&li) ) && ((!pi) || (pif=!pif))) GPU_BlitWWSWWSWS( src_screen16, dest_screen16, isRGB24); |
| 689 | dest_screen16 += VIDEO_WIDTH; |
| 690 | src_screen16 += h0; |
| 691 | } |
| 692 | break; |
| 693 | case 640: |
| 694 | for(int y1=y0+h1; y0<y1; y0+=incY) |
| 695 | { |
| 696 | if(( 0 == (y0&li) ) && ((!pi) || (pif=!pif))) GPU_BlitWS( src_screen16, dest_screen16, isRGB24); |
| 697 | dest_screen16 += VIDEO_WIDTH; |
| 698 | src_screen16 += h0; |
| 699 | } |
| 700 | break; |
| 701 | } |
| 702 | progressInterlace_flag=!progressInterlace_flag; |
| 703 | } |
| 704 | video_flip(); |
| 705 | } |
| 706 | |
| 707 | /////////////////////////////////////////////////////////////////////////////// |
| 708 | void GPU_updateLace(void) |
| 709 | { |
| 710 | #ifdef ENABLE_GPU_LOG_SUPPORT |
| 711 | fprintf(stdout,"GPU_updateLace()\n"); |
| 712 | #endif |
| 713 | #ifdef DEBUG_ANALYSIS |
| 714 | dbg_anacnt_GPU_updateLace++; |
| 715 | #endif |
| 716 | pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_COUNTERS); |
| 717 | #ifdef PROFILER_PCSX4ALL |
| 718 | pcsx4all_prof_frames++; |
| 719 | #endif |
| 720 | #ifdef DEBUG_FRAME |
| 721 | if(isdbg_frame()) |
| 722 | { |
| 723 | static int passed=0; |
| 724 | if (!passed) dbg_enable(); |
| 725 | else pcsx4all_exit(); |
| 726 | passed++; |
| 727 | } |
| 728 | #endif |
| 729 | |
| 730 | // Frame skip table |
| 731 | static const unsigned char skipTable[12][12] = |
| 732 | { |
| 733 | { 0,0,0,0,0,0,0,0,0,0,0,0 }, |
| 734 | { 0,0,0,0,0,0,0,0,0,0,0,1 }, |
| 735 | { 0,0,0,0,0,1,0,0,0,0,0,1 }, |
| 736 | { 0,0,0,1,0,0,0,1,0,0,0,1 }, |
| 737 | { 0,0,1,0,0,1,0,0,1,0,0,1 }, |
| 738 | { 0,1,0,0,1,0,1,0,0,1,0,1 }, |
| 739 | { 0,1,0,1,0,1,0,1,0,1,0,1 }, |
| 740 | { 0,1,0,1,1,0,1,0,1,1,0,1 }, |
| 741 | { 0,1,1,0,1,1,0,1,1,0,1,1 }, |
| 742 | { 0,1,1,1,0,1,1,1,0,1,1,1 }, |
| 743 | { 0,1,1,1,1,1,0,1,1,1,1,1 }, |
| 744 | { 0,1,1,1,1,1,1,1,1,1,1,1 } |
| 745 | }; |
| 746 | |
| 747 | // Interlace bit toggle |
| 748 | GPU_GP1 ^= 0x80000000; |
| 749 | |
| 750 | // Update display |
| 751 | if ((!skipFrame) && (!isSkip) && (fb_dirty) && (!(((GPU_GP1&0x08000000))||((GPU_GP1&0x00800000))))) |
| 752 | { |
| 753 | gpuVideoOutput(); // Display updated |
| 754 | |
| 755 | if (DisplayArea[3] == 480) |
| 756 | { |
| 757 | if (linesInterlace_user) linesInterlace = 3; // 1/4 of lines |
| 758 | else linesInterlace = 1; // if 480 we only need half of lines |
| 759 | } |
| 760 | else if (linesInterlace != linesInterlace_user) |
| 761 | { |
| 762 | linesInterlace = linesInterlace_user; // resolution changed from 480 to lower one |
| 763 | video_clear(); |
| 764 | } |
| 765 | } |
| 766 | |
| 767 | // Limit FPS |
| 768 | if (frameLimit) |
| 769 | { |
| 770 | static unsigned next=get_ticks(); |
| 771 | if (!skipFrame) |
| 772 | { |
| 773 | unsigned now=get_ticks(); |
| 774 | if (now<next) wait_ticks(next-now); |
| 775 | } |
| 776 | next+=(isPAL?(1000000/50):((unsigned)(1000000.0/59.94))); |
| 777 | } |
| 778 | |
| 779 | // Show FPS statistics |
| 780 | if (show_fps) |
| 781 | { |
| 782 | static u32 real_fps=0; |
| 783 | static u32 prev=get_ticks(); |
| 784 | static char msg[32]="FPS=000/00 SPD=000%"; |
| 785 | u32 now=get_ticks(); |
| 786 | real_fps++; |
| 787 | if ((now-prev)>=1000000) |
| 788 | { |
| 789 | u32 expected_fps=(isPAL?50:60); |
| 790 | sprintf(msg,"FPS=%3d/%2d SPD=%3d%%",((real_fps*(12-skipCount))/12),((expected_fps*(12-skipCount))/12),((real_fps*100)/expected_fps)); |
| 791 | prev=now; |
| 792 | real_fps=0; |
| 793 | } |
| 794 | port_printf(5,5,msg); |
| 795 | } |
| 796 | |
| 797 | // Update frame-skip |
| 798 | if (!alt_fps) |
| 799 | { |
| 800 | // Video frame-skip |
| 801 | skipFrame=skipTable[skipCount][skCount]; |
| 802 | skCount--; if (skCount<0) skCount=11; |
| 803 | isSkip=skipFrame; |
| 804 | } |
| 805 | else |
| 806 | { |
| 807 | // Game frame-skip |
| 808 | if (!isSkip) |
| 809 | { |
| 810 | skipFrame=skipTable[skipCount][skCount]; |
| 811 | skCount--; if (skCount<0) skCount=11; |
| 812 | isSkip=true; |
| 813 | } |
| 814 | } |
| 815 | fb_dirty=false; |
| 816 | |
| 817 | pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_COUNTERS); |
| 818 | } |
| 819 | |
| 820 | #else |
| 821 | |
| 822 | #include "../../frontend/plugin_lib.h" |
| 823 | #include "../../frontend/cspace.h" |
| 824 | |
| 825 | extern "C" { |
| 826 | |
| 827 | static const struct rearmed_cbs *cbs; |
| 828 | static void *screen_buf; |
| 829 | static s16 old_res_horz, old_res_vert, old_rgb24; |
| 830 | |
| 831 | static void blit(void) |
| 832 | { |
| 833 | s16 isRGB24 = (GPU_GP1 & 0x00200000) ? 1 : 0; |
| 834 | s16 h0, x0, y0, w0, h1; |
| 835 | u16 *srcs; |
| 836 | u8 *dest; |
| 837 | |
| 838 | x0 = DisplayArea[0] & ~1; // alignment needed by blitter |
| 839 | y0 = DisplayArea[1]; |
| 840 | srcs = &((u16*)GPU_FrameBuffer)[FRAME_OFFSET(x0,y0)]; |
| 841 | |
| 842 | w0 = DisplayArea[2]; |
| 843 | h0 = DisplayArea[3]; // video mode |
| 844 | |
| 845 | h1 = DisplayArea[5] - DisplayArea[4]; // display needed |
| 846 | if (h0 == 480) h1 = Min2(h1*2,480); |
| 847 | |
| 848 | if (h1 <= 0) |
| 849 | return; |
| 850 | |
| 851 | if (w0 != old_res_horz || h1 != old_res_vert || isRGB24 != old_rgb24) |
| 852 | { |
| 853 | old_res_horz = w0; |
| 854 | old_res_vert = h1; |
| 855 | old_rgb24 = (s16)isRGB24; |
| 856 | screen_buf = cbs->pl_vout_set_mode(w0, h1, isRGB24 ? 24 : 16); |
| 857 | } |
| 858 | dest = (u8 *)screen_buf; |
| 859 | |
| 860 | if (isRGB24) |
| 861 | { |
| 862 | #ifndef MAEMO |
| 863 | for (; h1-- > 0; dest += w0 * 3, srcs += 1024) |
| 864 | { |
| 865 | bgr888_to_rgb888(dest, srcs, w0 * 3); |
| 866 | } |
| 867 | #else |
| 868 | for (; h1-- > 0; dest += w0 * 2, srcs += 1024) |
| 869 | { |
| 870 | bgr888_to_rgb565(dest, srcs, w0 * 3); |
| 871 | } |
| 872 | #endif |
| 873 | } |
| 874 | else |
| 875 | { |
| 876 | for (; h1-- > 0; dest += w0 * 2, srcs += 1024) |
| 877 | { |
| 878 | bgr555_to_rgb565(dest, srcs, w0 * 2); |
| 879 | } |
| 880 | } |
| 881 | |
| 882 | screen_buf = cbs->pl_vout_flip(); |
| 883 | } |
| 884 | |
| 885 | static void blit_raw(void) |
| 886 | { |
| 887 | s16 isRGB24 = (GPU_GP1 & 0x00200000) ? 1 : 0; |
| 888 | s16 h0, w0, h1; |
| 889 | |
| 890 | w0 = DisplayArea[2]; |
| 891 | h0 = DisplayArea[3]; // video mode |
| 892 | h1 = DisplayArea[5] - DisplayArea[4]; // display needed |
| 893 | if (h0 == 480) h1 = Min2(h1*2,480); |
| 894 | |
| 895 | if (h1 <= 0) |
| 896 | return; |
| 897 | |
| 898 | if (w0 != old_res_horz || h1 != old_res_vert || isRGB24 != old_rgb24) |
| 899 | { |
| 900 | old_res_horz = w0; |
| 901 | old_res_vert = h1; |
| 902 | old_rgb24 = (s16)isRGB24; |
| 903 | screen_buf = cbs->pl_vout_set_mode(w0, h1, isRGB24 ? 24 : 16); |
| 904 | } |
| 905 | cbs->pl_vout_raw_flip(DisplayArea[0], DisplayArea[1]); |
| 906 | } |
| 907 | |
| 908 | void GPU_updateLace(void) |
| 909 | { |
| 910 | // Interlace bit toggle |
| 911 | GPU_GP1 ^= 0x80000000; |
| 912 | |
| 913 | if (!fb_dirty || (GPU_GP1&0x08800000)) |
| 914 | return; |
| 915 | |
| 916 | if (!wasSkip) { |
| 917 | if (cbs->pl_vout_raw_flip != NULL) |
| 918 | blit_raw(); |
| 919 | else |
| 920 | blit(); |
| 921 | fb_dirty = false; |
| 922 | skCount = 0; |
| 923 | } |
| 924 | else { |
| 925 | skCount++; |
| 926 | if (skCount >= 8) |
| 927 | wasSkip = isSkip = 0; |
| 928 | } |
| 929 | |
| 930 | skipFrame = cbs->fskip_advice || cbs->frameskip == 1; |
| 931 | } |
| 932 | |
| 933 | long GPUopen(unsigned long *, char *, char *) |
| 934 | { |
| 935 | cbs->pl_vout_open(); |
| 936 | screen_buf = cbs->pl_vout_flip(); |
| 937 | return 0; |
| 938 | } |
| 939 | |
| 940 | long GPUclose(void) |
| 941 | { |
| 942 | cbs->pl_vout_close(); |
| 943 | return 0; |
| 944 | } |
| 945 | |
| 946 | long GPUfreeze(unsigned int ulGetFreezeData, GPUFreeze_t* p2) |
| 947 | { |
| 948 | if (ulGetFreezeData > 1) |
| 949 | return 0; |
| 950 | |
| 951 | return GPU_freeze(ulGetFreezeData, p2); |
| 952 | } |
| 953 | |
| 954 | void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_) |
| 955 | { |
| 956 | enableAbbeyHack = cbs_->gpu_unai.abe_hack; |
| 957 | light = !cbs_->gpu_unai.no_light; |
| 958 | blend = !cbs_->gpu_unai.no_blend; |
| 959 | if (cbs_->pl_vout_set_raw_vram) |
| 960 | cbs_->pl_vout_set_raw_vram((void *)GPU_FrameBuffer); |
| 961 | |
| 962 | cbs = cbs_; |
| 963 | } |
| 964 | |
| 965 | } /* extern "C" */ |
| 966 | |
| 967 | #endif |