| 1 | /* FCE Ultra - NES/Famicom Emulator |
| 2 | * |
| 3 | * Copyright notice for this file: |
| 4 | * Copyright (C) 2002 Ben Parnell |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | typedef struct { |
| 22 | int32 count; /* Cycle counter */ |
| 23 | int32 tcount; /* Temporary cycle counter */ |
| 24 | uint16 PC; /* I'll change this to uint32 later... */ |
| 25 | /* I'll need to AND PC after increments to 0xFFFF */ |
| 26 | /* when I do, though. Perhaps an IPC() macro? */ |
| 27 | uint8 A,X,Y,S,P,mooPI,PZ; |
| 28 | uint8 DB; /* Data bus "cache" for reads from certain areas */ |
| 29 | uint8 IRQlow; /* Simulated IRQ pin held low(or is it high?). */ |
| 30 | uint8 jammed; |
| 31 | } X6502; |
| 32 | |
| 33 | extern X6502 X; |
| 34 | |
| 35 | #define N_FLAG 0x80 |
| 36 | #define V_FLAG 0x40 |
| 37 | #define U_FLAG 0x20 |
| 38 | #define B_FLAG 0x10 |
| 39 | #define D_FLAG 0x08 |
| 40 | #define I_FLAG 0x04 |
| 41 | #define Z_FLAG 0x02 |
| 42 | #define C_FLAG 0x01 |
| 43 | |
| 44 | extern uint32 timestamp; |
| 45 | extern void FP_FASTAPASS(1) (*MapIRQHook)(int a); |
| 46 | |
| 47 | #define NTSC_CPU 1789772.7272727272727272 |
| 48 | #define PAL_CPU 1662607.125 |
| 49 | |
| 50 | #define FCEU_IQEXT 0x01 |
| 51 | #define FCEU_IQNMI 0x08 |
| 52 | #define FCEU_IQDPCM 0x10 |
| 53 | #define FCEU_IQFCOUNT 0x20 |
| 54 | #define FCEU_IQTEMP 0x80 |
| 55 | |
| 56 | void X6502_Reset(void); |
| 57 | void X6502_Power(void); |
| 58 | void X6502_Run(int32 cycles); |
| 59 | |
| 60 | void TriggerIRQ(void); |
| 61 | void TriggerNMI(void); |
| 62 | void TriggerNMINSF(void); |
| 63 | |
| 64 | void FASTAPASS(1) X6502_AddCycles(int x); |
| 65 | void FASTAPASS(1) X6502_IRQBegin(int w); |
| 66 | void FASTAPASS(1) X6502_IRQEnd(int w); |