1 #include "../pico_int.h"
2 #include "../sound/ym2612.h"
4 struct Pico32x Pico32x;
7 static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
9 if (sh2->pending_irl > sh2->pending_int_irq) {
10 elprintf(EL_32X, "%csh2 ack/irl %d @ %08x",
11 sh2->is_slave ? 's' : 'm', level, sh2->pc);
12 return 64 + sh2->pending_irl / 2;
14 elprintf(EL_32X, "%csh2 ack/int %d/%d @ %08x",
15 sh2->is_slave ? 's' : 'm', level, sh2->pending_int_vector, sh2->pc);
16 sh2->pending_int_irq = 0; // auto-clear
17 sh2->pending_level = sh2->pending_irl;
18 return sh2->pending_int_vector;
22 void p32x_update_irls(int nested_call)
24 int irqs, mlvl = 0, slvl = 0;
27 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
33 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
38 elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
39 sh2_irl_irq(&msh2, mlvl, nested_call);
40 sh2_irl_irq(&ssh2, slvl, nested_call);
43 p32x_poll_event(mlvl | (slvl << 1), 0);
46 void Pico32xStartup(void)
48 elprintf(EL_STATUS|EL_32X, "32X startup");
53 msh2.irq_callback = sh2_irq_cb;
55 ssh2.irq_callback = sh2_irq_cb;
60 Pico32x.vdp_regs[0] |= P32XV_nPAL;
62 PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
63 PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
68 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
69 void p32x_reset_sh2s(void)
71 elprintf(EL_32X, "sh2 reset");
76 // if we don't have BIOS set, perform it's work here.
78 if (p32x_bios_m == NULL) {
79 unsigned int idl_src, idl_dst, idl_size; // initial data load
83 idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
84 idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
85 idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
86 if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
87 idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
88 elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
89 idl_src, idl_dst, idl_size);
92 memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
95 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
96 sh2_set_gbr(0, 0x20004000);
100 Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
101 // program will set M_OK
105 if (p32x_bios_s == NULL) {
109 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3ec));
110 sh2_set_gbr(1, 0x20004000);
112 // program will set S_OK
116 void Pico32xInit(void)
120 void PicoPower32x(void)
122 memset(&Pico32x, 0, sizeof(Pico32x));
124 Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
125 Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
126 Pico32x.sh2_regs[0] = P32XS2_ADEN;
129 void PicoUnload32x(void)
131 if (Pico32xMem != NULL)
132 plat_munmap(Pico32xMem, sizeof(*Pico32xMem));
137 PicoAHW &= ~PAHW_32X;
140 void PicoReset32x(void)
142 if (PicoAHW & PAHW_32X) {
143 Pico32x.sh2irqs |= P32XI_VRES;
145 p32x_poll_event(3, 0);
149 static void p32x_start_blank(void)
151 if (Pico32xDrawMode != PDM32X_OFF && !PicoSkipFrame) {
156 offs = 8; lines = 224;
157 if ((Pico.video.reg[1] & 8) && !(PicoOpt & POPT_ALT_RENDERER)) {
162 // XXX: no proper handling of 32col mode..
163 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
164 (Pico.video.reg[12] & 1) && // 40col mode
165 (PicoDrawMask & PDRAW_32X_ON))
167 int md_bg = Pico.video.reg[7] & 0x3f;
169 // we draw full layer (not line-by-line)
170 PicoDraw32xLayer(offs, lines, md_bg);
172 else if (Pico32xDrawMode != PDM32X_32X_ONLY)
173 PicoDraw32xLayerMdOnly(offs, lines);
179 Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
181 // FB swap waits until vblank
182 if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
183 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
184 Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
185 Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
188 Pico32x.sh2irqs |= P32XI_VINT;
190 p32x_poll_event(3, 1);
193 static __inline void run_m68k(int cyc)
197 p32x_poll_event(3, 0);
198 #if defined(EMU_C68K)
199 PicoCpuCM68k.cycles = cyc;
200 CycloneRun(&PicoCpuCM68k);
201 SekCycleCnt += cyc - PicoCpuCM68k.cycles;
202 #elif defined(EMU_M68K)
203 SekCycleCnt += m68k_execute(cyc);
204 #elif defined(EMU_F68K)
205 SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
211 // ~1463.8, but due to cache misses and slow mem
212 // it's much lower than that
213 //#define SH2_LINE_CYCLES 735
214 #define CYCLES_M68K2MSH2(x) (((x) * p32x_msh2_multiplier) >> 10)
215 #define CYCLES_M68K2SSH2(x) (((x) * p32x_ssh2_multiplier) >> 10)
218 #define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
221 SekCycleAim += m68k_cycles; \
222 while (SekCycleCnt < SekCycleAim) { \
223 slice = SekCycleCnt; \
224 run_m68k(SekCycleAim - SekCycleCnt); \
225 if (!(Pico32x.regs[0] & P32XS_nRES)) \
226 continue; /* SH2s reseting */ \
227 slice = SekCycleCnt - slice; /* real count from 68k */ \
228 if (SekCycleCnt < SekCycleAim) \
229 elprintf(EL_32X, "slice %d", slice); \
230 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) { \
232 sh2_execute(&ssh2, CYCLES_M68K2SSH2(slice)); \
235 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) { \
237 sh2_execute(&msh2, CYCLES_M68K2MSH2(slice)); \
240 pprof_start(dummy); \
246 #define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
249 for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
250 run_m68k(STEP_68K); \
251 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
252 sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
253 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
254 sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
257 i = (m68k_cycles) - i; \
259 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
260 sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
261 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
262 sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
265 #define CPUS_RUN CPUS_RUN_SIMPLE
266 //#define CPUS_RUN CPUS_RUN_LOCKSTEP
268 #include "../pico_cmn.c"
270 void PicoFrame32x(void)
272 pwm_frame_smp_cnt = 0;
274 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
275 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
276 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
278 p32x_poll_event(3, 1);
282 elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);