1 #include "../pico_int.h"
2 #include "../sound/ym2612.h"
4 struct Pico32x Pico32x;
7 int p32x_msh2_multiplier = MSH2_MULTI_DEFAULT;
8 int p32x_ssh2_multiplier = SSH2_MULTI_DEFAULT;
10 static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
12 if (sh2->pending_irl > sh2->pending_int_irq) {
13 elprintf(EL_32X, "%csh2 ack/irl %d @ %08x",
14 sh2->is_slave ? 's' : 'm', level, sh2->pc);
15 return 64 + sh2->pending_irl / 2;
17 elprintf(EL_32X, "%csh2 ack/int %d/%d @ %08x",
18 sh2->is_slave ? 's' : 'm', level, sh2->pending_int_vector, sh2->pc);
19 sh2->pending_int_irq = 0; // auto-clear
20 sh2->pending_level = sh2->pending_irl;
21 return sh2->pending_int_vector;
25 void p32x_update_irls(int nested_call)
27 int irqs, mlvl = 0, slvl = 0;
30 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
36 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
41 elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
42 sh2_irl_irq(&msh2, mlvl, nested_call);
43 sh2_irl_irq(&ssh2, slvl, nested_call);
46 p32x_poll_event(mlvl | (slvl << 1), 0);
49 void Pico32xStartup(void)
51 elprintf(EL_STATUS|EL_32X, "32X startup");
56 msh2.irq_callback = sh2_irq_cb;
58 ssh2.irq_callback = sh2_irq_cb;
63 Pico32x.vdp_regs[0] |= P32XV_nPAL;
65 PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
66 PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
71 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
72 void p32x_reset_sh2s(void)
74 elprintf(EL_32X, "sh2 reset");
79 // if we don't have BIOS set, perform it's work here.
81 if (p32x_bios_m == NULL) {
82 unsigned int idl_src, idl_dst, idl_size; // initial data load
86 idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
87 idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
88 idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
89 if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
90 idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
91 elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
92 idl_src, idl_dst, idl_size);
95 memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
98 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
99 sh2_set_gbr(0, 0x20004000);
103 Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
104 // program will set M_OK
108 if (p32x_bios_s == NULL) {
112 vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3ec));
113 sh2_set_gbr(1, 0x20004000);
115 // program will set S_OK
119 void Pico32xInit(void)
123 void PicoPower32x(void)
125 memset(&Pico32x, 0, sizeof(Pico32x));
127 Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
128 Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
129 Pico32x.sh2_regs[0] = P32XS2_ADEN;
132 void PicoUnload32x(void)
134 if (Pico32xMem != NULL)
135 plat_munmap(Pico32xMem, sizeof(*Pico32xMem));
140 PicoAHW &= ~PAHW_32X;
143 void PicoReset32x(void)
145 if (PicoAHW & PAHW_32X) {
146 Pico32x.sh2irqs |= P32XI_VRES;
148 p32x_poll_event(3, 0);
152 static void p32x_start_blank(void)
154 if (Pico32xDrawMode != PDM32X_OFF && !PicoSkipFrame) {
159 offs = 8; lines = 224;
160 if ((Pico.video.reg[1] & 8) && !(PicoOpt & POPT_ALT_RENDERER)) {
165 // XXX: no proper handling of 32col mode..
166 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
167 (Pico.video.reg[12] & 1) && // 40col mode
168 (PicoDrawMask & PDRAW_32X_ON))
170 int md_bg = Pico.video.reg[7] & 0x3f;
172 // we draw full layer (not line-by-line)
173 PicoDraw32xLayer(offs, lines, md_bg);
175 else if (Pico32xDrawMode != PDM32X_32X_ONLY)
176 PicoDraw32xLayerMdOnly(offs, lines);
182 Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
184 // FB swap waits until vblank
185 if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
186 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
187 Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
188 Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
191 Pico32x.sh2irqs |= P32XI_VINT;
193 p32x_poll_event(3, 1);
196 static __inline void run_m68k(int cyc)
200 p32x_poll_event(3, 0);
201 #if defined(EMU_C68K)
202 PicoCpuCM68k.cycles = cyc;
203 CycloneRun(&PicoCpuCM68k);
204 SekCycleCnt += cyc - PicoCpuCM68k.cycles;
205 #elif defined(EMU_M68K)
206 SekCycleCnt += m68k_execute(cyc);
207 #elif defined(EMU_F68K)
208 SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
214 // ~1463.8, but due to cache misses and slow mem
215 // it's much lower than that
216 //#define SH2_LINE_CYCLES 735
217 #define CYCLES_M68K2MSH2(x) (((x) * p32x_msh2_multiplier) >> 10)
218 #define CYCLES_M68K2SSH2(x) (((x) * p32x_ssh2_multiplier) >> 10)
221 #define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
224 SekCycleAim += m68k_cycles; \
225 while (SekCycleCnt < SekCycleAim) { \
226 slice = SekCycleCnt; \
227 run_m68k(SekCycleAim - SekCycleCnt); \
228 if (!(Pico32x.regs[0] & P32XS_nRES)) \
229 continue; /* SH2s reseting */ \
230 slice = SekCycleCnt - slice; /* real count from 68k */ \
231 if (SekCycleCnt < SekCycleAim) \
232 elprintf(EL_32X, "slice %d", slice); \
233 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) { \
235 sh2_execute(&ssh2, CYCLES_M68K2SSH2(slice)); \
238 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) { \
240 sh2_execute(&msh2, CYCLES_M68K2MSH2(slice)); \
243 pprof_start(dummy); \
249 #define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
252 for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
253 run_m68k(STEP_68K); \
254 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
255 sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
256 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
257 sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
260 i = (m68k_cycles) - i; \
262 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
263 sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
264 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
265 sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
268 #define CPUS_RUN CPUS_RUN_SIMPLE
269 //#define CPUS_RUN CPUS_RUN_LOCKSTEP
271 #include "../pico_cmn.c"
273 void PicoFrame32x(void)
275 pwm_frame_smp_cnt = 0;
277 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
278 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
279 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
281 p32x_poll_event(3, 1);
285 elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);