2 // This file is part of the Cyclone 68000 Emulator
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4 // Copyright (c) 2011 FinalDave (emudave (at) gmail.com)
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6 // This code is licensed under the GNU General Public License version 2.0 and the MAME License.
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7 // You can choose the license that has the most advantages for you.
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9 // SVN repository can be found at http://code.google.com/p/cyclone68000/
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13 // --------------------- Opcodes 0x1000+ ---------------------
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14 // Emit a Move opcode, 00xxdddd ddssssss
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21 // Get source and target EA
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23 tea =(op&0x01c0)>>3;
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24 tea|=(op&0x0e00)>>9;
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26 if (tea>=8 && tea<0x10) movea=1;
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28 // Find size extension
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32 case 0x1000: size=0; break;
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33 case 0x3000: size=1; break;
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34 case 0x2000: size=2; break;
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37 if (movea && size<1) return 1; // movea.b is invalid
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39 // See if we can do this opcode:
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40 if (EaCanRead (sea,size)==0) return 1;
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41 if (EaCanWrite(tea )==0) return 1;
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44 if (tea<0x38) use&=~0x0e00; // Use same handler for register ?0-7
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46 if (tea>=0x18 && tea<0x28 && (tea&7)==7) use|=0x0e00; // Specific handler for (a7)+ and -(a7)
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48 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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50 OpStart(op); Cycles=4;
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52 EaCalc(0,0x003f,sea,size);
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53 EaRead(0, 0,sea,size);
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55 ot(" adds r1,r0,#0 ;@ Defines NZ, clears CV\n");
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57 if (movea==0) ot(" mrs r9,cpsr ;@ r9=NZCV flags\n");
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60 if (movea) size=2; // movea always expands to 32-bits
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62 EaCalc (0,0x0e00,tea,size);
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63 EaWrite(0, 1,tea,size);
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69 // --------------------- Opcodes 0x41c0+ ---------------------
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70 // Emit an Lea opcode, 0100nnn1 11aaaaaa
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77 tea=(op&0x0e00)>>9; tea|=8;
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79 if (EaCanRead(sea,-1)==0) return 1; // See if we can do this opcode:
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82 use&=~0x0e00; // Also use 1 handler for target ?0-7
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83 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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85 OpStart(op); Cycles=4;
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87 EaCalc (1,0x003f,sea,0); // Lea
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88 EaCalc (0,0x0e00,tea,2);
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89 EaWrite(0, 1,tea,2);
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94 if (sea< 0x18) Cycles+=4;
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95 else if (sea==0x30) Cycles+=12;
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104 // --------------------- Opcodes 0x40c0+ ---------------------
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106 // Pack our flags into r1, in SR/CCR register format
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108 void OpFlagsToReg(int high)
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110 ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");
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111 ot(" eor r0,r1,r1,ror #1 ;@ Bit 0=C^V\n");
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112 ot(" tst r0,#1 ;@ 1 if C!=V\n");
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113 ot(" eorne r1,r1,#3 ;@ ____NZVC\n");
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115 ot(" ldrb r0,[r7,#0x45] ;@ X bit\n");
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116 if (high) ot(" ldrb r2,[r7,#0x44] ;@ Include SR high\n");
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117 ot(" and r0,r0,#0x02\n");
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118 if (high) ot(" orr r1,r1,r2,lsl #8\n");
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119 ot(" orr r1,r1,r0,lsl #3 ;@ ___XNZVC\n");
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123 // Convert SR/CRR register in r0 to our flags
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125 void OpRegToFlags(int high)
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127 ot(" eor r1,r0,r0,ror #1 ;@ Bit 0=C^V\n");
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128 ot(" mov r2,r0,lsr #3 ;@ r2=___XN\n");
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129 ot(" tst r1,#1 ;@ 1 if C!=V\n");
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130 ot(" eorne r0,r0,#3 ;@ ___XNZCV\n");
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131 ot(" strb r2,[r7,#0x45] ;@ Store X bit\n");
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132 ot(" mov r9,r0,lsl #28 ;@ r9=NZCV...\n");
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136 ot(" mov r0,r0,ror #8\n");
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137 ot(" strb r0,[r7,#0x44] ;@ Store SR high\n");
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142 static void SuperCheck(int op)
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144 ot(" ldrb r0,[r7,#0x44] ;@ Get SR high\n");
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145 ot(" tst r0,#0x20 ;@ Check we are in supervisor mode\n");
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146 ot(" beq WrongMode%.4x ;@ No\n",op);
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150 static void SuperEnd(int op)
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152 ot("WrongMode%.4x%s\n",op,ms?"":":");
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153 ot(";@ todo - cause an exception\n");
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157 // Move SR opcode, 01000tt0 11aaaaaa move to SR
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158 int OpMoveSr(int op)
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169 if (EaCanWrite(ea)==0) return 1; // See if we can do this opcode:
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172 default: return 1; // todo
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175 if (EaCanRead(ea,size)==0) return 1; // See if we can do this opcode:
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180 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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183 if (type==0) Cycles=8;
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184 else if (type==1) Cycles=6;
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187 if (Amatch && ea==0x3c) Cycles-=4; // Correct?
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189 if (type==0 || type==3) SuperCheck(op);
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191 if (type==0 || type==1)
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193 OpFlagsToReg(type==0);
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194 EaCalc (0,0x003f,ea,size);
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195 EaWrite(0, 1,ea,size);
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198 if (type==2 || type==3)
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200 EaCalc(0,0x003f,ea,size);
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201 EaRead(0, 0,ea,size);
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202 OpRegToFlags(type==3);
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203 if (type==3) CheckInterrupt();
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208 if (type==0 || type==3) SuperEnd(op);
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214 // Ori/Andi/Eori $nnnn,sr 0000t0t0 01111100
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215 int OpArithSr(int op)
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220 type=(op>>9)&5; if (type==4) return 1;
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225 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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227 OpStart(op); Cycles=16;
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231 EaCalc(0,0x003f,ea,size);
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232 EaRead(0, 10,ea,size);
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234 OpFlagsToReg(size);
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235 if (type==0) ot(" orr r0,r1,r10\n");
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236 if (type==1) ot(" and r0,r1,r10\n");
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237 if (type==5) ot(" eor r0,r1,r10\n");
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238 OpRegToFlags(size);
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239 if (size) CheckInterrupt();
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247 // --------------------- Opcodes 0x4850+ ---------------------
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248 // Emit an Pea opcode, 01001000 01aaaaaa
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254 ea=op&0x003f; if (ea<0x10) return 1; // Swap opcode
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255 if (EaCanRead(ea,-1)==0) return 1; // See if we can do this opcode:
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258 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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260 OpStart(op); Cycles=20;
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262 EaCalc (1,0x003f, ea,0);
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264 ot(" ldr r0,[r7,#0x3c]\n");
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265 ot(" sub r0,r0,#4 ;@ Predecrement A7\n");
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266 ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
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268 MemHandler(1,2); // Write 32-bit
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276 // --------------------- Opcodes 0x4880+ ---------------------
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277 // Emit a Movem opcode, 01001d00 1xeeeeee regmask
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278 int OpMovem(int op)
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280 int size=0,ea=0,cea=0,dir=0;
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281 int use=0,decr=0,change=0;
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283 size=((op>>6)&1)+1;
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285 dir=(op>>10)&1; // Direction
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287 if (ea<0x10 || ea>0x39) return 1; // Invalid EA
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288 if ((ea&0x38)==0x18 || (ea&0x38)==0x20) change=1;
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289 if ((ea&0x38)==0x20) decr=1; // -(An), bitfield is decr
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291 // See if we can do this opcode:
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292 if (EaCanWrite(ea)==0) return 1;
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294 cea=ea; if (change) cea=0x10;
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297 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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301 ot(" stmdb sp!,{r9} ;@ Push r9\n");
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302 ot(" ldrh r11,[r4],#2 ;@ r11=register mask\n");
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305 ot(";@ Get the address into r9:\n");
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306 EaCalc(9,0x003f,cea,size);
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308 ot(";@ r10=Register Index*4:\n");
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309 if (decr) ot(" mov r10,#0x3c ;@ order reversed for -(An)\n");
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310 else ot(" mov r10,#0\n");
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313 ot("MoreReg%.4x%s\n",op, ms?"":":");
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315 ot(" tst r11,#1\n");
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316 ot(" beq SkipReg%.4x\n",op);
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319 if (decr) ot(" sub r9,r9,#%d ;@ Pre-decrement address\n",1<<size);
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323 ot(" ;@ Copy memory to register:\n",1<<size);
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324 EaRead (9,0,ea,size);
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325 ot(" str r0,[r7,r10] ;@ Save value into Dn/An\n");
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329 ot(" ;@ Copy register to memory:\n",1<<size);
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330 ot(" ldr r1,[r7,r10] ;@ Load value from Dn/An\n");
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331 EaWrite(9,1,ea,size);
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334 if (decr==0) ot(" add r9,r9,#%d ;@ Post-increment address\n",1<<size);
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336 ot(" sub r5,r5,#%d ;@ Take some cycles\n",2<<size);
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338 ot("SkipReg%.4x%s\n",op, ms?"":":");
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339 ot(" movs r11,r11,lsr #1;@ Shift mask:\n");
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340 ot(" add r10,r10,#%d ;@ r10=Next Register\n",decr?-4:4);
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341 ot(" bne MoreReg%.4x\n",op);
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346 ot(";@ Write back address:\n");
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347 EaCalc (0,0x0007,8|(ea&7),2);
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348 EaWrite(0, 9,8|(ea&7),2);
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351 ot(" ldmia sp!,{r9} ;@ Pop r9\n");
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355 else if (ea<0x18) Cycles=16; // (a0)
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356 else if (ea<0x20) Cycles= 0; // (a0)+ ?
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357 else if (ea<0x28) Cycles= 8; //-(a0)
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358 else if (ea<0x30) Cycles=24; // ($3333,a0)
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359 else if (ea<0x38) Cycles=28; // ($33,a0,d3.w*2)
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360 else if (ea<0x39) Cycles=24; // $3333.w
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361 else if (ea<0x3a) Cycles=28; // $33333333.l
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368 // --------------------- Opcodes 0x4e60+ ---------------------
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369 // Emit a Move USP opcode, 01001110 0110dnnn move An to/from USP
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370 int OpMoveUsp(int op)
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374 dir=(op>>3)&1; // Direction
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375 use=op&~0x0007; // Use same opcode for all An
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377 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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379 OpStart(op); Cycles=4;
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381 ot(" ldrb r0,[r7,#0x44] ;@ Get SR\n");
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382 ot(" tst r0,#0x20 ;@ Check we are in supervisor mode\n");
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383 ot(" beq WrongMode%.4x ;@ No\n",op);
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388 EaCalc (0,0x0007,8,2);
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389 ot(" ldr r1,[r7,#0x48] ;@ Get from USP\n\n");
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394 EaCalc (0,0x0007,8,2);
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396 ot(" str r0,[r7,#0x48] ;@ Put in USP\n\n");
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401 ot("WrongMode%.4x%s\n",op,ms?"":":");
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402 ot(";@ todo - cause an exception\n");
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408 // --------------------- Opcodes 0x7000+ ---------------------
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409 // Emit a Move Quick opcode, 0111nnn0 dddddddd moveq #dd,Dn
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410 int OpMoveq(int op)
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414 use=op&0xf100; // Use same opcode for all values
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415 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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417 OpStart(op); Cycles=4;
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419 ot(" movs r0,r8,asl #24\n");
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420 ot(" and r1,r8,#0x0e00\n");
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421 ot(" mov r0,r0,asr #24 ;@ Sign extended Quick value\n");
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422 ot(" mrs r9,cpsr ;@ r9=NZ flags\n");
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423 ot(" str r0,[r7,r1,lsr #7] ;@ Store into Dn\n");
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431 // --------------------- Opcodes 0xc140+ ---------------------
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432 // Emit a Exchange opcode:
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433 // 1100ttt1 01000sss exg ds,dt
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434 // 1100ttt1 01001sss exg as,at
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435 // 1100ttt1 10001sss exg as,dt
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442 if (type!=0x40 && type!=0x48 && type!=0x88) return 1; // Not an exg opcode
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444 use=op&0xf1f8; // Use same opcode for all values
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445 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
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447 OpStart(op); Cycles=6;
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449 ot(" and r10,r8,#0x0e00 ;@ Find T register\n");
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450 ot(" and r11,r8,#0x000f ;@ Find S register\n");
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451 if (type==0x48) ot(" orr r10,r10,#0x1000 ;@ T is an address register\n");
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453 ot(" ldr r0,[r7,r10,lsr #7] ;@ Get T\n");
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454 ot(" ldr r1,[r7,r11,lsl #2] ;@ Get S\n");
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456 ot(" str r0,[r7,r11,lsl #2] ;@ T->S\n");
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457 ot(" str r1,[r7,r10,lsr #7] ;@ S->T\n");
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