1 /***********************************************************
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3 * This source is taken from the Gens project *
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4 * Written by Stéphane Dallongeville *
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5 * Copyright (c) 2002 by Stéphane Dallongeville *
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6 * Modified/adapted for Picodrive by notaz, 2007 *
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8 ***********************************************************/
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10 #include "../PicoInt.h"
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12 #define cdprintf dprintf
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13 //#define cdprintf(x...)
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16 #define CDC_DMA_SPEED 256
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19 static void CDD_Reset(void)
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23 memset(Pico_mcd->s68k_regs+0x34, 0, 2*2); // CDD.Fader, CDD.Control
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24 Pico_mcd->cdd.Status = 0;
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25 Pico_mcd->cdd.Minute = 0;
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26 Pico_mcd->cdd.Seconde = 0;
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27 Pico_mcd->cdd.Frame = 0;
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28 Pico_mcd->cdd.Ext = 0;
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30 // clear receive status and transfer command
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31 memset(Pico_mcd->s68k_regs+0x38, 0, 20);
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32 Pico_mcd->s68k_regs[0x38+9] = 0xF; // Default checksum
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36 static void CDC_Reset(void)
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40 memset(Pico_mcd->cdc.Buffer, 0, (16 * 1024 * 2) + 2352);
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42 CDC_Update_Header();
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44 Pico_mcd->cdc.COMIN = 0;
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45 Pico_mcd->cdc.IFSTAT = 0xFF;
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46 Pico_mcd->cdc.DAC.N = 0;
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47 Pico_mcd->cdc.DBC.N = 0;
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48 Pico_mcd->cdc.HEAD.N = 0x01000000;
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49 Pico_mcd->cdc.PT.N = 0;
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50 Pico_mcd->cdc.WA.N = 2352 * 2;
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51 Pico_mcd->cdc.STAT.N = 0x00000080;
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52 Pico_mcd->cdc.SBOUT = 0;
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53 Pico_mcd->cdc.IFCTRL = 0;
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54 Pico_mcd->cdc.CTRL.N = 0;
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56 Pico_mcd->cdc.Decode_Reg_Read = 0;
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57 Pico_mcd->scd.Status_CDC &= ~0x08;
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61 void LC89510_Reset(void)
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66 // clear DMA_Adr & Stop_Watch
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67 memset(Pico_mcd->s68k_regs + 0xA, 0, 4);
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71 void Update_CDC_TRansfer(int which)
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73 unsigned int DMA_Adr, dep, length, len;
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74 unsigned short *dest;
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77 if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))
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79 length = (Pico_mcd->cdc.DBC.N + 1) >> 1;
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80 Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer
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81 Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer
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82 Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready
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83 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress
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85 if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Trasnfer End Interrupt Enable ?
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87 Pico_mcd->cdc.IFSTAT &= ~0x40;
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89 if (Pico_mcd->s68k_regs[0x33] & (1<<5))
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91 dprintf("cdc DTE irq 5");
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92 SekInterruptS68k(5);
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96 else length = CDC_DMA_SPEED;
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99 // TODO: dst bounds checking? DAC.N alignment?
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100 src = Pico_mcd->cdc.Buffer + Pico_mcd->cdc.DAC.N;
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101 DMA_Adr = (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB];
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103 if (which == 7) // WORD RAM
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105 if (Pico_mcd->s68k_regs[3] & 4)
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107 dep = ((DMA_Adr & 0x3FFF) << 3);
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108 cdprintf("CD DMA # %04x -> word_ram1M # %06x, len=%i",
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109 Pico_mcd->cdc.DAC.N, dep, length);
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111 dep = ((DMA_Adr & 0x3FFF) << 4);
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112 if (!(Pico_mcd->s68k_regs[3]&1)) dep += 2;
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113 dest = (unsigned short *) (Pico_mcd->word_ram + dep);
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115 for (len = length; len > 0; len--, src+=2, dest+=2)
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116 *dest = (src[0]<<8) | src[1];
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119 unsigned char *b1 = Pico_mcd->word_ram + dep;
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120 unsigned char *b2 = (unsigned char *)dest - 8;
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121 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",
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122 b1[0], b1[1], b1[4], b1[5], b2[0], b2[1], b2[4], b2[5]);
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127 dep = ((DMA_Adr & 0x7FFF) << 3);
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128 cdprintf("CD DMA # %04x -> word_ram2M # %06x, len=%i",
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129 Pico_mcd->cdc.DAC.N, dep, length);
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130 dest = (unsigned short *) (Pico_mcd->word_ram + dep);
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132 for (len = length; len > 0; len--, src+=2, dest++)
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133 *dest = (src[0]<<8) | src[1];
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136 unsigned char *b1 = Pico_mcd->word_ram + dep;
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137 unsigned char *b2 = (unsigned char *)dest - 4;
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138 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",
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139 b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);
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143 else if (which == 4) // PCM RAM
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146 dest = (unsigned char *) Ram_PCM;
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147 dep = ((DMA_Adr & 0x03FF) << 2) + PCM_Chip.Bank;
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149 cdprintf("CD DMA # %04x -> PCM TODO", Pico_mcd->cdc.DAC.N);
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152 else if (which == 5) // PRG RAM
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154 dep = DMA_Adr << 3;
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155 dest = (unsigned short *) (Pico_mcd->prg_ram + dep);
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156 cdprintf("CD DMA # %04x -> prg_ram # %06x, len=%i",
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157 Pico_mcd->cdc.DAC.N, dep, length);
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159 for (len = length; len > 0; len--, src+=2, dest++)
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160 *dest = (src[0]<<8) | src[1];
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163 unsigned char *b1 = Pico_mcd->prg_ram + dep;
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164 unsigned char *b2 = (unsigned char *)dest - 4;
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165 dprintf("%02x %02x %02x %02x .. %02x %02x %02x %02x",
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166 b1[0], b1[1], b1[2], b1[3], b2[0], b2[1], b2[2], b2[3]);
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171 Pico_mcd->cdc.DAC.N = (Pico_mcd->cdc.DAC.N + length) & 0xFFFF;
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172 if (Pico_mcd->scd.Status_CDC & 0x08) Pico_mcd->cdc.DBC.N -= length;
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173 else Pico_mcd->cdc.DBC.N = 0;
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177 if (which != 4) length >>= 1;
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179 Pico_mcd->s68k_regs[0xA] = DMA_Adr >> 8;
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180 Pico_mcd->s68k_regs[0xB] = DMA_Adr;
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184 unsigned short Read_CDC_Host(int is_sub)
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188 if (!(Pico_mcd->scd.Status_CDC & 0x08))
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190 // Transfer data disabled
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191 cdprintf("Read_CDC_Host: Transfer data disabled");
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195 if ((is_sub && (Pico_mcd->s68k_regs[4] & 7) != 3) ||
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196 (!is_sub && (Pico_mcd->s68k_regs[4] & 7) != 2))
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199 cdprintf("Read_CDC_Host: Wrong setting");
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203 Pico_mcd->cdc.DBC.N -= 2;
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205 if (Pico_mcd->cdc.DBC.N <= 0)
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207 Pico_mcd->cdc.DBC.N = 0;
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208 Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer
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209 Pico_mcd->s68k_regs[4] |= 0x80; // End data transfer
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210 Pico_mcd->s68k_regs[4] &= ~0x40; // no more data ready
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211 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress
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213 if (Pico_mcd->cdc.IFCTRL & 0x40) // DTEIEN = Data Transfer End Interrupt Enable ?
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215 Pico_mcd->cdc.IFSTAT &= ~0x40;
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217 if (Pico_mcd->s68k_regs[0x33]&(1<<5)) {
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218 dprintf("m68k: s68k irq 5");
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219 SekInterruptS68k(5);
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222 cdprintf("CDC - DTE interrupt");
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226 addr = Pico_mcd->cdc.DAC.N;
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227 Pico_mcd->cdc.DAC.N += 2;
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229 cdprintf("Read_CDC_Host sub=%i d=%04x dac=%04x dbc=%04x", is_sub,
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230 (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1], Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N);
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232 return (Pico_mcd->cdc.Buffer[addr]<<8) | Pico_mcd->cdc.Buffer[addr+1];
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237 mov esi, Pico_mcd->cdc.DAC.N
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238 lea ebx, Pico_mcd->cdc.Buffer
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240 mov ax, [ebx + esi]
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243 mov Pico_mcd->cdc.DAC.N, esi
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250 void CDC_Update_Header(void)
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252 if (Pico_mcd->cdc.CTRL.B.B1 & 0x01) // Sub-Header wanted ?
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254 Pico_mcd->cdc.HEAD.B.B0 = 0;
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255 Pico_mcd->cdc.HEAD.B.B1 = 0;
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256 Pico_mcd->cdc.HEAD.B.B2 = 0;
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257 Pico_mcd->cdc.HEAD.B.B3 = 0;
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263 LBA_to_MSF(Pico_mcd->scd.Cur_LBA, &MSF);
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265 Pico_mcd->cdc.HEAD.B.B0 = INT_TO_BCDB(MSF.M);
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266 Pico_mcd->cdc.HEAD.B.B1 = INT_TO_BCDB(MSF.S);
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267 Pico_mcd->cdc.HEAD.B.B2 = INT_TO_BCDB(MSF.F);
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268 Pico_mcd->cdc.HEAD.B.B3 = 0x01;
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273 unsigned char CDC_Read_Reg(void)
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277 switch(Pico_mcd->s68k_regs[5] & 0xF)
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280 cdprintf("CDC read reg 00 = %.2X", Pico_mcd->cdc.COMIN);
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282 Pico_mcd->s68k_regs[5] = 0x1;
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283 return Pico_mcd->cdc.COMIN;
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285 case 0x1: // IFSTAT
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286 cdprintf("CDC read reg 01 = %.2X", Pico_mcd->cdc.IFSTAT);
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288 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 1); // Reg 1 (decoding)
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289 Pico_mcd->s68k_regs[5] = 0x2;
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290 return Pico_mcd->cdc.IFSTAT;
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293 cdprintf("CDC read reg 02 = %.2X", Pico_mcd->cdc.DBC.B.L);
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295 Pico_mcd->s68k_regs[5] = 0x3;
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296 return Pico_mcd->cdc.DBC.B.L;
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299 cdprintf("CDC read reg 03 = %.2X", Pico_mcd->cdc.DBC.B.H);
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301 Pico_mcd->s68k_regs[5] = 0x4;
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302 return Pico_mcd->cdc.DBC.B.H;
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305 cdprintf("CDC read reg 04 = %.2X", Pico_mcd->cdc.HEAD.B.B0);
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307 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 4); // Reg 4 (decoding)
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308 Pico_mcd->s68k_regs[5] = 0x5;
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309 return Pico_mcd->cdc.HEAD.B.B0;
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312 cdprintf("CDC read reg 05 = %.2X", Pico_mcd->cdc.HEAD.B.B1);
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314 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 5); // Reg 5 (decoding)
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315 Pico_mcd->s68k_regs[5] = 0x6;
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316 return Pico_mcd->cdc.HEAD.B.B1;
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319 cdprintf("CDC read reg 06 = %.2X", Pico_mcd->cdc.HEAD.B.B2);
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321 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 6); // Reg 6 (decoding)
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322 Pico_mcd->s68k_regs[5] = 0x7;
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323 return Pico_mcd->cdc.HEAD.B.B2;
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326 cdprintf("CDC read reg 07 = %.2X", Pico_mcd->cdc.HEAD.B.B3);
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328 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 7); // Reg 7 (decoding)
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329 Pico_mcd->s68k_regs[5] = 0x8;
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330 return Pico_mcd->cdc.HEAD.B.B3;
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333 cdprintf("CDC read reg 08 = %.2X", Pico_mcd->cdc.PT.B.L);
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335 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 8); // Reg 8 (decoding)
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336 Pico_mcd->s68k_regs[5] = 0x9;
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337 return Pico_mcd->cdc.PT.B.L;
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340 cdprintf("CDC read reg 09 = %.2X", Pico_mcd->cdc.PT.B.H);
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342 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 9); // Reg 9 (decoding)
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343 Pico_mcd->s68k_regs[5] = 0xA;
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344 return Pico_mcd->cdc.PT.B.H;
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347 cdprintf("CDC read reg 10 = %.2X", Pico_mcd->cdc.WA.B.L);
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349 Pico_mcd->s68k_regs[5] = 0xB;
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350 return Pico_mcd->cdc.WA.B.L;
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353 cdprintf("CDC read reg 11 = %.2X", Pico_mcd->cdc.WA.B.H);
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355 Pico_mcd->s68k_regs[5] = 0xC;
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356 return Pico_mcd->cdc.WA.B.H;
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359 cdprintf("CDC read reg 12 = %.2X", Pico_mcd->cdc.STAT.B.B0);
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361 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 12); // Reg 12 (decoding)
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362 Pico_mcd->s68k_regs[5] = 0xD;
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363 return Pico_mcd->cdc.STAT.B.B0;
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366 cdprintf("CDC read reg 13 = %.2X", Pico_mcd->cdc.STAT.B.B1);
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368 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 13); // Reg 13 (decoding)
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369 Pico_mcd->s68k_regs[5] = 0xE;
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370 return Pico_mcd->cdc.STAT.B.B1;
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373 cdprintf("CDC read reg 14 = %.2X", Pico_mcd->cdc.STAT.B.B2);
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375 Pico_mcd->cdc.Decode_Reg_Read |= (1 << 14); // Reg 14 (decoding)
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376 Pico_mcd->s68k_regs[5] = 0xF;
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377 return Pico_mcd->cdc.STAT.B.B2;
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380 cdprintf("CDC read reg 15 = %.2X", Pico_mcd->cdc.STAT.B.B3);
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382 ret = Pico_mcd->cdc.STAT.B.B3;
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383 Pico_mcd->cdc.IFSTAT |= 0x20; // decoding interrupt flag cleared
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384 if ((Pico_mcd->cdc.CTRL.B.B0 & 0x80) && (Pico_mcd->cdc.IFCTRL & 0x20))
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386 if ((Pico_mcd->cdc.Decode_Reg_Read & 0x73F2) == 0x73F2)
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387 Pico_mcd->cdc.STAT.B.B3 = 0x80;
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396 void CDC_Write_Reg(unsigned char Data)
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398 cdprintf("CDC write reg%02d = %.2X", Pico_mcd->s68k_regs[5] & 0xF, Data);
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400 switch (Pico_mcd->s68k_regs[5] & 0xF)
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403 Pico_mcd->s68k_regs[5] = 0x1;
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404 Pico_mcd->cdc.SBOUT = Data;
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408 case 0x1: // IFCTRL
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409 Pico_mcd->s68k_regs[5] = 0x2;
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410 Pico_mcd->cdc.IFCTRL = Data;
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412 if ((Pico_mcd->cdc.IFCTRL & 0x02) == 0) // Stop data transfer
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414 Pico_mcd->cdc.DBC.N = 0;
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415 Pico_mcd->scd.Status_CDC &= ~0x08;
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416 Pico_mcd->cdc.IFSTAT |= 0x08; // No more data transfer in progress
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421 Pico_mcd->s68k_regs[5] = 0x3;
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422 Pico_mcd->cdc.DBC.B.L = Data;
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427 Pico_mcd->s68k_regs[5] = 0x4;
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428 Pico_mcd->cdc.DBC.B.H = Data;
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433 Pico_mcd->s68k_regs[5] = 0x5;
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434 Pico_mcd->cdc.DAC.B.L = Data;
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439 Pico_mcd->s68k_regs[5] = 0x6;
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440 Pico_mcd->cdc.DAC.B.H = Data;
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445 if (Pico_mcd->cdc.IFCTRL & 0x02) // Data transfer enable ?
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447 Pico_mcd->cdc.IFSTAT &= ~0x08; // Data transfer in progress
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448 Pico_mcd->scd.Status_CDC |= 0x08; // Data transfer in progress
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449 Pico_mcd->s68k_regs[4] &= 0x7F; // A data transfer start
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451 cdprintf("************** Starting Data Transfer ***********");
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452 cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,
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453 Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]);
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458 Pico_mcd->cdc.IFSTAT |= 0x40; // end data transfer interrupt flag cleared
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462 Pico_mcd->s68k_regs[5] = 0x9;
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463 Pico_mcd->cdc.WA.B.L = Data;
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468 Pico_mcd->s68k_regs[5] = 0xA;
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469 Pico_mcd->cdc.WA.B.H = Data;
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474 Pico_mcd->s68k_regs[5] = 0xB;
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475 Pico_mcd->cdc.CTRL.B.B0 = Data;
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480 Pico_mcd->s68k_regs[5] = 0xC;
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481 Pico_mcd->cdc.CTRL.B.B1 = Data;
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486 Pico_mcd->s68k_regs[5] = 0xD;
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487 Pico_mcd->cdc.PT.B.L = Data;
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492 Pico_mcd->s68k_regs[5] = 0xE;
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493 Pico_mcd->cdc.PT.B.H = Data;
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498 Pico_mcd->cdc.CTRL.B.B2 = Data;
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508 static int bswapwrite(int a, unsigned short d)
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510 *(unsigned short *)(Pico_mcd->s68k_regs + a) = (d>>8)|(d<<8);
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511 return d + (d >> 8);
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514 void CDD_Export_Status(void)
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518 csum = bswapwrite( 0x38+0, Pico_mcd->cdd.Status);
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519 csum += bswapwrite( 0x38+2, Pico_mcd->cdd.Minute);
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520 csum += bswapwrite( 0x38+4, Pico_mcd->cdd.Seconde);
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521 csum += bswapwrite( 0x38+6, Pico_mcd->cdd.Frame);
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522 Pico_mcd->s68k_regs[0x38+8] = Pico_mcd->cdd.Ext;
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523 csum += Pico_mcd->cdd.Ext;
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524 Pico_mcd->s68k_regs[0x38+9] = ~csum & 0xf;
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526 Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control
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528 if (Pico_mcd->s68k_regs[0x33] & (1<<4))
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530 dprintf("cdd export irq 4");
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531 SekInterruptS68k(4);
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534 // cdprintf("CDD exported status\n");
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535 cdprintf("out: Status=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",
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536 (Pico_mcd->s68k_regs[0x38+0] << 8) | Pico_mcd->s68k_regs[0x38+1],
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537 (Pico_mcd->s68k_regs[0x38+2] << 8) | Pico_mcd->s68k_regs[0x38+3],
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538 (Pico_mcd->s68k_regs[0x38+4] << 8) | Pico_mcd->s68k_regs[0x38+5],
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539 (Pico_mcd->s68k_regs[0x38+6] << 8) | Pico_mcd->s68k_regs[0x38+7],
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540 (Pico_mcd->s68k_regs[0x38+8] << 8) | Pico_mcd->s68k_regs[0x38+9]);
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544 void CDD_Import_Command(void)
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546 // cdprintf("CDD importing command\n");
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547 cdprintf("in: Command=%.4X, Minute=%.4X, Second=%.4X, Frame=%.4X Checksum=%.4X",
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548 (Pico_mcd->s68k_regs[0x38+10+0] << 8) | Pico_mcd->s68k_regs[0x38+10+1],
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549 (Pico_mcd->s68k_regs[0x38+10+2] << 8) | Pico_mcd->s68k_regs[0x38+10+3],
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550 (Pico_mcd->s68k_regs[0x38+10+4] << 8) | Pico_mcd->s68k_regs[0x38+10+5],
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551 (Pico_mcd->s68k_regs[0x38+10+6] << 8) | Pico_mcd->s68k_regs[0x38+10+7],
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552 (Pico_mcd->s68k_regs[0x38+10+8] << 8) | Pico_mcd->s68k_regs[0x38+10+9]);
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554 switch (Pico_mcd->s68k_regs[0x38+10+0])
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556 case 0x0: // STATUS (?)
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557 Get_Status_CDD_c0();
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560 case 0x1: // STOP ALL (?)
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564 case 0x2: // GET TOC INFORMATIONS
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565 switch(Pico_mcd->s68k_regs[0x38+10+3])
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567 case 0x0: // get current position (MSF format)
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568 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00);
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572 case 0x1: // get elapsed time of current track played/scanned (relative MSF format)
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573 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 1;
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574 Get_Track_Pos_CDD_c21();
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577 case 0x2: // get current track in RS2-RS3
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578 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 2;
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579 Get_Current_Track_CDD_c22();
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582 case 0x3: // get total length (MSF format)
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583 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 3;
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584 Get_Total_Lenght_CDD_c23();
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587 case 0x4: // first & last track number
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588 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 4;
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589 Get_First_Last_Track_CDD_c24();
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592 case 0x5: // get track addresse (MSF format)
\r
593 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 5;
\r
594 Get_Track_Adr_CDD_c25();
\r
597 default : // invalid, then we return status
\r
598 Pico_mcd->cdd.Status = (Pico_mcd->cdd.Status & 0xFF00) | 0xF;
\r
599 Get_Status_CDD_c0();
\r
612 case 0x6: // PAUSE/STOP
\r
616 case 0x7: // RESUME
\r
620 case 0x8: // FAST FOWARD
\r
621 Fast_Foward_CDD_c8();
\r
624 case 0x9: // FAST REWIND
\r
625 Fast_Rewind_CDD_c9();
\r
628 case 0xA: // RECOVER INITIAL STATE (?)
\r
632 case 0xC: // CLOSE TRAY
\r
633 Close_Tray_CDD_cC();
\r
636 case 0xD: // OPEN TRAY
\r
637 Open_Tray_CDD_cD();
\r
640 default: // UNKNOWN
\r