1 // Memory I/O handlers for Sega/Mega CD.
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2 // Loosely based on Gens code.
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3 // (c) Copyright 2007, Grazvydas "notaz" Ignotas
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5 // A68K no longer supported here
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9 #include "../PicoInt.h"
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11 #include "../sound/ym2612.h"
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12 #include "../sound/sn76496.h"
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17 #ifndef UTYPES_DEFINED
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18 typedef unsigned char u8;
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19 typedef unsigned short u16;
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20 typedef unsigned int u32;
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21 #define UTYPES_DEFINED
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24 //#define __debug_io
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25 //#define __debug_io2
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27 #define rdprintf dprintf
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28 //#define rdprintf(...)
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29 //#define wrdprintf dprintf
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30 #define wrdprintf(...)
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31 #define plprintf dprintf
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32 //#define plprintf(...)
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34 // -----------------------------------------------------------------
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37 //#undef USE_POLL_DETECT
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38 #define POLL_LIMIT 16
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39 #define POLL_CYCLES 124
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40 // int m68k_poll_addr, m68k_poll_cnt;
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41 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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43 #ifndef _ASM_CD_MEMORY_C
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44 static u32 m68k_reg_read16(u32 a)
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48 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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52 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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55 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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56 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)
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57 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }
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58 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);
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61 d = Pico_mcd->s68k_regs[4]<<8;
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64 d = *(u16 *)(Pico_mcd->bios + 0x72);
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67 d = Read_CDC_Host(0);
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70 dprintf("m68k FIXME: reserved read");
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73 d = Pico_mcd->m.timer_stopwatch >> 16;
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74 dprintf("m68k stopwatch timer read (%04x)", d);
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79 // comm flag/cmd/status (0xE-0x2F)
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80 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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84 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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88 // dprintf("ret = %04x", d);
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93 #ifndef _ASM_CD_MEMORY_C
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96 void m68k_reg_write8(u32 a, u32 d)
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99 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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104 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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108 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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109 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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110 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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111 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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112 SekResetS68k(); // S68k comes out of RESET or BRQ state
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113 Pico_mcd->m.state_flags&=~1;
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114 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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116 Pico_mcd->m.busreq = d;
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119 dprintf("m68k: prg wp=%02x", d);
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120 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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123 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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124 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);
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126 if ((dold>>6) != ((d>>6)&3))
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127 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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128 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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129 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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130 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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132 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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134 //dold &= ~2; // ??
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136 if ((d & 2) && !(dold & 2)) {
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137 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)
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141 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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144 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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145 #ifdef USE_POLL_DETECT
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146 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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147 SekSetStopS68k(0); s68k_poll_adclk = 0;
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148 plprintf("s68k poll release, a=%02x\n", a);
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154 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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157 Pico_mcd->bios[0x72] = d;
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158 dprintf("hint vector set to %08x", PicoRead32(0x70));
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161 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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163 //dprintf("m68k: comm flag: %02x", d);
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164 Pico_mcd->s68k_regs[0xe] = d;
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165 #ifdef USE_POLL_DETECT
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166 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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167 SekSetStopS68k(0); s68k_poll_adclk = 0;
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168 plprintf("s68k poll release, a=%02x\n", a);
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174 if ((a&0xf0) == 0x10) {
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175 Pico_mcd->s68k_regs[a] = d;
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176 #ifdef USE_POLL_DETECT
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177 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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178 SekSetStopS68k(0); s68k_poll_adclk = 0;
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179 plprintf("s68k poll release, a=%02x\n", a);
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185 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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188 #ifndef _ASM_CD_MEMORY_C
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191 u32 s68k_poll_detect(u32 a, u32 d)
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193 #ifdef USE_POLL_DETECT
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194 // polling detection
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195 if (a == (s68k_poll_adclk&0xff)) {
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196 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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197 if (clkdiff <= POLL_CYCLES) {
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199 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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200 if (s68k_poll_cnt > POLL_LIMIT) {
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202 plprintf("s68k poll detected @ %06x, a=%02x\n", SekPcS68k, a);
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204 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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208 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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214 #define READ_FONT_DATA(basemask) \
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216 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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217 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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218 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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219 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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220 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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221 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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225 #ifndef _ASM_CD_MEMORY_C
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228 u32 s68k_reg_read16(u32 a)
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232 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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236 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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238 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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239 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);
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240 return s68k_poll_detect(a, d);
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242 return CDC_Read_Reg();
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244 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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246 d = Pico_mcd->m.timer_stopwatch >> 16;
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247 dprintf("s68k stopwatch timer read (%04x)", d);
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250 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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251 return Pico_mcd->s68k_regs[31];
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252 case 0x34: // fader
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253 return 0; // no busy bit
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254 case 0x50: // font data (check: Lunar 2, Silpheed)
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255 READ_FONT_DATA(0x00100000);
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258 READ_FONT_DATA(0x00010000);
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261 READ_FONT_DATA(0x10000000);
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264 READ_FONT_DATA(0x01000000);
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268 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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270 if (a >= 0x0e && a < 0x30)
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271 return s68k_poll_detect(a, d);
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276 #ifndef _ASM_CD_MEMORY_C
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279 void s68k_reg_write8(u32 a, u32 d)
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281 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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283 // TODO: review against Gens
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284 // Warning: d might have upper bits set
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287 return; // only m68k can change WP
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289 int dold = Pico_mcd->s68k_regs[3];
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290 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);
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294 if ((d ^ dold) & 5) {
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295 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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298 #ifdef _ASM_CD_MEMORY_C
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299 if ((d ^ dold) & 0x1d)
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300 PicoMemResetCDdecode(d);
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303 dprintf("wram mode 2M->1M");
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304 wram_2M_to_1M(Pico_mcd->word_ram2M);
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308 dprintf("wram mode 1M->2M");
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309 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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311 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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313 wram_1M_to_2M(Pico_mcd->word_ram2M);
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318 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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323 dprintf("s68k CDC dest: %x", d&7);
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324 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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327 //dprintf("s68k CDC reg addr: %x", d&0xf);
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333 dprintf("s68k set CDC dma addr");
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337 dprintf("s68k set stopwatch timer");
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338 Pico_mcd->m.timer_stopwatch = 0;
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341 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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344 dprintf("s68k set int3 timer: %02x", d);
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345 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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347 case 0x33: // IRQ mask
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348 dprintf("s68k irq mask: %02x", d);
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349 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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350 CDD_Export_Status();
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353 case 0x34: // fader
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354 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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357 return; // d/m bit is unsetable
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359 u32 d_old = Pico_mcd->s68k_regs[0x37];
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360 Pico_mcd->s68k_regs[0x37] = d&7;
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361 if ((d&4) && !(d_old&4)) {
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362 CDD_Export_Status();
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367 Pico_mcd->s68k_regs[a] = (u8) d;
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368 CDD_Import_Command();
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372 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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374 dprintf("s68k FIXME: invalid write @ %02x?", a);
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378 Pico_mcd->s68k_regs[a] = (u8) d;
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382 #ifndef _ASM_CD_MEMORY_C
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383 static u32 OtherRead16End(u32 a, int realsize)
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387 if ((a&0xffffc0)==0xa12000) {
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388 d=m68k_reg_read16(a);
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392 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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399 static void OtherWrite8End(u32 a, u32 d, int realsize)
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401 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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403 dprintf("m68k FIXME: strange w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);
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406 #define _CD_MEMORY_C
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407 #undef _ASM_MEMORY_C
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408 #include "../MemoryCmn.c"
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409 #include "cell_map.c"
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410 #endif // !def _ASM_CD_MEMORY_C
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413 // -----------------------------------------------------------------
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414 // Read Rom and read Ram
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416 //u8 PicoReadM68k8_(u32 a);
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417 #ifdef _ASM_CD_MEMORY_C
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418 u32 PicoReadM68k8(u32 a);
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420 static u32 PicoReadM68k8(u32 a)
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424 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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428 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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431 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
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432 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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433 d = *(prg_bank+((a^1)&0x1ffff));
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438 if ((a&0xfc0000)==0x200000) {
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439 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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440 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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441 int bank = Pico_mcd->s68k_regs[3]&1;
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443 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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445 d = Pico_mcd->word_ram1M[bank][a^1];
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447 // allow access in any mode, like Gens does
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448 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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450 wrdprintf("ret = %02x", (u8)d);
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454 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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456 if ((a&0xffffc0)==0xa12000)
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457 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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459 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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461 if ((a&0xffffc0)==0xa12000)
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462 rdprintf("ret = %02x", (u8)d);
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467 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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474 #ifdef _ASM_CD_MEMORY_C
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475 u32 PicoReadM68k16(u32 a);
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477 static u32 PicoReadM68k16(u32 a)
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481 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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485 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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488 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
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489 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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490 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);
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491 d = *(u16 *)(prg_bank+(a&0x1fffe));
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492 wrdprintf("ret = %04x", d);
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497 if ((a&0xfc0000)==0x200000) {
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498 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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499 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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500 int bank = Pico_mcd->s68k_regs[3]&1;
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502 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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504 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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506 // allow access in any mode, like Gens does
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507 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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509 wrdprintf("ret = %04x", d);
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513 if ((a&0xffffc0)==0xa12000)
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514 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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516 d = OtherRead16(a, 16);
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518 if ((a&0xffffc0)==0xa12000)
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519 rdprintf("ret = %04x", d);
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524 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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531 #ifdef _ASM_CD_MEMORY_C
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532 u32 PicoReadM68k32(u32 a);
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534 static u32 PicoReadM68k32(u32 a)
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538 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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542 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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545 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
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546 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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547 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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548 d = (pm[0]<<16)|pm[1];
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553 if ((a&0xfc0000)==0x200000) {
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554 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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555 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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556 int bank = Pico_mcd->s68k_regs[3]&1;
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557 if (a >= 0x220000) { // cell arranged
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559 a1 = (a&2) | (cell_map(a >> 2) << 2);
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560 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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562 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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563 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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565 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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568 // allow access in any mode, like Gens does
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569 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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571 wrdprintf("ret = %08x", d);
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575 if ((a&0xffffc0)==0xa12000)
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576 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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578 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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580 if ((a&0xffffc0)==0xa12000)
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581 rdprintf("ret = %08x", d);
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585 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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592 // -----------------------------------------------------------------
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594 #ifdef _ASM_CD_MEMORY_C
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595 void PicoWriteM68k8(u32 a,u8 d);
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597 static void PicoWriteM68k8(u32 a,u8 d)
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600 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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602 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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603 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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606 if ((a&0xe00000)==0xe00000) { // Ram
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607 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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614 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
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615 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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616 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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621 if ((a&0xfc0000)==0x200000) {
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622 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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623 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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624 int bank = Pico_mcd->s68k_regs[3]&1;
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626 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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628 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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630 // allow access in any mode, like Gens does
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631 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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636 if ((a&0xffffc0)==0xa12000) {
\r
637 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
638 m68k_reg_write8(a, d);
\r
647 #ifdef _ASM_CD_MEMORY_C
\r
648 void PicoWriteM68k16(u32 a,u16 d);
\r
650 static void PicoWriteM68k16(u32 a,u16 d)
\r
653 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
655 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
657 if ((a&0xe00000)==0xe00000) { // Ram
\r
658 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
665 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
666 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
667 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);
\r
668 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
673 if ((a&0xfc0000)==0x200000) {
\r
674 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
675 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
676 int bank = Pico_mcd->s68k_regs[3]&1;
\r
678 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
680 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
682 // allow access in any mode, like Gens does
\r
683 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
689 if ((a&0xffffc0)==0xa12000) {
\r
690 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
691 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
692 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
693 #ifdef USE_POLL_DETECT
\r
694 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
695 SekSetStopS68k(0); s68k_poll_adclk = 0;
\r
696 plprintf("s68k poll release, a=%02x\n", a);
\r
701 m68k_reg_write8(a, d>>8);
\r
702 m68k_reg_write8(a+1,d&0xff);
\r
711 #ifdef _ASM_CD_MEMORY_C
\r
712 void PicoWriteM68k32(u32 a,u32 d);
\r
714 static void PicoWriteM68k32(u32 a,u32 d)
\r
717 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
720 if ((a&0xe00000)==0xe00000)
\r
723 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
724 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
731 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&3)!=1) {
\r
732 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
733 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
734 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
739 if ((a&0xfc0000)==0x200000) {
\r
740 if (d != 0) // don't log clears
\r
741 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
742 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
743 int bank = Pico_mcd->s68k_regs[3]&1;
\r
744 if (a >= 0x220000) { // cell arranged
\r
746 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
747 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
749 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
750 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
752 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
753 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
756 // allow access in any mode, like Gens does
\r
757 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
758 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
763 if ((a&0xffffc0)==0xa12000) {
\r
764 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
765 if ((a&0x3e) == 0xe) dprintf("m68k FIXME: w32 [%02x]", a&0x3f);
\r
768 OtherWrite16(a, (u16)(d>>16));
\r
769 OtherWrite16(a+2,(u16)d);
\r
774 // -----------------------------------------------------------------
\r
776 // -----------------------------------------------------------------
\r
778 #ifdef _ASM_CD_MEMORY_C
\r
779 u32 PicoReadS68k8(u32 a);
\r
781 static u32 PicoReadS68k8(u32 a)
\r
789 d = *(Pico_mcd->prg_ram+(a^1));
\r
794 if ((a&0xfffe00) == 0xff8000) {
\r
796 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
797 if (a >= 0x0e && a < 0x30) {
\r
798 d = Pico_mcd->s68k_regs[a];
\r
799 s68k_poll_detect(a, d);
\r
800 rdprintf("ret = %02x", (u8)d);
\r
803 else if (a >= 0x58 && a < 0x68)
\r
804 d = gfx_cd_read(a&~1);
\r
805 else d = s68k_reg_read16(a&~1);
\r
806 if ((a&1)==0) d>>=8;
\r
807 rdprintf("ret = %02x", (u8)d);
\r
811 // word RAM (2M area)
\r
812 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
813 // test: batman returns
\r
814 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
815 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
816 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
817 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
818 if (a&1) d &= 0x0f;
\r
820 dprintf("FIXME: decode");
\r
822 // allow access in any mode, like Gens does
\r
823 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
825 wrdprintf("ret = %02x", (u8)d);
\r
829 // word RAM (1M area)
\r
830 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
832 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
833 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
834 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
835 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
836 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
837 wrdprintf("ret = %02x", (u8)d);
\r
842 if ((a&0xff8000)==0xff0000) {
\r
843 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
846 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
847 else if (a >= 0x20) {
\r
849 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
850 if (a & 2) d >>= 8;
\r
852 dprintf("ret = %02x", (u8)d);
\r
857 if ((a&0xff0000)==0xfe0000) {
\r
858 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
862 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
867 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
874 #ifdef _ASM_CD_MEMORY_C
\r
875 u32 PicoReadS68k16(u32 a);
\r
877 static u32 PicoReadS68k16(u32 a)
\r
885 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);
\r
886 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
887 wrdprintf("ret = %04x", d);
\r
892 if ((a&0xfffe00) == 0xff8000) {
\r
894 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
895 if (a >= 0x58 && a < 0x68)
\r
896 d = gfx_cd_read(a);
\r
897 else d = s68k_reg_read16(a);
\r
898 rdprintf("ret = %04x", d);
\r
902 // word RAM (2M area)
\r
903 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
904 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
905 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
906 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
907 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
908 d |= d << 4; d &= ~0xf0;
\r
909 dprintf("FIXME: decode");
\r
911 // allow access in any mode, like Gens does
\r
912 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
914 wrdprintf("ret = %04x", d);
\r
918 // word RAM (1M area)
\r
919 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
921 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
922 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
923 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
924 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
925 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
926 wrdprintf("ret = %04x", d);
\r
931 if ((a&0xff0000)==0xfe0000) {
\r
932 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
934 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
935 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
936 dprintf("ret = %04x", d);
\r
941 if ((a&0xff8000)==0xff0000) {
\r
942 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
945 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
946 else if (a >= 0x20) {
\r
948 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
949 if (a & 2) d >>= 8;
\r
951 dprintf("ret = %04x", d);
\r
955 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
960 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
967 #ifdef _ASM_CD_MEMORY_C
\r
968 u32 PicoReadS68k32(u32 a);
\r
970 static u32 PicoReadS68k32(u32 a)
\r
978 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
979 d = (pm[0]<<16)|pm[1];
\r
984 if ((a&0xfffe00) == 0xff8000) {
\r
986 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
987 if (a >= 0x58 && a < 0x68)
\r
988 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
989 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
990 rdprintf("ret = %08x", d);
\r
994 // word RAM (2M area)
\r
995 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
996 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
997 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
998 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1000 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
1001 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
1002 d |= d << 4; d &= 0x0f0f0f0f;
\r
1004 // allow access in any mode, like Gens does
\r
1005 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
1007 wrdprintf("ret = %08x", d);
\r
1011 // word RAM (1M area)
\r
1012 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1014 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
1015 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1016 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1017 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1018 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
1019 wrdprintf("ret = %08x", d);
\r
1024 if ((a&0xff8000)==0xff0000) {
\r
1025 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1027 if (a >= 0x2000) {
\r
1029 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1030 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1031 } else if (a >= 0x20) {
\r
1035 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1036 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1038 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1039 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1042 dprintf("ret = %08x", d);
\r
1047 if ((a&0xff0000)==0xfe0000) {
\r
1048 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1049 a = (a>>1)&0x1fff;
\r
1050 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1051 d|= Pico_mcd->bram[a++] << 24;
\r
1052 d|= Pico_mcd->bram[a++];
\r
1053 d|= Pico_mcd->bram[a++] << 8;
\r
1054 dprintf("ret = %08x", d);
\r
1058 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1062 #ifdef __debug_io2
\r
1063 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1070 #ifndef _ASM_CD_MEMORY_C
\r
1071 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1072 static void decode_write8(u32 a, u8 d, int r3)
\r
1074 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1075 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1079 if (!(a&1)) d <<= 4;
\r
1082 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1083 } else if (r3 > 8) {
\r
1084 if (d) goto do_it;
\r
1091 *pd = d | (*pd & oldmask);
\r
1095 static void decode_write16(u32 a, u16 d, int r3)
\r
1097 u8 *pd = Pico_mcd->word_ram1M[(r3 & 1)^1] + (((a>>1)^1)&0x1ffff);
\r
1099 //if ((a & 0x3ffff) < 0x28000) return;
\r
1107 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1108 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1110 } else if (r3 > 8) {
\r
1112 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1113 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1121 // -----------------------------------------------------------------
\r
1123 #ifdef _ASM_CD_MEMORY_C
\r
1124 void PicoWriteS68k8(u32 a,u8 d);
\r
1126 static void PicoWriteS68k8(u32 a,u8 d)
\r
1128 #ifdef __debug_io2
\r
1129 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1135 if (a < 0x80000) {
\r
1136 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1137 if (a >= (Pico_mcd->s68k_regs[2]<<8)) *pm=d;
\r
1142 if ((a&0xfffe00) == 0xff8000) {
\r
1144 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1145 if (a >= 0x58 && a < 0x68)
\r
1146 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1147 else s68k_reg_write8(a,d);
\r
1151 // word RAM (2M area)
\r
1152 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1153 int r3 = Pico_mcd->s68k_regs[3];
\r
1154 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1155 if (r3 & 4) { // 1M decode mode?
\r
1156 decode_write8(a, d, r3);
\r
1158 // allow access in any mode, like Gens does
\r
1159 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1164 // word RAM (1M area)
\r
1165 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1166 // Wing Commander tries to write here in wrong mode
\r
1169 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1170 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1171 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1172 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1173 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1178 if ((a&0xff8000)==0xff0000) {
\r
1181 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1182 else if (a < 0x12)
\r
1183 pcm_write(a>>1, d);
\r
1188 if ((a&0xff0000)==0xfe0000) {
\r
1189 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1194 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1199 #ifdef _ASM_CD_MEMORY_C
\r
1200 void PicoWriteS68k16(u32 a,u16 d);
\r
1202 static void PicoWriteS68k16(u32 a,u16 d)
\r
1204 #ifdef __debug_io2
\r
1205 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1211 if (a < 0x80000) {
\r
1212 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1213 if (a >= (Pico_mcd->s68k_regs[2]<<8)) // needed for Dungeon Explorer
\r
1214 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1219 if ((a&0xfffe00) == 0xff8000) {
\r
1221 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1222 if (a >= 0x58 && a < 0x68)
\r
1223 gfx_cd_write16(a, d);
\r
1225 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1226 Pico_mcd->s68k_regs[0xf] = d;
\r
1229 s68k_reg_write8(a, d>>8);
\r
1230 s68k_reg_write8(a+1,d&0xff);
\r
1235 // word RAM (2M area)
\r
1236 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1237 int r3 = Pico_mcd->s68k_regs[3];
\r
1238 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1239 if (r3 & 4) { // 1M decode mode?
\r
1240 decode_write16(a, d, r3);
\r
1242 // allow access in any mode, like Gens does
\r
1243 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1248 // word RAM (1M area)
\r
1249 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1252 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1253 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1254 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1255 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1256 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1261 if ((a&0xff8000)==0xff0000) {
\r
1264 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1265 else if (a < 0x12)
\r
1266 pcm_write(a>>1, d & 0xff);
\r
1271 if ((a&0xff0000)==0xfe0000) {
\r
1272 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1273 a = (a>>1)&0x1fff;
\r
1274 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1275 Pico_mcd->bram[a++] = d >> 8;
\r
1280 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1285 #ifdef _ASM_CD_MEMORY_C
\r
1286 void PicoWriteS68k32(u32 a,u32 d);
\r
1288 static void PicoWriteS68k32(u32 a,u32 d)
\r
1290 #ifdef __debug_io2
\r
1291 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1297 if (a < 0x80000) {
\r
1298 if (a >= (Pico_mcd->s68k_regs[2]<<8)) {
\r
1299 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1300 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1306 if ((a&0xfffe00) == 0xff8000) {
\r
1308 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1309 if (a >= 0x58 && a < 0x68) {
\r
1310 gfx_cd_write16(a, d>>16);
\r
1311 gfx_cd_write16(a+2, d&0xffff);
\r
1313 if ((a&0x1fe) == 0xe) dprintf("s68k FIXME: w32 [%02x]", a&0x3f);
\r
1314 s68k_reg_write8(a, d>>24);
\r
1315 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1316 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1317 s68k_reg_write8(a+3, d &0xff);
\r
1322 // word RAM (2M area)
\r
1323 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1324 int r3 = Pico_mcd->s68k_regs[3];
\r
1325 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1326 if (r3 & 4) { // 1M decode mode?
\r
1327 decode_write16(a , d >> 16, r3);
\r
1328 decode_write16(a+2, d , r3);
\r
1330 // allow access in any mode, like Gens does
\r
1331 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1332 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1337 // word RAM (1M area)
\r
1338 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1342 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1343 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1344 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1345 bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1346 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1347 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1352 if ((a&0xff8000)==0xff0000) {
\r
1354 if (a >= 0x2000) {
\r
1356 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1357 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1358 } else if (a < 0x12) {
\r
1360 pcm_write(a, (d>>16) & 0xff);
\r
1361 pcm_write(a+1, d & 0xff);
\r
1367 if ((a&0xff0000)==0xfe0000) {
\r
1368 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1369 a = (a>>1)&0x1fff;
\r
1370 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1371 Pico_mcd->bram[a++] = d >> 24;
\r
1372 Pico_mcd->bram[a++] = d;
\r
1373 Pico_mcd->bram[a++] = d >> 8;
\r
1378 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1383 // -----------------------------------------------------------------
\r
1387 static __inline int PicoMemBaseM68k(u32 pc)
\r
1389 if ((pc&0xe00000)==0xe00000)
\r
1390 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1393 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1395 if ((pc&0xfc0000)==0x200000)
\r
1397 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1398 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1399 if (pc < 0x220000) {
\r
1400 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1401 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1405 // Error - Program Counter is invalid
\r
1406 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1408 return (int)Pico_mcd->bios;
\r
1412 static u32 PicoCheckPcM68k(u32 pc)
\r
1414 pc-=PicoCpuCM68k.membase; // Get real pc
\r
1417 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);
\r
1419 return PicoCpuCM68k.membase+pc;
\r
1423 static __inline int PicoMemBaseS68k(u32 pc)
\r
1425 if (pc < 0x80000) // PRG RAM
\r
1426 return (int)Pico_mcd->prg_ram;
\r
1428 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1429 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1431 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1432 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1433 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1436 // Error - Program Counter is invalid
\r
1437 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1439 return (int)Pico_mcd->prg_ram;
\r
1443 static u32 PicoCheckPcS68k(u32 pc)
\r
1445 pc-=PicoCpuCS68k.membase; // Get real pc
\r
1448 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);
\r
1450 return PicoCpuCS68k.membase+pc;
\r
1454 #ifndef _ASM_CD_MEMORY_C
\r
1455 void PicoMemResetCD(int r3)
\r
1458 // update fetchmap..
\r
1462 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
1463 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;
\r
1467 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
1468 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
1469 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
1470 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
1476 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1478 dprintf("PicoMemSetupCD()");
\r
1480 // Setup m68k memory callbacks:
\r
1481 PicoCpuCM68k.checkpc=PicoCheckPcM68k;
\r
1482 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoReadM68k8;
\r
1483 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoReadM68k16;
\r
1484 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoReadM68k32;
\r
1485 PicoCpuCM68k.write8 =PicoWriteM68k8;
\r
1486 PicoCpuCM68k.write16=PicoWriteM68k16;
\r
1487 PicoCpuCM68k.write32=PicoWriteM68k32;
\r
1489 PicoCpuCS68k.checkpc=PicoCheckPcS68k;
\r
1490 PicoCpuCS68k.fetch8 =PicoCpuCS68k.read8 =PicoReadS68k8;
\r
1491 PicoCpuCS68k.fetch16=PicoCpuCS68k.read16=PicoReadS68k16;
\r
1492 PicoCpuCS68k.fetch32=PicoCpuCS68k.read32=PicoReadS68k32;
\r
1493 PicoCpuCS68k.write8 =PicoWriteS68k8;
\r
1494 PicoCpuCS68k.write16=PicoWriteS68k16;
\r
1495 PicoCpuCS68k.write32=PicoWriteS68k32;
\r
1499 PicoCpuFM68k.read_byte =PicoReadM68k8;
\r
1500 PicoCpuFM68k.read_word =PicoReadM68k16;
\r
1501 PicoCpuFM68k.read_long =PicoReadM68k32;
\r
1502 PicoCpuFM68k.write_byte=PicoWriteM68k8;
\r
1503 PicoCpuFM68k.write_word=PicoWriteM68k16;
\r
1504 PicoCpuFM68k.write_long=PicoWriteM68k32;
\r
1506 PicoCpuFS68k.read_byte =PicoReadS68k8;
\r
1507 PicoCpuFS68k.read_word =PicoReadS68k16;
\r
1508 PicoCpuFS68k.read_long =PicoReadS68k32;
\r
1509 PicoCpuFS68k.write_byte=PicoWriteS68k8;
\r
1510 PicoCpuFS68k.write_word=PicoWriteS68k16;
\r
1511 PicoCpuFS68k.write_long=PicoWriteS68k32;
\r
1513 // setup FAME fetchmap
\r
1517 // by default, point everything to fitst 64k of ROM (BIOS)
\r
1518 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1519 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
1520 // now real ROM (BIOS)
\r
1521 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
1522 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
\r
1524 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
1525 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
1527 // PRG RAM is default
\r
1528 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1529 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1531 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1532 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;
\r
1533 // WORD RAM 2M area
\r
1534 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1535 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;
\r
1536 // PicoMemResetCD() will setup word ram for both
\r
1540 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1541 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1546 unsigned char PicoReadCD8w (unsigned int a) {
\r
1547 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1549 unsigned short PicoReadCD16w(unsigned int a) {
\r
1550 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1552 unsigned int PicoReadCD32w(unsigned int a) {
\r
1553 return m68ki_cpu_p == &PicoCpuMS68k ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1555 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1556 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1558 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1559 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1561 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1562 if (m68ki_cpu_p == &PicoCpuMS68k) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1565 // these are allowed to access RAM
\r
1566 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1568 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1569 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1570 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1571 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1572 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1573 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1574 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1576 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1578 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1579 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1580 if((a&0xfc0000)==0x200000) { // word RAM
\r
1581 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1582 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1583 else if (a < 0x220000) {
\r
1584 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1585 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1588 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1590 return 0;//(u8) lastread_d;
\r
1592 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1594 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1595 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1596 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1597 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1598 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1599 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1600 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1602 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1604 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1605 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1606 if((a&0xfc0000)==0x200000) { // word RAM
\r
1607 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1608 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1609 else if (a < 0x220000) {
\r
1610 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1611 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1614 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1618 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1621 if(m68ki_cpu_p == &PicoCpuMS68k) {
\r
1622 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1623 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1624 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1625 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1626 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
1627 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1628 return (pm[0]<<16)|pm[1];
\r
1630 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1632 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1633 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1634 if((a&0xfc0000)==0x200000) { // word RAM
\r
1635 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1636 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1637 else if (a < 0x220000) {
\r
1638 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1639 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1640 return (pm[0]<<16)|pm[1];
\r
1643 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1647 #endif // EMU_M68K
\r