1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 #include "cell_map.c"
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24 typedef unsigned char u8;
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25 typedef unsigned short u16;
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26 typedef unsigned int u32;
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28 //#define __debug_io
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29 //#define __debug_io2
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31 //#define rdprintf dprintf
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32 #define rdprintf(...)
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33 //#define wrdprintf dprintf
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34 #define wrdprintf(...)
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36 // -----------------------------------------------------------------
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39 static u32 m68k_reg_read16(u32 a)
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43 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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47 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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50 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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51 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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54 d = Pico_mcd->s68k_regs[4]<<8;
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57 d = *(u16 *)(Pico_mcd->bios + 0x72);
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60 d = Read_CDC_Host(0);
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63 dprintf("m68k FIXME: reserved read");
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66 dprintf("m68k stopwatch timer read");
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67 d = Pico_mcd->m.timer_stopwatch >> 16;
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72 // comm flag/cmd/status (0xE-0x2F)
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73 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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77 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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81 // dprintf("ret = %04x", d);
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85 static void m68k_reg_write8(u32 a, u32 d)
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88 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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93 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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97 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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98 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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99 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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100 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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101 SekResetS68k(); // S68k comes out of RESET or BRQ state
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102 Pico_mcd->m.state_flags&=~1;
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103 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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105 Pico_mcd->m.busreq = d;
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108 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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111 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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112 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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114 if ((dold>>6) != ((d>>6)&3))
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115 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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116 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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117 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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118 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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120 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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122 //dold &= ~2; // ??
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123 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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125 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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128 d |= Pico_mcd->s68k_regs[3]&0x1d;
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129 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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130 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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135 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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138 Pico_mcd->bios[0x72] = d;
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139 dprintf("hint vector set to %08x", PicoRead32(0x70));
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142 //dprintf("m68k: comm flag: %02x", d);
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143 Pico_mcd->s68k_regs[0xe] = d;
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147 if ((a&0xf0) == 0x10) {
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148 Pico_mcd->s68k_regs[a] = d;
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152 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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156 #define READ_FONT_DATA(basemask) \
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158 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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159 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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160 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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161 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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162 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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163 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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167 static u32 s68k_reg_read16(u32 a)
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171 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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175 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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178 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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179 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
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182 d = CDC_Read_Reg();
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185 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
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188 dprintf("s68k stopwatch timer read");
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189 d = Pico_mcd->m.timer_stopwatch >> 16;
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192 dprintf("s68k int3 timer read");
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194 case 0x34: // fader
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195 d = 0; // no busy bit
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197 case 0x50: // font data (check: Lunar 2, Silpheed)
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198 READ_FONT_DATA(0x00100000);
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201 READ_FONT_DATA(0x00010000);
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204 READ_FONT_DATA(0x10000000);
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207 READ_FONT_DATA(0x01000000);
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211 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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215 // dprintf("ret = %04x", d);
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220 static void s68k_reg_write8(u32 a, u32 d)
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222 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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224 // TODO: review against Gens
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227 return; // only m68k can change WP
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229 int dold = Pico_mcd->s68k_regs[3];
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230 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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234 if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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236 dprintf("wram mode 2M->1M");
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237 wram_2M_to_1M(Pico_mcd->word_ram2M);
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240 d |= Pico_mcd->s68k_regs[3]&0xc3;
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241 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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243 dprintf("wram mode 1M->2M");
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244 wram_1M_to_2M(Pico_mcd->word_ram2M);
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250 dprintf("s68k CDC dest: %x", d&7);
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251 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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254 //dprintf("s68k CDC reg addr: %x", d&0xf);
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260 dprintf("s68k set CDC dma addr");
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264 dprintf("s68k set stopwatch timer");
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265 Pico_mcd->m.timer_stopwatch = 0;
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268 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
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269 Pico_mcd->m.timer_stopwatch = 0;
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272 dprintf("s68k set int3 timer: %02x", d);
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273 Pico_mcd->m.timer_int3 = d << 16;
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275 case 0x33: // IRQ mask
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276 dprintf("s68k irq mask: %02x", d);
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277 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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278 CDD_Export_Status();
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281 case 0x34: // fader
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282 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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285 return; // d/m bit is unsetable
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287 u32 d_old = Pico_mcd->s68k_regs[0x37];
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288 Pico_mcd->s68k_regs[0x37] = d&7;
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289 if ((d&4) && !(d_old&4)) {
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290 CDD_Export_Status();
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295 Pico_mcd->s68k_regs[a] = (u8) d;
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296 CDD_Import_Command();
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300 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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302 dprintf("s68k FIXME: invalid write @ %02x?", a);
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306 Pico_mcd->s68k_regs[a] = (u8) d;
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311 static u32 OtherRead16End(u32 a, int realsize)
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315 if ((a&0xffffc0)==0xa12000) {
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316 d=m68k_reg_read16(a);
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320 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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327 static void OtherWrite8End(u32 a, u32 d, int realsize)
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329 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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331 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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335 #undef _ASM_MEMORY_C
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336 #include "../MemoryCmn.c"
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339 // -----------------------------------------------------------------
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340 // Read Rom and read Ram
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342 u8 PicoReadM68k8(u32 a)
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346 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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350 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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353 if ((a&0xfe0000)==0x020000) {
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354 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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355 d = *(prg_bank+((a^1)&0x1ffff));
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360 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)
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364 unsigned short *ram = (unsigned short *) Pico.ram;
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365 // unswap and dump RAM
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366 for (i = 0; i < 0x10000/2; i++)
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367 ram[i] = (ram[i]>>8) | (ram[i]<<8);
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368 ff = fopen("ram.bin", "wb");
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369 fwrite(ram, 1, 0x10000, ff);
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376 if ((a&0xfc0000)==0x200000) {
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377 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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378 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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379 int bank = Pico_mcd->s68k_regs[3]&1;
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381 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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383 d = Pico_mcd->word_ram1M[bank][a^1];
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385 // allow access in any mode, like Gens does
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386 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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388 wrdprintf("ret = %02x", (u8)d);
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392 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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394 if ((a&0xffffc0)==0xa12000)
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395 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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397 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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399 if ((a&0xffffc0)==0xa12000)
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400 rdprintf("ret = %02x", (u8)d);
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405 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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411 u16 PicoReadM68k16(u32 a)
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415 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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419 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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422 if ((a&0xfe0000)==0x020000) {
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423 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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424 d = *(u16 *)(prg_bank+(a&0x1fffe));
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429 if ((a&0xfc0000)==0x200000) {
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430 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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431 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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432 int bank = Pico_mcd->s68k_regs[3]&1;
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434 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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436 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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438 // allow access in any mode, like Gens does
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439 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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441 wrdprintf("ret = %04x", d);
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445 if ((a&0xffffc0)==0xa12000)
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446 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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448 d = (u16)OtherRead16(a, 16);
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450 if ((a&0xffffc0)==0xa12000)
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451 rdprintf("ret = %04x", d);
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456 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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462 u32 PicoReadM68k32(u32 a)
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466 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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470 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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473 if ((a&0xfe0000)==0x020000) {
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474 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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475 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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476 d = (pm[0]<<16)|pm[1];
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481 if ((a&0xfc0000)==0x200000) {
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482 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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483 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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484 int bank = Pico_mcd->s68k_regs[3]&1;
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485 if (a >= 0x220000) { // cell arranged
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487 a1 = (a&2) | (cell_map(a >> 2) << 2);
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488 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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490 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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491 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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493 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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496 // allow access in any mode, like Gens does
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497 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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499 wrdprintf("ret = %08x", d);
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503 if ((a&0xffffc0)==0xa12000)
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504 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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506 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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508 if ((a&0xffffc0)==0xa12000)
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509 rdprintf("ret = %08x", d);
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513 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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519 // -----------------------------------------------------------------
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522 void PicoWriteM68k8(u32 a,u8 d)
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525 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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527 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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528 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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531 if ((a&0xe00000)==0xe00000) { // Ram
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532 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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539 if ((a&0xfe0000)==0x020000) {
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540 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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541 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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546 if ((a&0xfc0000)==0x200000) {
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547 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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548 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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549 int bank = Pico_mcd->s68k_regs[3]&1;
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551 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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553 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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555 // allow access in any mode, like Gens does
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556 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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561 if ((a&0xffffc0)==0xa12000)
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562 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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564 OtherWrite8(a,d,8);
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568 void PicoWriteM68k16(u32 a,u16 d)
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571 dprintf("w16: %06x, %04x", a&0xffffff, d);
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573 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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575 if ((a&0xe00000)==0xe00000) { // Ram
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576 *(u16 *)(Pico.ram+(a&0xfffe))=d;
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583 if ((a&0xfe0000)==0x020000) {
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584 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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585 *(u16 *)(prg_bank+(a&0x1fffe))=d;
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590 if ((a&0xfc0000)==0x200000) {
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591 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
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592 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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593 int bank = Pico_mcd->s68k_regs[3]&1;
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595 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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597 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
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599 // allow access in any mode, like Gens does
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600 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
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605 if ((a&0xffffc0)==0xa12000)
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606 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
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612 void PicoWriteM68k32(u32 a,u32 d)
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615 dprintf("w32: %06x, %08x", a&0xffffff, d);
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618 if ((a&0xe00000)==0xe00000)
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621 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
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622 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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629 if ((a&0xfe0000)==0x020000) {
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630 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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631 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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632 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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637 if ((a&0xfc0000)==0x200000) {
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638 if (d != 0) // don't log clears
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639 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
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640 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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641 int bank = Pico_mcd->s68k_regs[3]&1;
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642 if (a >= 0x220000) { // cell arranged
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644 a1 = (a&2) | (cell_map(a >> 2) << 2);
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645 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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647 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
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648 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
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650 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
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651 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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654 // allow access in any mode, like Gens does
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655 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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656 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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661 if ((a&0xffffc0)==0xa12000)
\r
662 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
664 OtherWrite16(a, (u16)(d>>16));
\r
665 OtherWrite16(a+2,(u16)d);
\r
669 // -----------------------------------------------------------------
\r
672 u8 PicoReadS68k8(u32 a)
\r
680 d = *(Pico_mcd->prg_ram+(a^1));
\r
685 if ((a&0xfffe00) == 0xff8000) {
\r
687 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
688 if (a >= 0x58 && a < 0x68)
\r
689 d = gfx_cd_read(a&~1);
\r
690 else d = s68k_reg_read16(a&~1);
\r
691 if ((a&1)==0) d>>=8;
\r
692 rdprintf("ret = %02x", (u8)d);
\r
696 // word RAM (2M area)
\r
697 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
698 // test: batman returns
\r
699 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
700 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
701 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
702 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
703 if (a&1) d &= 0x0f;
\r
705 dprintf("FIXME: decode");
\r
707 // allow access in any mode, like Gens does
\r
708 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
710 wrdprintf("ret = %02x", (u8)d);
\r
714 // word RAM (1M area)
\r
715 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
717 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
718 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
719 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
720 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
721 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
722 wrdprintf("ret = %02x", (u8)d);
\r
727 if ((a&0xff8000)==0xff0000) {
\r
728 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
731 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
732 else if (a >= 0x20) {
\r
734 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
735 if (a & 2) d >>= 8;
\r
737 dprintf("ret = %02x", (u8)d);
\r
742 if ((a&0xff0000)==0xfe0000) {
\r
743 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
747 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
752 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
758 u16 PicoReadS68k16(u32 a)
\r
766 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
771 if ((a&0xfffe00) == 0xff8000) {
\r
773 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
774 if (a >= 0x58 && a < 0x68)
\r
775 d = gfx_cd_read(a);
\r
776 else d = s68k_reg_read16(a);
\r
777 rdprintf("ret = %04x", d);
\r
781 // word RAM (2M area)
\r
782 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
783 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
784 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
785 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
786 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
787 d |= d << 4; d &= ~0xf0;
\r
788 dprintf("FIXME: decode");
\r
790 // allow access in any mode, like Gens does
\r
791 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
793 wrdprintf("ret = %04x", d);
\r
797 // word RAM (1M area)
\r
798 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
800 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
801 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
802 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
803 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
804 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
805 wrdprintf("ret = %04x", d);
\r
810 if ((a&0xff0000)==0xfe0000) {
\r
811 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
813 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
814 d|= Pico_mcd->bram[a++] << 8;
\r
815 dprintf("ret = %04x", d);
\r
820 if ((a&0xff8000)==0xff0000) {
\r
821 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
824 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
825 else if (a >= 0x20) {
\r
827 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
828 if (a & 2) d >>= 8;
\r
830 dprintf("ret = %04x", d);
\r
834 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
839 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
845 u32 PicoReadS68k32(u32 a)
\r
853 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
854 d = (pm[0]<<16)|pm[1];
\r
859 if ((a&0xfffe00) == 0xff8000) {
\r
861 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
862 if (a >= 0x58 && a < 0x68)
\r
863 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
864 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
865 rdprintf("ret = %08x", d);
\r
869 // word RAM (2M area)
\r
870 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
871 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
872 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
873 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
875 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
876 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
877 d |= d << 4; d &= 0x0f0f0f0f;
\r
878 dprintf("FIXME: decode");
\r
880 // allow access in any mode, like Gens does
\r
881 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
883 wrdprintf("ret = %08x", d);
\r
887 // word RAM (1M area)
\r
888 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
890 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
891 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
892 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
893 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
894 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
895 wrdprintf("ret = %08x", d);
\r
900 if ((a&0xff8000)==0xff0000) {
\r
901 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
905 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
906 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
907 } else if (a >= 0x20) {
\r
911 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
912 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
914 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
915 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
918 dprintf("ret = %08x", d);
\r
923 if ((a&0xff0000)==0xfe0000) {
\r
924 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
926 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
927 d|= Pico_mcd->bram[a++] << 24;
\r
928 d|= Pico_mcd->bram[a++];
\r
929 d|= Pico_mcd->bram[a++] << 8;
\r
930 dprintf("ret = %08x", d);
\r
934 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
939 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
945 /* check: jaguar xj 220 (draws entire world using decode) */
\r
946 static void decode_write8(u32 a, u8 d, int r3)
\r
948 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
949 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
953 if (!(a&1)) d <<= 4;
\r
955 //dprintf("FIXME: decode, r3 = %02x", r3);
\r
958 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
959 } else if (r3 > 8) {
\r
967 *pd = d | (*pd & oldmask);
\r
971 static void decode_write16(u32 a, u16 d, int r3)
\r
973 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
975 //if ((a & 0x3ffff) < 0x28000) return;
\r
983 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
984 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
986 } else if (r3 > 8) {
\r
988 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
989 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
995 //dprintf("FIXME: decode");
\r
999 // -----------------------------------------------------------------
\r
1001 void PicoWriteS68k8(u32 a,u8 d)
\r
1003 #ifdef __debug_io2
\r
1004 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1010 if (a < 0x80000) {
\r
1011 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1017 if ((a&0xfffe00) == 0xff8000) {
\r
1019 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1020 if (a >= 0x58 && a < 0x68)
\r
1021 gfx_cd_write(a&~1, (d<<8)|d);
\r
1022 else s68k_reg_write8(a,d);
\r
1026 // word RAM (2M area)
\r
1027 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1028 int r3 = Pico_mcd->s68k_regs[3];
\r
1029 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1030 if (r3 & 4) { // 1M decode mode?
\r
1031 decode_write8(a, d, r3);
\r
1033 // allow access in any mode, like Gens does
\r
1034 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1039 // word RAM (1M area)
\r
1040 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1041 // Wing Commander tries to write here in wrong mode
\r
1044 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1045 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1046 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1047 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1048 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1053 if ((a&0xff8000)==0xff0000) {
\r
1056 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1057 else if (a < 0x12)
\r
1058 pcm_write(a>>1, d);
\r
1063 if ((a&0xff0000)==0xfe0000) {
\r
1064 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1069 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1073 void PicoWriteS68k16(u32 a,u16 d)
\r
1075 #ifdef __debug_io2
\r
1076 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1082 if (a < 0x80000) {
\r
1083 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1088 if ((a&0xfffe00) == 0xff8000) {
\r
1090 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1091 if (a >= 0x58 && a < 0x68)
\r
1092 gfx_cd_write(a, d);
\r
1094 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1095 Pico_mcd->s68k_regs[0xf] = d;
\r
1098 s68k_reg_write8(a, d>>8);
\r
1099 s68k_reg_write8(a+1,d&0xff);
\r
1104 // word RAM (2M area)
\r
1105 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1106 int r3 = Pico_mcd->s68k_regs[3];
\r
1107 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1108 if (r3 & 4) { // 1M decode mode?
\r
1109 decode_write16(a, d, r3);
\r
1111 // allow access in any mode, like Gens does
\r
1112 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1117 // word RAM (1M area)
\r
1118 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1121 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1122 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1123 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1124 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1125 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1130 if ((a&0xff8000)==0xff0000) {
\r
1133 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1134 else if (a < 0x12)
\r
1135 pcm_write(a>>1, d & 0xff);
\r
1140 if ((a&0xff0000)==0xfe0000) {
\r
1141 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1142 a = (a>>1)&0x1fff;
\r
1143 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1144 Pico_mcd->bram[a++] = d >> 8;
\r
1149 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1153 void PicoWriteS68k32(u32 a,u32 d)
\r
1155 #ifdef __debug_io2
\r
1156 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1162 if (a < 0x80000) {
\r
1163 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1164 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1169 if ((a&0xfffe00) == 0xff8000) {
\r
1171 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1172 if (a >= 0x58 && a < 0x68) {
\r
1173 gfx_cd_write(a, d>>16);
\r
1174 gfx_cd_write(a+2, d&0xffff);
\r
1176 s68k_reg_write8(a, d>>24);
\r
1177 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1178 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1179 s68k_reg_write8(a+3, d &0xff);
\r
1184 // word RAM (2M area)
\r
1185 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1186 int r3 = Pico_mcd->s68k_regs[3];
\r
1187 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1188 if (r3 & 4) { // 1M decode mode?
\r
1189 decode_write16(a , d >> 16, r3);
\r
1190 decode_write16(a+2, d , r3);
\r
1192 // allow access in any mode, like Gens does
\r
1193 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1194 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1199 // word RAM (1M area)
\r
1200 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1204 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1205 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1206 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1207 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1208 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1209 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1214 if ((a&0xff8000)==0xff0000) {
\r
1216 if (a >= 0x2000) {
\r
1218 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1219 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1220 } else if (a < 0x12) {
\r
1222 pcm_write(a, (d>>16) & 0xff);
\r
1223 pcm_write(a+1, d & 0xff);
\r
1229 if ((a&0xff0000)==0xfe0000) {
\r
1230 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1231 a = (a>>1)&0x1fff;
\r
1232 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1233 Pico_mcd->bram[a++] = d >> 24;
\r
1234 Pico_mcd->bram[a++] = d;
\r
1235 Pico_mcd->bram[a++] = d >> 8;
\r
1240 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1245 // -----------------------------------------------------------------
\r
1248 #if defined(EMU_C68K)
\r
1249 static __inline int PicoMemBaseM68k(u32 pc)
\r
1251 if ((pc&0xe00000)==0xe00000)
\r
1252 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1255 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1257 if ((pc&0xfc0000)==0x200000)
\r
1259 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1260 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1261 if (pc < 0x220000) {
\r
1262 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1263 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1267 // Error - Program Counter is invalid
\r
1268 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1270 return (int)Pico_mcd->bios;
\r
1274 static u32 PicoCheckPcM68k(u32 pc)
\r
1276 pc-=PicoCpu.membase; // Get real pc
\r
1279 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1281 return PicoCpu.membase+pc;
\r
1285 static __inline int PicoMemBaseS68k(u32 pc)
\r
1287 if (pc < 0x80000) // PRG RAM
\r
1288 return (int)Pico_mcd->prg_ram;
\r
1290 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1291 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1293 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1294 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1295 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1298 // Error - Program Counter is invalid
\r
1299 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1301 return (int)Pico_mcd->prg_ram;
\r
1305 static u32 PicoCheckPcS68k(u32 pc)
\r
1307 pc-=PicoCpuS68k.membase; // Get real pc
\r
1310 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1312 return PicoCpuS68k.membase+pc;
\r
1317 void PicoMemSetupCD()
\r
1319 dprintf("PicoMemSetupCD()");
\r
1321 // Setup m68k memory callbacks:
\r
1322 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1323 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1324 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1325 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1326 PicoCpu.write8 =PicoWriteM68k8;
\r
1327 PicoCpu.write16=PicoWriteM68k16;
\r
1328 PicoCpu.write32=PicoWriteM68k32;
\r
1330 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1331 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1332 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1333 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1334 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1335 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1336 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1342 unsigned char PicoReadCD8w (unsigned int a) {
\r
1343 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1345 unsigned short PicoReadCD16w(unsigned int a) {
\r
1346 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1348 unsigned int PicoReadCD32w(unsigned int a) {
\r
1349 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1351 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1352 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1354 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1355 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1357 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1358 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1361 // these are allowed to access RAM
\r
1362 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1364 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1365 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1366 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1367 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1368 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1369 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1370 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1372 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1374 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1375 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1376 if((a&0xfc0000)==0x200000) { // word RAM
\r
1377 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1378 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1379 else if (a < 0x220000) {
\r
1380 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1381 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1384 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1386 return 0;//(u8) lastread_d;
\r
1388 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1390 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1391 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1392 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1393 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1394 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1395 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1396 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1398 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1400 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1401 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1402 if((a&0xfc0000)==0x200000) { // word RAM
\r
1403 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1404 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1405 else if (a < 0x220000) {
\r
1406 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1407 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1410 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1414 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1417 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1418 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1419 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1420 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1421 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1422 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1423 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1424 return (pm[0]<<16)|pm[1];
\r
1426 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1428 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1429 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1430 if((a&0xfc0000)==0x200000) { // word RAM
\r
1431 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1432 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1433 else if (a < 0x220000) {
\r
1434 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1435 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1436 return (pm[0]<<16)|pm[1];
\r
1439 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1443 #endif // EMU_M68K
\r