1 @ vim:filetype=armasm
\r
3 @ memory handlers with banking support for SSF II - The New Challengers
\r
4 @ mostly based on Gens code
\r
6 @ (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
\r
7 @ All Rights Reserved
\r
10 .include "port_config.s"
\r
15 @ default jump tables
\r
18 .long m_read8_rom0 @ 0x000000 - 0x07FFFF
\r
19 .long m_read8_rom1 @ 0x080000 - 0x0FFFFF
\r
20 .long m_read8_rom2 @ 0x100000 - 0x17FFFF
\r
21 .long m_read8_rom3 @ 0x180000 - 0x1FFFFF
\r
22 .long m_read8_rom4 @ 0x200000 - 0x27FFFF
\r
23 .long m_read8_rom5 @ 0x280000 - 0x2FFFFF
\r
24 .long m_read8_rom6 @ 0x300000 - 0x37FFFF
\r
25 .long m_read8_rom7 @ 0x380000 - 0x3FFFFF
\r
26 .long m_read8_rom8 @ 0x400000 - 0x47FFFF - for all those large ROM hacks
\r
27 .long m_read8_rom9 @ 0x480000 - 0x4FFFFF
\r
28 .long m_read8_romA @ 0x500000 - 0x57FFFF
\r
29 .long m_read8_romB @ 0x580000 - 0x5FFFFF
\r
30 .long m_read8_romC @ 0x600000 - 0x67FFFF
\r
31 .long m_read8_romD @ 0x680000 - 0x6FFFFF
\r
32 .long m_read8_romE @ 0x700000 - 0x77FFFF
\r
33 .long m_read8_romF @ 0x780000 - 0x7FFFFF
\r
34 .long m_read8_rom10 @ 0x800000 - 0x87FFFF
\r
35 .long m_read8_rom11 @ 0x880000 - 0x8FFFFF
\r
36 .long m_read8_rom12 @ 0x900000 - 0x97FFFF
\r
37 .long m_read8_rom13 @ 0x980000 - 0x9FFFFF
\r
38 .long m_read8_misc @ 0xA00000 - 0xA7FFFF
\r
39 .long m_read_null @ 0xA80000 - 0xAFFFFF
\r
40 .long m_read_null @ 0xB00000 - 0xB7FFFF
\r
41 .long m_read_null @ 0xB80000 - 0xBFFFFF
\r
42 .long m_read8_vdp @ 0xC00000 - 0xC7FFFF
\r
43 .long m_read8_vdp @ 0xC80000 - 0xCFFFFF
\r
44 .long m_read8_vdp @ 0xD00000 - 0xD7FFFF
\r
45 .long m_read8_vdp @ 0xD80000 - 0xDFFFFF
\r
46 .long m_read8_ram @ 0xE00000 - 0xE7FFFF
\r
47 .long m_read8_ram @ 0xE80000 - 0xEFFFFF
\r
48 .long m_read8_ram @ 0xF00000 - 0xF7FFFF
\r
49 .long m_read8_ram @ 0xF80000 - 0xFFFFFF
\r
52 .long m_read16_rom0 @ 0x000000 - 0x07FFFF
\r
53 .long m_read16_rom1 @ 0x080000 - 0x0FFFFF
\r
54 .long m_read16_rom2 @ 0x100000 - 0x17FFFF
\r
55 .long m_read16_rom3 @ 0x180000 - 0x1FFFFF
\r
56 .long m_read16_rom4 @ 0x200000 - 0x27FFFF
\r
57 .long m_read16_rom5 @ 0x280000 - 0x2FFFFF
\r
58 .long m_read16_rom6 @ 0x300000 - 0x37FFFF
\r
59 .long m_read16_rom7 @ 0x380000 - 0x3FFFFF
\r
60 .long m_read16_rom8 @ 0x400000 - 0x47FFFF
\r
61 .long m_read16_rom9 @ 0x480000 - 0x4FFFFF
\r
62 .long m_read16_romA @ 0x500000 - 0x57FFFF
\r
63 .long m_read16_romB @ 0x580000 - 0x5FFFFF
\r
64 .long m_read16_romC @ 0x600000 - 0x67FFFF
\r
65 .long m_read16_romD @ 0x680000 - 0x6FFFFF
\r
66 .long m_read16_romE @ 0x700000 - 0x77FFFF
\r
67 .long m_read16_romF @ 0x780000 - 0x7FFFFF
\r
68 .long m_read16_rom10 @ 0x800000 - 0x87FFFF
\r
69 .long m_read16_rom11 @ 0x880000 - 0x8FFFFF
\r
70 .long m_read16_rom12 @ 0x900000 - 0x97FFFF
\r
71 .long m_read16_rom13 @ 0x980000 - 0x9FFFFF
\r
72 .long m_read16_misc @ 0xA00000 - 0xA7FFFF
\r
73 .long m_read_null @ 0xA80000 - 0xAFFFFF
\r
74 .long m_read_null @ 0xB00000 - 0xB7FFFF
\r
75 .long m_read_null @ 0xB80000 - 0xBFFFFF
\r
76 .long m_read16_vdp @ 0xC00000 - 0xC7FFFF
\r
77 .long m_read16_vdp @ 0xC80000 - 0xCFFFFF
\r
78 .long m_read16_vdp @ 0xD00000 - 0xD7FFFF
\r
79 .long m_read16_vdp @ 0xD80000 - 0xDFFFFF
\r
80 .long m_read16_ram @ 0xE00000 - 0xE7FFFF
\r
81 .long m_read16_ram @ 0xE80000 - 0xEFFFFF
\r
82 .long m_read16_ram @ 0xF00000 - 0xF7FFFF
\r
83 .long m_read16_ram @ 0xF80000 - 0xFFFFFF
\r
86 .long m_read32_rom0 @ 0x000000 - 0x07FFFF
\r
87 .long m_read32_rom1 @ 0x080000 - 0x0FFFFF
\r
88 .long m_read32_rom2 @ 0x100000 - 0x17FFFF
\r
89 .long m_read32_rom3 @ 0x180000 - 0x1FFFFF
\r
90 .long m_read32_rom4 @ 0x200000 - 0x27FFFF
\r
91 .long m_read32_rom5 @ 0x280000 - 0x2FFFFF
\r
92 .long m_read32_rom6 @ 0x300000 - 0x37FFFF
\r
93 .long m_read32_rom7 @ 0x380000 - 0x3FFFFF
\r
94 .long m_read32_rom8 @ 0x400000 - 0x47FFFF
\r
95 .long m_read32_rom9 @ 0x480000 - 0x4FFFFF
\r
96 .long m_read32_romA @ 0x500000 - 0x57FFFF
\r
97 .long m_read32_romB @ 0x580000 - 0x5FFFFF
\r
98 .long m_read32_romC @ 0x600000 - 0x67FFFF
\r
99 .long m_read32_romD @ 0x680000 - 0x6FFFFF
\r
100 .long m_read32_romE @ 0x700000 - 0x77FFFF
\r
101 .long m_read32_romF @ 0x780000 - 0x7FFFFF
\r
102 .long m_read32_rom10 @ 0x800000 - 0x87FFFF
\r
103 .long m_read32_rom11 @ 0x880000 - 0x8FFFFF
\r
104 .long m_read32_rom12 @ 0x900000 - 0x97FFFF
\r
105 .long m_read32_rom13 @ 0x980000 - 0x9FFFFF
\r
106 .long m_read32_misc @ 0xA00000 - 0xA7FFFF
\r
107 .long m_read_null @ 0xA80000 - 0xAFFFFF
\r
108 .long m_read_null @ 0xB00000 - 0xB7FFFF
\r
109 .long m_read_null @ 0xB80000 - 0xBFFFFF
\r
110 .long m_read32_vdp @ 0xC00000 - 0xC7FFFF
\r
111 .long m_read32_vdp @ 0xC80000 - 0xCFFFFF
\r
112 .long m_read32_vdp @ 0xD00000 - 0xD7FFFF
\r
113 .long m_read32_vdp @ 0xD80000 - 0xDFFFFF
\r
114 .long m_read32_ram @ 0xE00000 - 0xE7FFFF
\r
115 .long m_read32_ram @ 0xE80000 - 0xEFFFFF
\r
116 .long m_read32_ram @ 0xF00000 - 0xF7FFFF
\r
117 .long m_read32_ram @ 0xF80000 - 0xFFFFFF
\r
120 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
124 @.section .bss, "brw"
\r
138 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
143 .global PicoMemReset
\r
148 .global PicoWriteRomHW_SSF2
\r
149 .global m_m68k_read8_misc
\r
150 .global m_m68k_write8_misc
\r
154 ldr r12,=(Pico+0x22204)
\r
155 ldr r12,[r12] @ romsize
\r
156 add r12,r12,#0x80000
\r
158 mov r12,r12,lsr #19
\r
160 ldr r0, =m_read8_table
\r
161 ldr r1, =m_read8_def_table
\r
169 ldr r0, =m_read16_table
\r
170 ldr r1, =m_read16_def_table
\r
178 ldr r0, =m_read32_table
\r
179 ldr r1, =m_read32_def_table
\r
187 @ update memhandlers according to ROM size
\r
188 ldr r1, =m_read8_above_rom
\r
189 ldr r0, =m_read8_table
\r
196 beq 1b @ do not touch the SRAM area
\r
197 str r1, [r0, r2, lsl #2]
\r
200 ldr r1, =m_read16_above_rom
\r
201 ldr r0, =m_read16_table
\r
209 str r1, [r0, r2, lsl #2]
\r
212 ldr r1, =m_read32_above_rom
\r
213 ldr r0, =m_read32_table
\r
221 str r1, [r0, r2, lsl #2]
\r
228 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
231 ldr r2, =m_read8_table
\r
232 bic r0, r0, #0xff000000
\r
233 and r1, r0, #0x00f80000
\r
234 ldr pc, [r2, r1, lsr #17]
\r
236 PicoRead16: @ u32 a
\r
237 ldr r2, =m_read16_table
\r
238 bic r0, r0, #0xff000000
\r
239 and r1, r0, #0x00f80000
\r
240 ldr pc, [r2, r1, lsr #17]
\r
242 PicoRead32: @ u32 a
\r
243 ldr r2, =m_read32_table
\r
244 bic r0, r0, #0xff000000
\r
245 and r1, r0, #0x00f80000
\r
246 ldr pc, [r2, r1, lsr #17]
\r
250 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
257 .macro m_read8_rom sect
\r
258 ldr r1, =(Pico+0x22200)
\r
259 bic r0, r0, #0xf80000
\r
262 orr r0, r0, #0x080000*\sect
\r
270 m_read8_rom0: @ 0x000000 - 0x07ffff
\r
273 m_read8_rom1: @ 0x080000 - 0x0fffff
\r
276 m_read8_rom2: @ 0x100000 - 0x17ffff
\r
279 m_read8_rom3: @ 0x180000 - 0x1fffff
\r
282 m_read8_rom4: @ 0x200000 - 0x27ffff, SRAM area
\r
284 ldr r3, =(Pico+0x22200)
\r
285 ldr r1, [r2, #8] @ SRam.end
\r
286 bic r0, r0, #0xf80000
\r
287 orr r0, r0, #0x200000
\r
290 ldr r1, [r2, #4] @ SRam.start
\r
293 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
\r
297 ldr r1, [r3, #4] @ romsize
\r
300 bxgt lr @ bad location
\r
306 m_read8_rom5: @ 0x280000 - 0x2fffff
\r
309 m_read8_rom6: @ 0x300000 - 0x37ffff
\r
312 m_read8_rom7: @ 0x380000 - 0x3fffff
\r
315 m_read8_rom8: @ 0x400000 - 0x47ffff
\r
318 m_read8_rom9: @ 0x480000 - 0x4fffff
\r
321 m_read8_romA: @ 0x500000 - 0x57ffff
\r
324 m_read8_romB: @ 0x580000 - 0x5fffff
\r
327 m_read8_romC: @ 0x600000 - 0x67ffff
\r
330 m_read8_romD: @ 0x680000 - 0x6fffff
\r
333 m_read8_romE: @ 0x700000 - 0x77ffff
\r
336 m_read8_romF: @ 0x780000 - 0x7fffff
\r
339 m_read8_rom10: @ 0x800000 - 0x87ffff
\r
342 m_read8_rom11: @ 0x880000 - 0x8fffff
\r
345 m_read8_rom12: @ 0x900000 - 0x97ffff
\r
348 m_read8_rom13: @ 0x980000 - 0x9fffff
\r
354 bic r2, r0, #0x001f @ most commonly we get i/o port read,
\r
355 cmp r2, #0xa10000 @ so check for it first
\r
359 beq m_read8_misc_hwreg
\r
364 ldr r3, =(Pico+0x22000)
\r
365 mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])
\r
369 m_read8_misc_hwreg:
\r
370 ldr r3, =(Pico+0x22200)
\r
371 ldrb r0, [r3, #0x0f] @ Pico.m.hardware
\r
375 mov r2, #0xa10000 @ games also like to poll busreq,
\r
376 orr r2, r2, #0x001100 @ so we'll try it now
\r
380 and r2, r0, #0xff0000 @ finally it might be
\r
381 cmp r2, #0xa00000 @ z80 area
\r
384 beq z80Read8 @ z80 RAM
\r
385 and r2, r0, #0x6000
\r
389 b ym2612_read_local_68k
\r
391 m_read8_fake_ym2612:
\r
392 ldr r3, =(Pico+0x22200)
\r
393 ldrb r0, [r3, #8] @ Pico.m.rotate
\r
400 @ if everything else fails, use generic handler
\r
407 moveq r0, r0, lsr #8
\r
414 bxne lr @ invalid read
\r
419 bic r0, r0, #0xff0000
\r
425 @ might still be SRam (Micro Machines, HardBall '95)
\r
427 ldr r3, =(Pico+0x22200)
\r
428 ldr r1, [r2, #8] @ SRam.end
\r
430 bgt m_read8_ar_nosram
\r
431 ldr r1, [r2, #4] @ SRam.start
\r
433 blt m_read8_ar_nosram
\r
434 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
\r
438 ldr r2, =PicoRead16Hook
\r
447 moveq r0, r0, lsr #8
\r
452 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
454 .macro m_read16_rom sect
\r
455 ldr r1, =(Pico+0x22200)
\r
456 bic r0, r0, #0xf80000
\r
460 orr r0, r0, #0x080000*\sect
\r
467 m_read16_rom0: @ 0x000000 - 0x07ffff
\r
470 m_read16_rom1: @ 0x080000 - 0x0fffff
\r
473 m_read16_rom2: @ 0x100000 - 0x17ffff
\r
476 m_read16_rom3: @ 0x180000 - 0x1fffff
\r
479 m_read16_rom4: @ 0x200000 - 0x27ffff, SRAM area (NBA Live 95)
\r
481 ldr r3, =(Pico+0x22200)
\r
482 ldr r1, [r2, #8] @ SRam.end
\r
483 bic r0, r0, #0xf80000
\r
485 orr r0, r0, #0x200000
\r
487 bgt m_read16_nosram
\r
488 ldr r1, [r2, #4] @ SRam.start
\r
490 blt m_read16_nosram
\r
491 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
\r
493 beq m_read16_nosram
\r
498 ldr r1, [r3, #4] @ romsize
\r
501 bxgt lr @ bad location
\r
506 m_read16_rom5: @ 0x280000 - 0x2fffff
\r
509 m_read16_rom6: @ 0x300000 - 0x37ffff
\r
512 m_read16_rom7: @ 0x380000 - 0x3fffff
\r
515 m_read16_rom8: @ 0x400000 - 0x47ffff
\r
518 m_read16_rom9: @ 0x480000 - 0x4fffff
\r
521 m_read16_romA: @ 0x500000 - 0x57ffff
\r
524 m_read16_romB: @ 0x580000 - 0x5fffff
\r
527 m_read16_romC: @ 0x600000 - 0x67ffff
\r
530 m_read16_romD: @ 0x680000 - 0x6fffff
\r
533 m_read16_romE: @ 0x700000 - 0x77ffff
\r
536 m_read16_romF: @ 0x780000 - 0x7fffff
\r
539 m_read16_rom10: @ 0x800000 - 0x87ffff
\r
542 m_read16_rom11: @ 0x880000 - 0x8fffff
\r
545 m_read16_rom12: @ 0x900000 - 0x97ffff
\r
548 m_read16_rom13: @ 0x980000 - 0x9fffff
\r
557 tst r0, #0x70000 @ if ((a&0xe700e0)==0xc00000)
\r
559 bxne lr @ invalid read
\r
565 bic r0, r0, #0xff0000
\r
570 m_read16_above_rom:
\r
571 @ might still be SRam
\r
573 ldr r3, =(Pico+0x22200)
\r
574 ldr r1, [r2, #8] @ SRam.end
\r
577 bgt m_read16_ar_nosram
\r
578 ldr r1, [r2, #4] @ SRam.start
\r
580 blt m_read16_ar_nosram
\r
581 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
\r
583 beq m_read16_ar_nosram
\r
587 m_read16_ar_nosram:
\r
588 ldr r2, =PicoRead16Hook
\r
595 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
597 .macro m_read32_rom sect
\r
598 ldr r1, =(Pico+0x22200)
\r
599 bic r0, r0, #0xf80000
\r
603 orr r0, r0, #0x080000*\sect
\r
606 ldrh r1, [r1, #2] @ 1ci
\r
607 orr r0, r1, r0, lsl #16
\r
612 m_read32_rom0: @ 0x000000 - 0x07ffff
\r
615 m_read32_rom1: @ 0x080000 - 0x0fffff
\r
618 m_read32_rom2: @ 0x100000 - 0x17ffff
\r
621 m_read32_rom3: @ 0x180000 - 0x1fffff
\r
624 m_read32_rom4: @ 0x200000 - 0x27ffff, SRAM area (does any game do long reads?)
\r
626 ldr r3, =(Pico+0x22200)
\r
627 ldr r1, [r2, #8] @ SRam.end
\r
628 bic r0, r0, #0xf80000
\r
630 orr r0, r0, #0x200000
\r
632 bgt m_read32_nosram
\r
633 ldr r1, [r2, #4] @ SRam.start
\r
635 blt m_read32_nosram
\r
636 ldrb r1, [r3, #0x11] @ Pico.m.sram_reg
\r
638 beq m_read32_nosram
\r
646 orr r0, r0, r1, lsl #16
\r
649 ldr r1, [r3, #4] @ romsize
\r
652 bxgt lr @ bad location
\r
653 ldr r1, [r3] @ (1ci)
\r
655 ldrh r1, [r1, #2] @ (2ci)
\r
656 orr r0, r1, r0, lsl #16
\r
659 m_read32_rom5: @ 0x280000 - 0x2fffff
\r
662 m_read32_rom6: @ 0x300000 - 0x37ffff
\r
665 m_read32_rom7: @ 0x380000 - 0x3fffff
\r
668 m_read32_rom8: @ 0x400000 - 0x47ffff
\r
671 m_read32_rom9: @ 0x480000 - 0x4fffff
\r
674 m_read32_romA: @ 0x500000 - 0x57ffff
\r
677 m_read32_romB: @ 0x580000 - 0x5fffff
\r
680 m_read32_romC: @ 0x600000 - 0x67ffff
\r
683 m_read32_romD: @ 0x680000 - 0x6fffff
\r
686 m_read32_romE: @ 0x700000 - 0x77ffff
\r
689 m_read32_romF: @ 0x780000 - 0x7fffff
\r
692 m_read32_rom10: @ 0x800000 - 0x87ffff
\r
695 m_read32_rom11: @ 0x880000 - 0x8fffff
\r
698 m_read32_rom12: @ 0x900000 - 0x97ffff
\r
701 m_read32_rom13: @ 0x980000 - 0x9fffff
\r
716 orr r0, r0, r1, lsl #16
\r
722 bxne lr @ invalid read
\r
730 orr r0, r0, r1, lsl #16
\r
735 bic r0, r0, #0xff0000
\r
738 ldrh r1, [r1, #2] @ 2ci
\r
739 orr r0, r1, r0, lsl #16
\r
742 m_read32_above_rom:
\r
743 ldr r2, =PicoRead16Hook
\r
747 stmfd sp!,{r0,r2,lr}
\r
758 orr r0, r0, r1, lsl #16
\r
763 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
765 PicoWriteRomHW_SSF2: @ u32 a, u32 d
\r
767 movs r0, r0, lsr #1
\r
771 ldr r2, =(Pico+0x22211) @ Pico.m.sram_reg
\r
782 ldr r3, =m_read8_def_table
\r
783 ldr r2, =m_read8_table
\r
784 ldr r12, [r3, r1, lsl #2]
\r
785 str r12, [r2, r0, lsl #2]
\r
787 ldr r3, =m_read16_def_table
\r
788 ldr r2, =m_read16_table
\r
789 ldr r12, [r3, r1, lsl #2]
\r
790 str r12, [r2, r0, lsl #2]
\r
792 ldr r3, =m_read32_def_table
\r
793 ldr r2, =m_read32_table
\r
794 ldr r12, [r3, r1, lsl #2]
\r
795 str r12, [r2, r0, lsl #2]
\r
799 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
\r
801 @ Here we only handle most often used locations,
\r
802 @ everything else is passed to generic handlers
\r
804 PicoWrite8: @ u32 a, u8 d
\r
805 bic r0, r0, #0xff000000
\r
806 and r2, r0, #0x00e00000
\r
807 cmp r2, #0x00e00000 @ RAM?
\r
809 biceq r0, r0, #0x00ff0000
\r
811 streqb r1, [r3, r0]
\r
814 m_m68k_write8_misc:
\r
815 bic r2, r0, #0x1f @ most commonly we get i/o port write,
\r
816 cmp r2, #0xa10000 @ so check for it first
\r
822 ldr r3, =(Pico+0x22000) @ Pico.ioports
\r
823 tst r2, #0x20 @ 6 button pad?
\r
824 streqb r1, [r3, r0, lsr #1]
\r
828 bne m_write8_io_done @ not likely to happen
\r
829 add r2, r3, #0x200 @ Pico+0x22200
\r
832 streqb r12,[r2,#0x18]
\r
833 strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0
\r
835 beq m_write8_io_done
\r
836 ldrb r12,[r3, r0, lsr #1]
\r
838 bne m_write8_io_done
\r
840 ldreqb r12,[r2,#0x0a]
\r
841 ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
\r
843 streqb r12,[r2,#0x0a]
\r
844 strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
\r
846 strb r1, [r3, r0, lsr #1]
\r
851 and r2, r0, #0xff0000
\r
852 cmp r2, #0xa00000 @ z80 area?
\r
853 bne m_write8_not_z80
\r
855 bne m_write8_z80_not_ram
\r
856 ldr r3, =(Pico+0x20000) @ Pico.zram
\r
857 add r2, r3, #0x02200 @ Pico+0x22200
\r
858 ldrb r2, [r2, #9] @ Pico.m.z80Run
\r
859 bic r0, r0, #0xff0000
\r
860 bic r0, r0, #0x00e000
\r
862 ldr r2, =SekCycleCnt
\r
863 streqb r1, [r3, r0] @ zram
\r
865 add r0, r0, #2 @ hack?
\r
869 m_write8_z80_not_ram:
\r
870 and r2, r0, #0x6000
\r
872 bne m_write8_z80_not_ym2612
\r
876 mov r2, #0 @ is_from_z80 = 0
\r
881 bl ym2612_write_local
\r
887 str r1, [r2] @ emustatus|=ym2612_write_local(a&3, d);
\r
890 m_write8_z80_not_ym2612: @ not too likely
\r
891 mov r2, r0, lsl #17
\r
894 orr r3, r3, #0x0011
\r
895 cmp r3, r2, lsr #17 @ psg @ z80 area?
\r
897 and r2, r0, #0x7f00
\r
898 cmp r2, #0x6000 @ bank register?
\r
899 bxne lr @ invalid write
\r
901 m_write8_z80_bank_reg:
\r
902 ldr r3, =(Pico+0x22208) @ Pico.m
\r
903 ldrh r2, [r3, #0x0a]
\r
905 orr r2, r1, r2, lsr #1
\r
906 bic r2, r2, #0xfe00
\r
907 strh r2, [r3, #0x0a]
\r
912 and r2, r0, #0xe70000
\r
913 cmp r2, #0xc00000 @ VDP area?
\r
914 bne OtherWrite8 @ passthrough
\r