1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 typedef unsigned char u8;
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23 typedef unsigned short u16;
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24 typedef unsigned int u32;
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26 //#define __debug_io
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27 //#define __debug_io2
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29 //#define rdprintf dprintf
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30 #define rdprintf(...)
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31 //#define wrdprintf dprintf
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32 #define wrdprintf(...)
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34 // -----------------------------------------------------------------
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37 #ifndef _ASM_CD_MEMORY_C
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38 static u32 m68k_reg_read16(u32 a)
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42 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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46 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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49 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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50 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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53 d = Pico_mcd->s68k_regs[4]<<8;
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56 d = *(u16 *)(Pico_mcd->bios + 0x72);
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59 d = Read_CDC_Host(0);
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62 dprintf("m68k FIXME: reserved read");
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65 d = Pico_mcd->m.timer_stopwatch >> 16;
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66 dprintf("m68k stopwatch timer read (%04x)", d);
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71 // comm flag/cmd/status (0xE-0x2F)
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72 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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76 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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80 // dprintf("ret = %04x", d);
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85 #ifndef _ASM_CD_MEMORY_C
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88 void m68k_reg_write8(u32 a, u32 d)
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91 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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96 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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100 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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101 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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102 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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103 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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104 SekResetS68k(); // S68k comes out of RESET or BRQ state
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105 Pico_mcd->m.state_flags&=~1;
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106 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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108 Pico_mcd->m.busreq = d;
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111 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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114 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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115 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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117 if ((dold>>6) != ((d>>6)&3))
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118 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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119 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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120 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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121 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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123 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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125 //dold &= ~2; // ??
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126 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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128 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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131 d |= Pico_mcd->s68k_regs[3]&0x1d;
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132 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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133 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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138 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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141 Pico_mcd->bios[0x72] = d;
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142 dprintf("hint vector set to %08x", PicoRead32(0x70));
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145 //dprintf("m68k: comm flag: %02x", d);
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146 Pico_mcd->s68k_regs[0xe] = d;
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150 if ((a&0xf0) == 0x10) {
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151 Pico_mcd->s68k_regs[a] = d;
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155 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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159 #define READ_FONT_DATA(basemask) \
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161 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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162 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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163 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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164 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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165 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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166 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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170 #ifndef _ASM_CD_MEMORY_C
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173 u32 s68k_reg_read16(u32 a)
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177 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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181 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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184 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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185 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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188 d = CDC_Read_Reg();
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191 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
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194 d = Pico_mcd->m.timer_stopwatch >> 16;
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195 dprintf("s68k stopwatch timer read (%04x)", d);
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198 dprintf("s68k int3 timer read (%02x%02x)", Pico_mcd->s68k_regs[30], Pico_mcd->s68k_regs[31]);
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200 case 0x34: // fader
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201 d = 0; // no busy bit
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203 case 0x50: // font data (check: Lunar 2, Silpheed)
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204 READ_FONT_DATA(0x00100000);
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207 READ_FONT_DATA(0x00010000);
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210 READ_FONT_DATA(0x10000000);
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213 READ_FONT_DATA(0x01000000);
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217 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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221 // dprintf("ret = %04x", d);
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226 #ifndef _ASM_CD_MEMORY_C
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229 void s68k_reg_write8(u32 a, u32 d)
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231 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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233 // TODO: review against Gens
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234 // Warning: d might have upper bits set
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237 return; // only m68k can change WP
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239 int dold = Pico_mcd->s68k_regs[3];
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240 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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244 if ((d ^ dold) & 5) {
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245 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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246 #ifdef _ASM_CD_MEMORY_C
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250 #ifdef _ASM_CD_MEMORY_C
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251 if ((d ^ dold) & 0x1d)
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252 PicoMemResetCDdecode(d);
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255 dprintf("wram mode 2M->1M");
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256 wram_2M_to_1M(Pico_mcd->word_ram2M);
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260 dprintf("wram mode 1M->2M");
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261 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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263 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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265 wram_1M_to_2M(Pico_mcd->word_ram2M);
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266 #ifdef _ASM_CD_MEMORY_C
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272 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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277 dprintf("s68k CDC dest: %x", d&7);
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278 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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281 //dprintf("s68k CDC reg addr: %x", d&0xf);
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287 dprintf("s68k set CDC dma addr");
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291 dprintf("s68k set stopwatch timer");
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292 Pico_mcd->m.timer_stopwatch = 0;
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295 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
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296 Pico_mcd->m.timer_stopwatch = 0;
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299 dprintf("s68k set int3 timer: %02x", d);
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300 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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302 case 0x33: // IRQ mask
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303 dprintf("s68k irq mask: %02x", d);
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304 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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305 CDD_Export_Status();
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308 case 0x34: // fader
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309 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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312 return; // d/m bit is unsetable
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314 u32 d_old = Pico_mcd->s68k_regs[0x37];
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315 Pico_mcd->s68k_regs[0x37] = d&7;
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316 if ((d&4) && !(d_old&4)) {
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317 CDD_Export_Status();
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322 Pico_mcd->s68k_regs[a] = (u8) d;
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323 CDD_Import_Command();
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327 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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329 dprintf("s68k FIXME: invalid write @ %02x?", a);
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333 Pico_mcd->s68k_regs[a] = (u8) d;
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337 #ifndef _ASM_CD_MEMORY_C
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338 static u32 OtherRead16End(u32 a, int realsize)
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342 if ((a&0xffffc0)==0xa12000) {
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343 d=m68k_reg_read16(a);
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347 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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354 static void OtherWrite8End(u32 a, u32 d, int realsize)
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356 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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358 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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362 #undef _ASM_MEMORY_C
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363 #include "../MemoryCmn.c"
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364 #include "cell_map.c"
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365 #endif // !def _ASM_CD_MEMORY_C
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367 // -----------------------------------------------------------------
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368 // Read Rom and read Ram
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370 //u8 PicoReadM68k8_(u32 a);
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371 #ifdef _ASM_CD_MEMORY_C
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372 u8 PicoReadM68k8(u32 a);
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374 static u8 PicoReadM68k8(u32 a)
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378 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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382 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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385 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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386 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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387 d = *(prg_bank+((a^1)&0x1ffff));
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392 if ((a&0xfc0000)==0x200000) {
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393 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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394 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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395 int bank = Pico_mcd->s68k_regs[3]&1;
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397 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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399 d = Pico_mcd->word_ram1M[bank][a^1];
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401 // allow access in any mode, like Gens does
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402 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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404 wrdprintf("ret = %02x", (u8)d);
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408 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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410 if ((a&0xffffc0)==0xa12000)
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411 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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413 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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415 if ((a&0xffffc0)==0xa12000)
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416 rdprintf("ret = %02x", (u8)d);
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421 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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428 #ifdef _ASM_CD_MEMORY_C
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429 u16 PicoReadM68k16(u32 a);
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431 static u16 PicoReadM68k16(u32 a)
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435 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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439 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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442 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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443 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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444 d = *(u16 *)(prg_bank+(a&0x1fffe));
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449 if ((a&0xfc0000)==0x200000) {
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450 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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451 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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452 int bank = Pico_mcd->s68k_regs[3]&1;
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454 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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456 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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458 // allow access in any mode, like Gens does
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459 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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461 wrdprintf("ret = %04x", d);
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465 if ((a&0xffffc0)==0xa12000)
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466 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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468 d = (u16)OtherRead16(a, 16);
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470 if ((a&0xffffc0)==0xa12000)
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471 rdprintf("ret = %04x", d);
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476 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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483 #ifdef _ASM_CD_MEMORY_C
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484 u32 PicoReadM68k32(u32 a);
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486 static u32 PicoReadM68k32(u32 a)
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490 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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494 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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497 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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498 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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499 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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500 d = (pm[0]<<16)|pm[1];
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505 if ((a&0xfc0000)==0x200000) {
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506 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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507 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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508 int bank = Pico_mcd->s68k_regs[3]&1;
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509 if (a >= 0x220000) { // cell arranged
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511 a1 = (a&2) | (cell_map(a >> 2) << 2);
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512 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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514 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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515 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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517 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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520 // allow access in any mode, like Gens does
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521 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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523 wrdprintf("ret = %08x", d);
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527 if ((a&0xffffc0)==0xa12000)
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528 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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530 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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532 if ((a&0xffffc0)==0xa12000)
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533 rdprintf("ret = %08x", d);
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537 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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544 // -----------------------------------------------------------------
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547 #ifdef _ASM_CD_MEMORY_C
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548 void PicoWriteM68k8(u32 a,u8 d);
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550 static void PicoWriteM68k8(u32 a,u8 d)
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553 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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555 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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556 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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559 if ((a&0xe00000)==0xe00000) { // Ram
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560 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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567 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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568 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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569 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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574 if ((a&0xfc0000)==0x200000) {
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575 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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576 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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577 int bank = Pico_mcd->s68k_regs[3]&1;
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579 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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581 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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583 // allow access in any mode, like Gens does
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584 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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589 if ((a&0xffffc0)==0xa12000)
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590 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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592 OtherWrite8(a,d,8);
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597 #ifdef _ASM_CD_MEMORY_C
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598 void PicoWriteM68k16(u32 a,u16 d);
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600 static void PicoWriteM68k16(u32 a,u16 d)
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603 dprintf("w16: %06x, %04x", a&0xffffff, d);
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605 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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607 if ((a&0xe00000)==0xe00000) { // Ram
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608 *(u16 *)(Pico.ram+(a&0xfffe))=d;
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615 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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616 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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617 *(u16 *)(prg_bank+(a&0x1fffe))=d;
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622 if ((a&0xfc0000)==0x200000) {
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623 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
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624 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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625 int bank = Pico_mcd->s68k_regs[3]&1;
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627 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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629 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
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631 // allow access in any mode, like Gens does
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632 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
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637 if ((a&0xffffc0)==0xa12000)
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638 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
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645 #ifdef _ASM_CD_MEMORY_C
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646 void PicoWriteM68k32(u32 a,u32 d);
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648 static void PicoWriteM68k32(u32 a,u32 d)
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651 dprintf("w32: %06x, %08x", a&0xffffff, d);
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654 if ((a&0xe00000)==0xe00000)
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657 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
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658 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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665 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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666 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
667 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
668 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
673 if ((a&0xfc0000)==0x200000) {
\r
674 if (d != 0) // don't log clears
\r
675 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
676 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
677 int bank = Pico_mcd->s68k_regs[3]&1;
\r
678 if (a >= 0x220000) { // cell arranged
\r
680 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
681 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
683 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
684 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
686 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
687 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
690 // allow access in any mode, like Gens does
\r
691 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
692 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
697 if ((a&0xffffc0)==0xa12000)
\r
698 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
700 OtherWrite16(a, (u16)(d>>16));
\r
701 OtherWrite16(a+2,(u16)d);
\r
706 // -----------------------------------------------------------------
\r
708 #ifdef _ASM_CD_MEMORY_C
\r
709 u8 PicoReadS68k8(u32 a);
\r
711 static u8 PicoReadS68k8(u32 a)
\r
719 d = *(Pico_mcd->prg_ram+(a^1));
\r
724 if ((a&0xfffe00) == 0xff8000) {
\r
726 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
727 if (a >= 0x58 && a < 0x68)
\r
728 d = gfx_cd_read(a&~1);
\r
729 else d = s68k_reg_read16(a&~1);
\r
730 if ((a&1)==0) d>>=8;
\r
731 rdprintf("ret = %02x", (u8)d);
\r
735 // word RAM (2M area)
\r
736 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
737 // test: batman returns
\r
738 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
739 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
740 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
741 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
742 if (a&1) d &= 0x0f;
\r
744 dprintf("FIXME: decode");
\r
746 // allow access in any mode, like Gens does
\r
747 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
749 wrdprintf("ret = %02x", (u8)d);
\r
753 // word RAM (1M area)
\r
754 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
756 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
757 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
758 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
759 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
760 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
761 wrdprintf("ret = %02x", (u8)d);
\r
766 if ((a&0xff8000)==0xff0000) {
\r
767 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
770 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
771 else if (a >= 0x20) {
\r
773 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
774 if (a & 2) d >>= 8;
\r
776 dprintf("ret = %02x", (u8)d);
\r
781 if ((a&0xff0000)==0xfe0000) {
\r
782 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
786 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
791 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
798 //u16 PicoReadS68k16_(u32 a);
\r
799 #ifdef _ASM_CD_MEMORY_C
\r
800 u16 PicoReadS68k16(u32 a);
\r
802 static u16 PicoReadS68k16(u32 a)
\r
810 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
815 if ((a&0xfffe00) == 0xff8000) {
\r
817 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
818 if (a >= 0x58 && a < 0x68)
\r
819 d = gfx_cd_read(a);
\r
820 else d = s68k_reg_read16(a);
\r
821 rdprintf("ret = %04x", d);
\r
825 // word RAM (2M area)
\r
826 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
827 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
828 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
829 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
830 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
831 d |= d << 4; d &= ~0xf0;
\r
832 dprintf("FIXME: decode");
\r
834 // allow access in any mode, like Gens does
\r
835 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
837 wrdprintf("ret = %04x", d);
\r
841 // word RAM (1M area)
\r
842 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
844 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
845 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
846 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
847 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
848 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
849 wrdprintf("ret = %04x", d);
\r
854 if ((a&0xff0000)==0xfe0000) {
\r
855 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
857 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
858 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
859 dprintf("ret = %04x", d);
\r
864 if ((a&0xff8000)==0xff0000) {
\r
865 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
868 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
869 else if (a >= 0x20) {
\r
871 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
872 if (a & 2) d >>= 8;
\r
874 dprintf("ret = %04x", d);
\r
878 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
883 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
890 #ifdef _ASM_CD_MEMORY_C
\r
891 u32 PicoReadS68k32(u32 a);
\r
893 static u32 PicoReadS68k32(u32 a)
\r
901 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
902 d = (pm[0]<<16)|pm[1];
\r
907 if ((a&0xfffe00) == 0xff8000) {
\r
909 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
910 if (a >= 0x58 && a < 0x68)
\r
911 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
912 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
913 rdprintf("ret = %08x", d);
\r
917 // word RAM (2M area)
\r
918 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
919 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
920 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
921 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
923 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
924 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
925 d |= d << 4; d &= 0x0f0f0f0f;
\r
926 dprintf("FIXME: decode");
\r
928 // allow access in any mode, like Gens does
\r
929 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
931 wrdprintf("ret = %08x", d);
\r
935 // word RAM (1M area)
\r
936 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
938 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
939 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
940 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
941 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
942 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
943 wrdprintf("ret = %08x", d);
\r
948 if ((a&0xff8000)==0xff0000) {
\r
949 dprintf("FIXME: s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
953 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
954 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
955 } else if (a >= 0x20) {
\r
959 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
960 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
962 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
963 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
966 dprintf("ret = %08x", d);
\r
971 if ((a&0xff0000)==0xfe0000) {
\r
972 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
974 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
975 d|= Pico_mcd->bram[a++] << 24;
\r
976 d|= Pico_mcd->bram[a++];
\r
977 d|= Pico_mcd->bram[a++] << 8;
\r
978 dprintf("ret = %08x", d);
\r
982 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
987 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
994 #ifndef _ASM_CD_MEMORY_C
\r
995 /* check: jaguar xj 220 (draws entire world using decode) */
\r
996 static void decode_write8(u32 a, u8 d, int r3)
\r
998 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
999 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1003 if (!(a&1)) d <<= 4;
\r
1005 //dprintf("FIXME: decode, r3 = %02x", r3);
\r
1008 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1009 } else if (r3 > 8) {
\r
1010 if (d) goto do_it;
\r
1017 *pd = d | (*pd & oldmask);
\r
1021 static void decode_write16(u32 a, u16 d, int r3)
\r
1023 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1025 //if ((a & 0x3ffff) < 0x28000) return;
\r
1033 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1034 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1036 } else if (r3 > 8) {
\r
1038 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1039 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1045 //dprintf("FIXME: decode");
\r
1049 // -----------------------------------------------------------------
\r
1051 //void PicoWriteS68k8_(u32 a,u8 d);
\r
1052 //void PicoWriteS68k8__(u32 a,u8 d);
\r
1053 #ifdef _ASM_CD_MEMORY_C
\r
1054 void PicoWriteS68k8(u32 a,u8 d);
\r
1056 static void PicoWriteS68k8(u32 a,u8 d)
\r
1058 #ifdef __debug_io2
\r
1059 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1064 PicoWriteS68k8_(a, d);
\r
1065 /* if ((a&0xfc0000)!=0x080000) {
\r
1066 PicoWriteS68k8_(a, d);
\r
1069 printf("r3: %02x\n", Pico_mcd->s68k_regs[3]);
\r
1070 PicoWriteS68k8__(a,d);*/
\r
1075 if (a < 0x80000) {
\r
1076 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1082 if ((a&0xfffe00) == 0xff8000) {
\r
1084 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1085 if (a >= 0x58 && a < 0x68)
\r
1086 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1087 else s68k_reg_write8(a,d);
\r
1091 // word RAM (2M area)
\r
1092 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1093 int r3 = Pico_mcd->s68k_regs[3];
\r
1094 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1095 if (r3 & 4) { // 1M decode mode?
\r
1096 decode_write8(a, d, r3);
\r
1098 // allow access in any mode, like Gens does
\r
1099 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1104 // word RAM (1M area)
\r
1105 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1106 // Wing Commander tries to write here in wrong mode
\r
1109 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1110 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1111 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1112 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1113 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1118 if ((a&0xff8000)==0xff0000) {
\r
1121 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1122 else if (a < 0x12)
\r
1123 pcm_write(a>>1, d);
\r
1128 if ((a&0xff0000)==0xfe0000) {
\r
1129 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1134 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1139 #ifdef _ASM_CD_MEMORY_C
\r
1140 void PicoWriteS68k16(u32 a,u16 d);
\r
1142 static void PicoWriteS68k16(u32 a,u16 d)
\r
1144 #ifdef __debug_io2
\r
1145 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1151 if (a < 0x80000) {
\r
1152 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1157 if ((a&0xfffe00) == 0xff8000) {
\r
1159 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1160 if (a >= 0x58 && a < 0x68)
\r
1161 gfx_cd_write16(a, d);
\r
1163 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1164 Pico_mcd->s68k_regs[0xf] = d;
\r
1167 s68k_reg_write8(a, d>>8);
\r
1168 s68k_reg_write8(a+1,d&0xff);
\r
1173 // word RAM (2M area)
\r
1174 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1175 int r3 = Pico_mcd->s68k_regs[3];
\r
1176 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1177 if (r3 & 4) { // 1M decode mode?
\r
1178 decode_write16(a, d, r3);
\r
1180 // allow access in any mode, like Gens does
\r
1181 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1186 // word RAM (1M area)
\r
1187 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1190 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1191 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1192 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1193 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1194 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1199 if ((a&0xff8000)==0xff0000) {
\r
1202 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1203 else if (a < 0x12)
\r
1204 pcm_write(a>>1, d & 0xff);
\r
1209 if ((a&0xff0000)==0xfe0000) {
\r
1210 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1211 a = (a>>1)&0x1fff;
\r
1212 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1213 Pico_mcd->bram[a++] = d >> 8;
\r
1218 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1223 #ifdef _ASM_CD_MEMORY_C
\r
1224 void PicoWriteS68k32(u32 a,u32 d);
\r
1226 static void PicoWriteS68k32(u32 a,u32 d)
\r
1228 #ifdef __debug_io2
\r
1229 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1235 if (a < 0x80000) {
\r
1236 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1237 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1242 if ((a&0xfffe00) == 0xff8000) {
\r
1244 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1245 if (a >= 0x58 && a < 0x68) {
\r
1246 gfx_cd_write16(a, d>>16);
\r
1247 gfx_cd_write16(a+2, d&0xffff);
\r
1249 s68k_reg_write8(a, d>>24);
\r
1250 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1251 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1252 s68k_reg_write8(a+3, d &0xff);
\r
1257 // word RAM (2M area)
\r
1258 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1259 int r3 = Pico_mcd->s68k_regs[3];
\r
1260 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1261 if (r3 & 4) { // 1M decode mode?
\r
1262 decode_write16(a , d >> 16, r3);
\r
1263 decode_write16(a+2, d , r3);
\r
1265 // allow access in any mode, like Gens does
\r
1266 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1267 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1272 // word RAM (1M area)
\r
1273 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1277 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1278 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1279 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1280 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1281 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1282 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1287 if ((a&0xff8000)==0xff0000) {
\r
1289 if (a >= 0x2000) {
\r
1291 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1292 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1293 } else if (a < 0x12) {
\r
1295 pcm_write(a, (d>>16) & 0xff);
\r
1296 pcm_write(a+1, d & 0xff);
\r
1302 if ((a&0xff0000)==0xfe0000) {
\r
1303 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1304 a = (a>>1)&0x1fff;
\r
1305 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1306 Pico_mcd->bram[a++] = d >> 24;
\r
1307 Pico_mcd->bram[a++] = d;
\r
1308 Pico_mcd->bram[a++] = d >> 8;
\r
1313 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1318 // -----------------------------------------------------------------
\r
1321 #if defined(EMU_C68K)
\r
1322 static __inline int PicoMemBaseM68k(u32 pc)
\r
1324 if ((pc&0xe00000)==0xe00000)
\r
1325 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1328 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1330 if ((pc&0xfc0000)==0x200000)
\r
1332 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1333 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1334 if (pc < 0x220000) {
\r
1335 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1336 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1340 // Error - Program Counter is invalid
\r
1341 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1343 return (int)Pico_mcd->bios;
\r
1347 static u32 PicoCheckPcM68k(u32 pc)
\r
1349 pc-=PicoCpu.membase; // Get real pc
\r
1352 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1354 return PicoCpu.membase+pc;
\r
1358 static __inline int PicoMemBaseS68k(u32 pc)
\r
1360 if (pc < 0x80000) // PRG RAM
\r
1361 return (int)Pico_mcd->prg_ram;
\r
1363 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1364 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1366 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1367 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1368 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1371 // Error - Program Counter is invalid
\r
1372 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1374 return (int)Pico_mcd->prg_ram;
\r
1378 static u32 PicoCheckPcS68k(u32 pc)
\r
1380 pc-=PicoCpuS68k.membase; // Get real pc
\r
1383 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1385 return PicoCpuS68k.membase+pc;
\r
1390 void PicoMemSetupCD()
\r
1392 dprintf("PicoMemSetupCD()");
\r
1394 // Setup m68k memory callbacks:
\r
1395 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1396 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1397 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1398 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1399 PicoCpu.write8 =PicoWriteM68k8;
\r
1400 PicoCpu.write16=PicoWriteM68k16;
\r
1401 PicoCpu.write32=PicoWriteM68k32;
\r
1403 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1404 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1405 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1406 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1407 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1408 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1409 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1415 unsigned char PicoReadCD8w (unsigned int a) {
\r
1416 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1418 unsigned short PicoReadCD16w(unsigned int a) {
\r
1419 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1421 unsigned int PicoReadCD32w(unsigned int a) {
\r
1422 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1424 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1425 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1427 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1428 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1430 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1431 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1434 // these are allowed to access RAM
\r
1435 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1437 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1438 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1439 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1440 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1441 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1442 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1443 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1445 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1447 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1448 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1449 if((a&0xfc0000)==0x200000) { // word RAM
\r
1450 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1451 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1452 else if (a < 0x220000) {
\r
1453 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1454 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1457 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1459 return 0;//(u8) lastread_d;
\r
1461 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1463 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1464 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1465 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1466 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1467 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1468 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1469 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1471 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1473 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1474 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1475 if((a&0xfc0000)==0x200000) { // word RAM
\r
1476 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1477 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1478 else if (a < 0x220000) {
\r
1479 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1480 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1483 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1487 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1490 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1491 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1492 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1493 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1494 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1495 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1496 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1497 return (pm[0]<<16)|pm[1];
\r
1499 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1501 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1502 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1503 if((a&0xfc0000)==0x200000) { // word RAM
\r
1504 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1505 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1506 else if (a < 0x220000) {
\r
1507 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1508 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1509 return (pm[0]<<16)|pm[1];
\r
1512 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1516 #endif // EMU_M68K
\r