1 // This is part of Pico Library
\r
3 // (c) Copyright 2004 Dave, All rights reserved.
\r
4 // (c) Copyright 2007 notaz, All rights reserved.
\r
5 // Free for non-commercial use.
\r
7 // For commercial use, separate licencing terms must be obtained.
\r
9 // A68K no longer supported here
\r
11 //#define __debug_io
\r
13 #include "../PicoInt.h"
\r
15 #include "../sound/sound.h"
\r
16 #include "../sound/ym2612.h"
\r
17 #include "../sound/sn76496.h"
\r
22 #include "cell_map.c"
\r
24 typedef unsigned char u8;
\r
25 typedef unsigned short u16;
\r
26 typedef unsigned int u32;
\r
28 //#define __debug_io
\r
29 //#define __debug_io2
\r
30 //#define rdprintf dprintf
\r
31 #define rdprintf(...)
\r
32 //#define wrdprintf dprintf
\r
33 #define wrdprintf(...)
\r
35 // -----------------------------------------------------------------
\r
38 static u32 m68k_reg_read16(u32 a)
\r
42 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
\r
46 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
\r
49 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
\r
50 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
\r
53 d = Pico_mcd->s68k_regs[4]<<8;
\r
56 d = *(u16 *)(Pico_mcd->bios + 0x72);
\r
59 d = Read_CDC_Host(0);
\r
62 dprintf("m68k FIXME: reserved read");
\r
65 dprintf("m68k stopwatch timer read");
\r
66 d = Pico_mcd->m.timer_stopwatch >> 16;
\r
71 // comm flag/cmd/status (0xE-0x2F)
\r
72 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
\r
76 dprintf("m68k_regs FIXME invalid read @ %02x", a);
\r
80 // dprintf("ret = %04x", d);
\r
84 static void m68k_reg_write8(u32 a, u32 d)
\r
87 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
\r
92 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
\r
96 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
\r
97 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
\r
98 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
\r
99 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
\r
100 SekResetS68k(); // S68k comes out of RESET or BRQ state
\r
101 Pico_mcd->m.state_flags&=~1;
\r
102 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
\r
104 Pico_mcd->m.busreq = d;
\r
107 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
\r
110 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
\r
112 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
\r
113 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
\r
114 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
\r
115 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
\r
116 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
\r
117 d |= Pico_mcd->s68k_regs[3]&0x1d;
\r
118 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
\r
119 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
\r
122 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
\r
125 Pico_mcd->bios[0x72] = d;
\r
126 dprintf("hint vector set to %08x", PicoRead32(0x70));
\r
129 //dprintf("m68k: comm flag: %02x", d);
\r
130 Pico_mcd->s68k_regs[0xe] = d;
\r
134 if ((a&0xf0) == 0x10) {
\r
135 Pico_mcd->s68k_regs[a] = d;
\r
139 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
\r
143 #define READ_FONT_DATA(basemask) \
\r
145 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
\r
146 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
\r
147 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
\r
148 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
\r
149 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
\r
150 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
\r
154 static u32 s68k_reg_read16(u32 a)
\r
158 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
\r
162 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
\r
165 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
\r
166 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
\r
169 d = CDC_Read_Reg();
\r
172 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
\r
175 dprintf("s68k stopwatch timer read");
\r
176 d = Pico_mcd->m.timer_stopwatch >> 16;
\r
179 dprintf("s68k int3 timer read");
\r
181 case 0x34: // fader
\r
182 d = 0; // no busy bit
\r
184 case 0x50: // font data (check: Lunar 2, Silpheed)
\r
185 READ_FONT_DATA(0x00100000);
\r
188 READ_FONT_DATA(0x00010000);
\r
191 READ_FONT_DATA(0x10000000);
\r
194 READ_FONT_DATA(0x01000000);
\r
198 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
\r
202 // dprintf("ret = %04x", d);
\r
207 static void s68k_reg_write8(u32 a, u32 d)
\r
209 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
\r
211 // TODO: review against Gens
\r
214 return; // only m68k can change WP
\r
216 int dold = Pico_mcd->s68k_regs[3];
\r
217 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
\r
221 if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
\r
223 dprintf("wram mode 2M->1M");
\r
224 wram_2M_to_1M(Pico_mcd->word_ram2M);
\r
227 d |= Pico_mcd->s68k_regs[3]&0xc3;
\r
228 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
\r
230 dprintf("wram mode 1M->2M");
\r
231 wram_1M_to_2M(Pico_mcd->word_ram2M);
\r
237 dprintf("s68k CDC dest: %x", d&7);
\r
238 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
\r
241 //dprintf("s68k CDC reg addr: %x", d&0xf);
\r
247 dprintf("s68k set CDC dma addr");
\r
251 dprintf("s68k set stopwatch timer");
\r
252 Pico_mcd->m.timer_stopwatch = 0;
\r
255 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
\r
256 Pico_mcd->m.timer_stopwatch = 0;
\r
259 dprintf("s68k set int3 timer: %02x", d);
\r
260 Pico_mcd->m.timer_int3 = d << 16;
\r
262 case 0x33: // IRQ mask
\r
263 dprintf("s68k irq mask: %02x", d);
\r
264 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
\r
265 CDD_Export_Status();
\r
268 case 0x34: // fader
\r
269 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
\r
272 return; // d/m bit is unsetable
\r
274 u32 d_old = Pico_mcd->s68k_regs[0x37];
\r
275 Pico_mcd->s68k_regs[0x37] = d&7;
\r
276 if ((d&4) && !(d_old&4)) {
\r
277 CDD_Export_Status();
\r
282 Pico_mcd->s68k_regs[a] = (u8) d;
\r
283 CDD_Import_Command();
\r
287 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
\r
289 dprintf("s68k FIXME: invalid write @ %02x?", a);
\r
293 Pico_mcd->s68k_regs[a] = (u8) d;
\r
298 static u32 OtherRead16End(u32 a, int realsize)
\r
302 if ((a&0xffffc0)==0xa12000) {
\r
303 d=m68k_reg_read16(a);
\r
307 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
\r
314 static void OtherWrite8End(u32 a, u32 d, int realsize)
\r
316 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
\r
318 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
\r
322 #undef _ASM_MEMORY_C
\r
323 #include "../MemoryCmn.c"
\r
326 // -----------------------------------------------------------------
\r
327 // Read Rom and read Ram
\r
329 u8 PicoReadM68k8(u32 a)
\r
333 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
\r
337 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
\r
340 if ((a&0xfe0000)==0x020000) {
\r
341 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
342 d = *(prg_bank+((a^1)&0x1ffff));
\r
347 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)
\r
351 unsigned short *ram = (unsigned short *) Pico.ram;
\r
352 // unswap and dump RAM
\r
353 for (i = 0; i < 0x10000/2; i++)
\r
354 ram[i] = (ram[i]>>8) | (ram[i]<<8);
\r
355 ff = fopen("ram.bin", "wb");
\r
356 fwrite(ram, 1, 0x10000, ff);
\r
363 if ((a&0xfc0000)==0x200000) {
\r
364 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
\r
365 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
366 int bank = Pico_mcd->s68k_regs[3]&1;
\r
368 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
\r
370 d = Pico_mcd->word_ram1M[bank][a^1];
\r
372 // allow access in any mode, like Gens does
\r
373 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
375 wrdprintf("ret = %02x", (u8)d);
\r
379 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
\r
381 if ((a&0xffffc0)==0xa12000)
\r
382 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
\r
384 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
\r
386 if ((a&0xffffc0)==0xa12000)
\r
387 rdprintf("ret = %02x", (u8)d);
\r
392 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
\r
398 u16 PicoReadM68k16(u32 a)
\r
402 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
\r
406 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
\r
409 if ((a&0xfe0000)==0x020000) {
\r
410 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
411 d = *(u16 *)(prg_bank+(a&0x1fffe));
\r
416 if ((a&0xfc0000)==0x200000) {
\r
417 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
\r
418 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
419 int bank = Pico_mcd->s68k_regs[3]&1;
\r
421 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
423 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
\r
425 // allow access in any mode, like Gens does
\r
426 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
428 wrdprintf("ret = %04x", d);
\r
432 if ((a&0xffffc0)==0xa12000)
\r
433 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
\r
435 d = (u16)OtherRead16(a, 16);
\r
437 if ((a&0xffffc0)==0xa12000)
\r
438 rdprintf("ret = %04x", d);
\r
443 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
449 u32 PicoReadM68k32(u32 a)
\r
453 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
\r
457 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
\r
460 if ((a&0xfe0000)==0x020000) {
\r
461 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
462 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
463 d = (pm[0]<<16)|pm[1];
\r
468 if ((a&0xfc0000)==0x200000) {
\r
469 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
\r
470 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
471 int bank = Pico_mcd->s68k_regs[3]&1;
\r
472 if (a >= 0x220000) { // cell arranged
\r
474 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
475 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
477 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
\r
478 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
\r
480 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
483 // allow access in any mode, like Gens does
\r
484 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
486 wrdprintf("ret = %08x", d);
\r
490 if ((a&0xffffc0)==0xa12000)
\r
491 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
\r
493 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
\r
495 if ((a&0xffffc0)==0xa12000)
\r
496 rdprintf("ret = %08x", d);
\r
500 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
\r
506 // -----------------------------------------------------------------
\r
509 void PicoWriteM68k8(u32 a,u8 d)
\r
512 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
514 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
\r
515 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
518 if ((a&0xe00000)==0xe00000) { // Ram
\r
519 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
\r
526 if ((a&0xfe0000)==0x020000) {
\r
527 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
528 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
\r
533 if ((a&0xfc0000)==0x200000) {
\r
534 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
\r
535 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
536 int bank = Pico_mcd->s68k_regs[3]&1;
\r
538 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
\r
540 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
\r
542 // allow access in any mode, like Gens does
\r
543 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
548 if ((a&0xffffc0)==0xa12000)
\r
549 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
551 OtherWrite8(a,d,8);
\r
555 void PicoWriteM68k16(u32 a,u16 d)
\r
558 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
560 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
562 if ((a&0xe00000)==0xe00000) { // Ram
\r
563 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
570 if ((a&0xfe0000)==0x020000) {
\r
571 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
572 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
577 if ((a&0xfc0000)==0x200000) {
\r
578 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
579 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
580 int bank = Pico_mcd->s68k_regs[3]&1;
\r
582 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
584 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
586 // allow access in any mode, like Gens does
\r
587 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
592 if ((a&0xffffc0)==0xa12000)
\r
593 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
599 void PicoWriteM68k32(u32 a,u32 d)
\r
602 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
605 if ((a&0xe00000)==0xe00000)
\r
608 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
609 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
616 if ((a&0xfe0000)==0x020000) {
\r
617 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
618 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
619 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
624 if ((a&0xfc0000)==0x200000) {
\r
625 if (d != 0) // don't log clears
\r
626 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
627 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
628 int bank = Pico_mcd->s68k_regs[3]&1;
\r
629 if (a >= 0x220000) { // cell arranged
\r
631 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
632 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
634 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
635 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
637 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
638 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
641 // allow access in any mode, like Gens does
\r
642 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
643 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
648 if ((a&0xffffc0)==0xa12000)
\r
649 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
651 OtherWrite16(a, (u16)(d>>16));
\r
652 OtherWrite16(a+2,(u16)d);
\r
656 // -----------------------------------------------------------------
\r
659 u8 PicoReadS68k8(u32 a)
\r
667 d = *(Pico_mcd->prg_ram+(a^1));
\r
672 if ((a&0xfffe00) == 0xff8000) {
\r
674 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
675 if (a >= 0x58 && a < 0x68)
\r
676 d = gfx_cd_read(a&~1);
\r
677 else d = s68k_reg_read16(a&~1);
\r
678 if ((a&1)==0) d>>=8;
\r
679 rdprintf("ret = %02x", (u8)d);
\r
683 // word RAM (2M area)
\r
684 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
685 // test: batman returns
\r
686 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
687 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
688 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
689 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
690 if (a&1) d &= 0x0f;
\r
692 dprintf("FIXME: decode");
\r
694 // allow access in any mode, like Gens does
\r
695 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
697 wrdprintf("ret = %02x", (u8)d);
\r
701 // word RAM (1M area)
\r
702 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
704 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
705 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
706 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
707 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
708 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
709 wrdprintf("ret = %02x", (u8)d);
\r
714 if ((a&0xff8000)==0xff0000) {
\r
715 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
718 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
719 else if (a >= 0x20) {
\r
721 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
722 if (a & 2) d >>= 8;
\r
724 dprintf("ret = %02x", (u8)d);
\r
729 if ((a&0xff0000)==0xfe0000) {
\r
730 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
734 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
739 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
745 u16 PicoReadS68k16(u32 a)
\r
753 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
758 if ((a&0xfffe00) == 0xff8000) {
\r
760 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
761 if (a >= 0x58 && a < 0x68)
\r
762 d = gfx_cd_read(a);
\r
763 else d = s68k_reg_read16(a);
\r
764 rdprintf("ret = %04x", d);
\r
768 // word RAM (2M area)
\r
769 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
770 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
771 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
772 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
773 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
774 d |= d << 4; d &= ~0xf0;
\r
775 dprintf("FIXME: decode");
\r
777 // allow access in any mode, like Gens does
\r
778 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
780 wrdprintf("ret = %04x", d);
\r
784 // word RAM (1M area)
\r
785 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
787 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
788 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
789 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
790 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
791 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
792 wrdprintf("ret = %04x", d);
\r
797 if ((a&0xff0000)==0xfe0000) {
\r
798 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
800 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
801 d|= Pico_mcd->bram[a++] << 8;
\r
802 dprintf("ret = %04x", d);
\r
807 if ((a&0xff8000)==0xff0000) {
\r
808 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
811 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
812 else if (a >= 0x20) {
\r
814 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
815 if (a & 2) d >>= 8;
\r
817 dprintf("ret = %04x", d);
\r
821 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
826 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
832 u32 PicoReadS68k32(u32 a)
\r
840 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
841 d = (pm[0]<<16)|pm[1];
\r
846 if ((a&0xfffe00) == 0xff8000) {
\r
848 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
849 if (a >= 0x58 && a < 0x68)
\r
850 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
851 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
852 rdprintf("ret = %08x", d);
\r
856 // word RAM (2M area)
\r
857 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
858 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
859 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
860 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
862 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
863 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
864 d |= d << 4; d &= 0x0f0f0f0f;
\r
865 dprintf("FIXME: decode");
\r
867 // allow access in any mode, like Gens does
\r
868 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
870 wrdprintf("ret = %08x", d);
\r
874 // word RAM (1M area)
\r
875 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
877 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
878 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
879 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
880 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
881 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
882 wrdprintf("ret = %08x", d);
\r
887 if ((a&0xff8000)==0xff0000) {
\r
888 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
892 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
893 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
894 } else if (a >= 0x20) {
\r
898 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
899 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
901 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
902 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
905 dprintf("ret = %08x", d);
\r
910 if ((a&0xff0000)==0xfe0000) {
\r
911 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
913 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
914 d|= Pico_mcd->bram[a++] << 24;
\r
915 d|= Pico_mcd->bram[a++];
\r
916 d|= Pico_mcd->bram[a++] << 8;
\r
917 dprintf("ret = %08x", d);
\r
921 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
926 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
932 /* check: jaguar xj 220 (draws entire world using decode) */
\r
933 static void decode_write8(u32 a, u8 d, int r3)
\r
935 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
936 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
940 if (!(a&1)) d <<= 4;
\r
942 //dprintf("FIXME: decode, r3 = %02x", r3);
\r
945 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
946 } else if (r3 > 8) {
\r
954 *pd = d | (*pd & oldmask);
\r
958 static void decode_write16(u32 a, u16 d, int r3)
\r
960 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
962 //if ((a & 0x3ffff) < 0x28000) return;
\r
970 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
971 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
973 } else if (r3 > 8) {
\r
975 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
976 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
982 //dprintf("FIXME: decode");
\r
986 // -----------------------------------------------------------------
\r
988 void PicoWriteS68k8(u32 a,u8 d)
\r
991 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
998 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1004 if ((a&0xfffe00) == 0xff8000) {
\r
1006 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1007 if (a >= 0x58 && a < 0x68)
\r
1008 gfx_cd_write(a&~1, (d<<8)|d);
\r
1009 else s68k_reg_write8(a,d);
\r
1013 // word RAM (2M area)
\r
1014 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1015 int r3 = Pico_mcd->s68k_regs[3];
\r
1016 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1017 if (r3 & 4) { // 1M decode mode?
\r
1018 decode_write8(a, d, r3);
\r
1020 // allow access in any mode, like Gens does
\r
1021 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1026 // word RAM (1M area)
\r
1027 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1028 // Wing Commander tries to write here in wrong mode
\r
1031 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1032 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1033 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1034 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1035 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1040 if ((a&0xff8000)==0xff0000) {
\r
1043 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1044 else if (a < 0x12)
\r
1045 pcm_write(a>>1, d);
\r
1050 if ((a&0xff0000)==0xfe0000) {
\r
1051 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1056 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1060 void PicoWriteS68k16(u32 a,u16 d)
\r
1062 #ifdef __debug_io2
\r
1063 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1069 if (a < 0x80000) {
\r
1070 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1075 if ((a&0xfffe00) == 0xff8000) {
\r
1077 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1078 if (a >= 0x58 && a < 0x68)
\r
1079 gfx_cd_write(a, d);
\r
1081 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1082 Pico_mcd->s68k_regs[0xf] = d;
\r
1085 s68k_reg_write8(a, d>>8);
\r
1086 s68k_reg_write8(a+1,d&0xff);
\r
1091 // word RAM (2M area)
\r
1092 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1093 int r3 = Pico_mcd->s68k_regs[3];
\r
1094 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1095 if (r3 & 4) { // 1M decode mode?
\r
1096 decode_write16(a, d, r3);
\r
1098 // allow access in any mode, like Gens does
\r
1099 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1104 // word RAM (1M area)
\r
1105 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1108 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1109 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1110 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1111 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1112 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1117 if ((a&0xff8000)==0xff0000) {
\r
1120 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1121 else if (a < 0x12)
\r
1122 pcm_write(a>>1, d & 0xff);
\r
1127 if ((a&0xff0000)==0xfe0000) {
\r
1128 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1129 a = (a>>1)&0x1fff;
\r
1130 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1131 Pico_mcd->bram[a++] = d >> 8;
\r
1136 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1140 void PicoWriteS68k32(u32 a,u32 d)
\r
1142 #ifdef __debug_io2
\r
1143 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1149 if (a < 0x80000) {
\r
1150 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1151 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1156 if ((a&0xfffe00) == 0xff8000) {
\r
1158 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1159 if (a >= 0x58 && a < 0x68) {
\r
1160 gfx_cd_write(a, d>>16);
\r
1161 gfx_cd_write(a+2, d&0xffff);
\r
1163 s68k_reg_write8(a, d>>24);
\r
1164 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1165 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1166 s68k_reg_write8(a+3, d &0xff);
\r
1171 // word RAM (2M area)
\r
1172 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1173 int r3 = Pico_mcd->s68k_regs[3];
\r
1174 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1175 if (r3 & 4) { // 1M decode mode?
\r
1176 decode_write16(a , d >> 16, r3);
\r
1177 decode_write16(a+2, d , r3);
\r
1179 // allow access in any mode, like Gens does
\r
1180 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1181 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1186 // word RAM (1M area)
\r
1187 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1191 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1192 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1193 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1194 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1195 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1196 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1201 if ((a&0xff8000)==0xff0000) {
\r
1203 if (a >= 0x2000) {
\r
1205 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1206 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1207 } else if (a < 0x12) {
\r
1209 pcm_write(a, (d>>16) & 0xff);
\r
1210 pcm_write(a+1, d & 0xff);
\r
1216 if ((a&0xff0000)==0xfe0000) {
\r
1217 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1218 a = (a>>1)&0x1fff;
\r
1219 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1220 Pico_mcd->bram[a++] = d >> 24;
\r
1221 Pico_mcd->bram[a++] = d;
\r
1222 Pico_mcd->bram[a++] = d >> 8;
\r
1227 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1232 // -----------------------------------------------------------------
\r
1235 #if defined(EMU_C68K)
\r
1236 static __inline int PicoMemBaseM68k(u32 pc)
\r
1238 if ((pc&0xe00000)==0xe00000)
\r
1239 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1242 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1244 if ((pc&0xfc0000)==0x200000)
\r
1246 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1247 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1248 if (pc < 0x220000) {
\r
1249 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1250 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1254 // Error - Program Counter is invalid
\r
1255 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1257 return (int)Pico_mcd->bios;
\r
1261 static u32 PicoCheckPcM68k(u32 pc)
\r
1263 pc-=PicoCpu.membase; // Get real pc
\r
1266 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1268 return PicoCpu.membase+pc;
\r
1272 static __inline int PicoMemBaseS68k(u32 pc)
\r
1274 if (pc < 0x80000) // PRG RAM
\r
1275 return (int)Pico_mcd->prg_ram;
\r
1277 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1278 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1280 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1281 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1282 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1285 // Error - Program Counter is invalid
\r
1286 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1288 return (int)Pico_mcd->prg_ram;
\r
1292 static u32 PicoCheckPcS68k(u32 pc)
\r
1294 pc-=PicoCpuS68k.membase; // Get real pc
\r
1297 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1299 return PicoCpuS68k.membase+pc;
\r
1304 void PicoMemSetupCD()
\r
1306 dprintf("PicoMemSetupCD()");
\r
1308 // Setup m68k memory callbacks:
\r
1309 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1310 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1311 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1312 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1313 PicoCpu.write8 =PicoWriteM68k8;
\r
1314 PicoCpu.write16=PicoWriteM68k16;
\r
1315 PicoCpu.write32=PicoWriteM68k32;
\r
1317 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1318 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1319 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1320 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1321 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1322 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1323 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1329 unsigned char PicoReadCD8w (unsigned int a) {
\r
1330 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1332 unsigned short PicoReadCD16w(unsigned int a) {
\r
1333 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1335 unsigned int PicoReadCD32w(unsigned int a) {
\r
1336 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1338 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1339 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1341 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1342 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1344 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1345 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1348 // these are allowed to access RAM
\r
1349 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1351 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1352 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1353 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1354 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1355 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1356 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1357 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1359 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1361 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1362 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1363 if((a&0xfc0000)==0x200000) { // word RAM
\r
1364 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1365 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1366 else if (a < 0x220000) {
\r
1367 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1368 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1371 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1373 return 0;//(u8) lastread_d;
\r
1375 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1377 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1378 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1379 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1380 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1381 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1382 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1383 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1385 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1387 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1388 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1389 if((a&0xfc0000)==0x200000) { // word RAM
\r
1390 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1391 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1392 else if (a < 0x220000) {
\r
1393 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1394 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1397 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1401 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1404 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1405 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1406 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1407 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1408 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1409 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1410 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1411 return (pm[0]<<16)|pm[1];
\r
1413 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1415 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1416 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1417 if((a&0xfc0000)==0x200000) { // word RAM
\r
1418 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1419 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1420 else if (a < 0x220000) {
\r
1421 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1422 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1423 return (pm[0]<<16)|pm[1];
\r
1426 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1430 #endif // EMU_M68K
\r