1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 typedef unsigned char u8;
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23 typedef unsigned short u16;
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24 typedef unsigned int u32;
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26 //#define __debug_io
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27 //#define __debug_io2
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28 //#define rdprintf dprintf
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29 #define rdprintf(...)
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31 // -----------------------------------------------------------------
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34 static u32 m68k_reg_read16(u32 a)
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38 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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42 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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45 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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46 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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49 d = Pico_mcd->s68k_regs[4]<<8;
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52 d = Pico_mcd->m.hint_vector;
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55 d = Read_CDC_Host(0);
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58 dprintf("m68k reserved read");
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61 dprintf("m68k stopwatch timer read");
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62 d = Pico_mcd->m.timer_stopwatch >> 16;
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67 // comm flag/cmd/status (0xE-0x2F)
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68 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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72 dprintf("m68k_regs invalid read @ %02x", a);
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76 // dprintf("ret = %04x", d);
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80 static void m68k_reg_write8(u32 a, u32 d)
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83 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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88 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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92 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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93 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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94 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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95 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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96 SekResetS68k(); // S68k comes out of RESET or BRQ state
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97 Pico_mcd->m.state_flags&=~1;
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98 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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100 Pico_mcd->m.busreq = d;
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103 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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106 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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108 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
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109 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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110 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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111 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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112 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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113 d |= Pico_mcd->s68k_regs[3]&0x1d;
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114 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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115 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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118 *((char *)&Pico_mcd->m.hint_vector+1) = d;
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119 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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122 *(char *)&Pico_mcd->m.hint_vector = d;
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123 Pico_mcd->bios[0x72] = d;
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126 //dprintf("m68k: comm flag: %02x", d);
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127 Pico_mcd->s68k_regs[0xe] = d;
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131 if ((a&0xf0) == 0x10) {
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132 Pico_mcd->s68k_regs[a] = d;
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136 dprintf("m68k: invalid write? [%02x] %02x", a, d);
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141 static u32 s68k_reg_read16(u32 a)
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145 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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149 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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152 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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153 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
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156 d = CDC_Read_Reg();
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159 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
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162 dprintf("s68k stopwatch timer read");
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163 d = Pico_mcd->m.timer_stopwatch >> 16;
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166 dprintf("s68k int3 timer read");
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168 case 0x34: // fader
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169 d = 0; // no busy bit
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173 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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177 // dprintf("ret = %04x", d);
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182 static void s68k_reg_write8(u32 a, u32 d)
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184 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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186 // TODO: review against Gens
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189 return; // only m68k can change WP
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191 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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194 d |= Pico_mcd->s68k_regs[3]&0xc2;
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195 if ((d ^ Pico_mcd->s68k_regs[3]) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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197 d |= Pico_mcd->s68k_regs[3]&0xc3;
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198 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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202 dprintf("s68k CDC dest: %x", d&7);
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203 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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206 //dprintf("s68k CDC reg addr: %x", d&0xf);
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212 dprintf("s68k set CDC dma addr");
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216 dprintf("s68k set stopwatch timer");
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217 Pico_mcd->m.timer_stopwatch = 0;
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220 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
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221 Pico_mcd->m.timer_stopwatch = 0;
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224 dprintf("s68k set int3 timer: %02x", d);
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225 Pico_mcd->m.timer_int3 = d << 16;
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227 case 0x33: // IRQ mask
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228 dprintf("s68k irq mask: %02x", d);
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229 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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230 CDD_Export_Status();
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233 case 0x34: // fader
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234 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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237 return; // d/m bit is unsetable
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239 u32 d_old = Pico_mcd->s68k_regs[0x37];
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240 Pico_mcd->s68k_regs[0x37] = d&7;
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241 if ((d&4) && !(d_old&4)) {
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242 CDD_Export_Status();
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247 Pico_mcd->s68k_regs[a] = (u8) d;
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248 CDD_Import_Command();
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252 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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254 dprintf("s68k: invalid write @ %02x?", a);
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258 Pico_mcd->s68k_regs[a] = (u8) d;
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265 static int PadRead(int i)
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267 int pad=0,value=0,TH;
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268 pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU
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269 TH=Pico.ioports[i+1]&0x40;
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271 if(PicoOpt & 0x20) { // 6 button gamepad enabled
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272 int phase = Pico.m.padTHPhase[i];
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274 if(phase == 2 && !TH) {
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275 value=(pad&0xc0)>>2; // ?0SA 0000
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277 } else if(phase == 3 && TH) {
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278 value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
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280 } else if(phase == 3 && !TH) {
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281 value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
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286 if(TH) value=(pad&0x3f); // ?1CB RLDU
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287 else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
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291 // orr the bits, which are set as output
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292 value |= Pico.ioports[i+1]&Pico.ioports[i+4];
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294 return value; // will mirror later
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297 static u8 z80Read8(u32 a)
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299 if(Pico.m.z80Run&1) return 0;
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304 // Z80 disabled, do some faking
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305 static u8 zerosent = 0;
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306 if(a == Pico.m.z80_lastaddr) { // probably polling something
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307 u8 d = Pico.m.z80_fakeval;
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308 if((d & 0xf) == 0xf && !zerosent) {
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309 d = 0; zerosent = 1;
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311 Pico.m.z80_fakeval++;
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316 Pico.m.z80_fakeval = 0;
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320 Pico.m.z80_lastaddr = (u16) a;
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321 return Pico.zram[a];
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325 // for nonstandard reads
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326 static u32 UnusualRead16(u32 a, int realsize)
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330 dprintf("unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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333 dprintf("ret = %04x", d);
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337 static u32 OtherRead16(u32 a, int realsize)
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341 if ((a&0xff0000)==0xa00000) {
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342 if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
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343 if ((a&0x6000)==0x4000) { if(PicoOpt&1) d=YM2612Read(); else d=Pico.m.rotate++&3; goto end; } // 0x4000-0x5fff, Fudge if disabled
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344 d=0xffff; goto end;
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346 if ((a&0xffffe0)==0xa10000) { // I/O ports
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349 case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
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350 case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;
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351 case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;
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352 default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
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357 // |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers
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358 if (a==0xa11100) { d=((Pico.m.z80Run&1)<<8)|0x8000|Pico.m.rotate++; goto end; }
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360 if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
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362 if ((a&0xffffc0)==0xa12000) {
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363 d=m68k_reg_read16(a);
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367 d = UnusualRead16(a, realsize);
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373 //extern UINT32 mz80GetRegisterValue(void *, UINT32);
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375 static void OtherWrite8(u32 a,u32 d,int realsize)
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377 if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
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378 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram
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379 if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound
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380 if ((a&0xffffe0)==0xa10000) { // I/O ports
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382 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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385 Pico.m.padDelay[0] = 0;
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386 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
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389 Pico.m.padDelay[1] = 0;
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390 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
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393 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
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397 extern int z80startCycle, z80stopCycle;
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398 //int lineCycles=(488-SekCyclesLeft)&0x1ff;
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401 // hack: detect a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
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402 if((PicoOpt&4) && Pico.m.z80Run==1) z80_run(20);
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403 z80stopCycle = SekCyclesDone();
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404 //z80ExtraCycles += (lineCycles>>1)-(lineCycles>>5); // only meaningful in PicoFrameHints()
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406 z80startCycle = SekCyclesDone();
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407 //if(Pico.m.scanline != -1)
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408 //z80ExtraCycles -= (lineCycles>>1)-(lineCycles>>5)+16;
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410 //dprintf("set_zrun: %i [%i|%i] zPC=%04x @%06x", d, Pico.m.scanline, SekCyclesDone(), mz80GetRegisterValue(NULL, 0), SekPc);
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411 Pico.m.z80Run=(u8)d; return;
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413 if (a==0xa11200) { if(!(d&1)) z80_reset(); return; }
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415 if ((a&0xff7f00)==0xa06000) // Z80 BANK register
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417 Pico.m.z80_bank68k>>=1;
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418 Pico.m.z80_bank68k|=(d&1)<<8;
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419 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
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423 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)(d|(d<<8))); return; } // Byte access gets mirrored
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425 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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427 dprintf("strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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430 static void OtherWrite16(u32 a,u32 d)
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432 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
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433 if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
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435 if ((a&0xffffe0)==0xa10000) { // I/O ports
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437 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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440 Pico.m.padDelay[0] = 0;
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441 if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
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444 Pico.m.padDelay[1] = 0;
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445 if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
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448 Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
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451 if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }
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452 if (a==0xa11200) { if(!(d&0x100)) z80_reset(); return; }
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454 OtherWrite8(a, d>>8, 16);
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455 OtherWrite8(a+1,d&0xff, 16);
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458 // -----------------------------------------------------------------
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459 // Read Rom and read Ram
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461 u8 PicoReadM68k8(u32 a)
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465 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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469 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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472 if ((a&0xfe0000)==0x020000) {
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473 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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474 d = *(prg_bank+((a^1)&0x1ffff));
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479 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)
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483 unsigned short *ram = (unsigned short *) Pico.ram;
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484 // unswap and dump RAM
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485 for (i = 0; i < 0x10000/2; i++)
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486 ram[i] = (ram[i]>>8) | (ram[i]<<8);
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487 ff = fopen("ram.bin", "wb");
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488 fwrite(ram, 1, 0x10000, ff);
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495 if ((a&0xfc0000)==0x200000) {
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496 dprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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497 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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498 if (a >= 0x220000) {
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501 a=((a&0x1fffe)<<1)|(a&1);
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502 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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503 d = Pico_mcd->word_ram[a^1];
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506 // allow access in any mode, like Gens does
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507 d = Pico_mcd->word_ram[(a^1)&0x3ffff];
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509 dprintf("ret = %02x", (u8)d);
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513 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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515 if ((a&0xffffc0)==0xa12000)
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516 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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518 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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520 if ((a&0xffffc0)==0xa12000)
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521 rdprintf("ret = %02x", (u8)d);
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526 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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532 u16 PicoReadM68k16(u32 a)
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536 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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540 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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543 if ((a&0xfe0000)==0x020000) {
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544 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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545 d = *(u16 *)(prg_bank+(a&0x1fffe));
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550 if ((a&0xfc0000)==0x200000) {
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551 dprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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552 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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553 if (a >= 0x220000) {
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556 a=((a&0x1fffe)<<1);
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557 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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558 d = *(u16 *)(Pico_mcd->word_ram+a);
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561 // allow access in any mode, like Gens does
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562 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
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564 dprintf("ret = %04x", d);
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568 if ((a&0xffffc0)==0xa12000)
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569 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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571 d = (u16)OtherRead16(a, 16);
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573 if ((a&0xffffc0)==0xa12000)
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574 rdprintf("ret = %04x", d);
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579 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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585 u32 PicoReadM68k32(u32 a)
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589 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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593 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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596 if ((a&0xfe0000)==0x020000) {
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597 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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598 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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599 d = (pm[0]<<16)|pm[1];
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604 if ((a&0xfc0000)==0x200000) {
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605 dprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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606 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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607 if (a >= 0x220000) {
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610 a=((a&0x1fffe)<<1);
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611 if (Pico_mcd->s68k_regs[3]&1) a+=2;
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612 d = *(u16 *)(Pico_mcd->word_ram+a) << 16;
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613 d |= *(u16 *)(Pico_mcd->word_ram+a+4);
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616 // allow access in any mode, like Gens does
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617 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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619 dprintf("ret = %08x", d);
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623 if ((a&0xffffc0)==0xa12000)
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624 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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626 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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628 if ((a&0xffffc0)==0xa12000)
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629 rdprintf("ret = %08x", d);
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633 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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639 // -----------------------------------------------------------------
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642 void PicoWriteM68k8(u32 a,u8 d)
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645 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
647 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
\r
648 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
\r
651 if ((a&0xe00000)==0xe00000) { // Ram
\r
652 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
\r
659 if ((a&0xfe0000)==0x020000) {
\r
660 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
661 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
\r
666 if ((a&0xfc0000)==0x200000) {
\r
667 dprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
\r
668 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
669 if (a >= 0x220000) {
\r
672 a=((a&0x1fffe)<<1)|(a&1);
\r
673 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
674 *(u8 *)(Pico_mcd->word_ram+(a^1))=d;
\r
677 // allow access in any mode, like Gens does
\r
678 *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;
\r
683 if ((a&0xffffc0)==0xa12000)
\r
684 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
686 OtherWrite8(a,d,8);
\r
690 void PicoWriteM68k16(u32 a,u16 d)
\r
693 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
695 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
697 if ((a&0xe00000)==0xe00000) { // Ram
\r
698 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
705 if ((a&0xfe0000)==0x020000) {
\r
706 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
707 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
712 if ((a&0xfc0000)==0x200000) {
\r
713 dprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
714 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
715 if (a >= 0x220000) {
\r
718 a=((a&0x1fffe)<<1);
\r
719 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
720 *(u16 *)(Pico_mcd->word_ram+a)=d;
\r
723 // allow access in any mode, like Gens does
\r
724 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
\r
729 if ((a&0xffffc0)==0xa12000)
\r
730 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
736 void PicoWriteM68k32(u32 a,u32 d)
\r
739 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
742 if ((a&0xe00000)==0xe00000)
\r
745 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
746 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
753 if ((a&0xfe0000)==0x020000) {
\r
754 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
755 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
756 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
761 if ((a&0xfc0000)==0x200000) {
\r
762 if (d != 0) // don't log clears
\r
763 dprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
764 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
765 if (a >= 0x220000) {
\r
768 a=((a&0x1fffe)<<1);
\r
769 if (Pico_mcd->s68k_regs[3]&1) a+=2;
\r
770 *(u16 *)(Pico_mcd->word_ram+a) = d>>16;
\r
771 *(u16 *)(Pico_mcd->word_ram+a+4) = d;
\r
774 // allow access in any mode, like Gens does
\r
775 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
776 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
781 if ((a&0xffffc0)==0xa12000)
\r
782 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
784 OtherWrite16(a, (u16)(d>>16));
\r
785 OtherWrite16(a+2,(u16)d);
\r
789 // -----------------------------------------------------------------
\r
792 u8 PicoReadS68k8(u32 a)
\r
800 d = *(Pico_mcd->prg_ram+(a^1));
\r
805 if ((a&0xfffe00) == 0xff8000) {
\r
807 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
808 if (a >= 0x50 && a < 0x68)
\r
809 d = gfx_cd_read(a&~1);
\r
810 else d = s68k_reg_read16(a&~1);
\r
811 if ((a&1)==0) d>>=8;
\r
812 rdprintf("ret = %02x", (u8)d);
\r
816 // word RAM (2M area)
\r
817 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
818 dprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
819 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
821 dprintf("(decode)");
\r
823 // allow access in any mode, like Gens does
\r
824 d = Pico_mcd->word_ram[(a^1)&0x3ffff];
\r
826 dprintf("ret = %02x", (u8)d);
\r
830 // word RAM (1M area)
\r
831 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
832 dprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
833 a=((a&0x1fffe)<<1)|(a&1);
\r
834 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
835 d = Pico_mcd->word_ram[a^1];
\r
836 dprintf("ret = %02x", (u8)d);
\r
841 if ((a&0xff8000)==0xff0000) {
\r
842 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
845 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
846 else if (a >= 0x20) {
\r
848 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
849 if (a & 2) d >>= 8;
\r
851 dprintf("ret = %02x", (u8)d);
\r
856 if ((a&0xff0000)==0xfe0000) {
\r
857 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
861 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
866 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
872 u16 PicoReadS68k16(u32 a)
\r
880 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
885 if ((a&0xfffe00) == 0xff8000) {
\r
887 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
888 if (a >= 0x50 && a < 0x68)
\r
889 d = gfx_cd_read(a);
\r
890 else d = s68k_reg_read16(a);
\r
891 rdprintf("ret = %04x", d);
\r
895 // word RAM (2M area)
\r
896 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
897 dprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
898 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
900 dprintf("(decode)");
\r
902 // allow access in any mode, like Gens does
\r
903 d = *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
905 dprintf("ret = %04x", d);
\r
909 // word RAM (1M area)
\r
910 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
911 dprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
912 a=((a&0x1fffe)<<1);
\r
913 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
914 d = *(u16 *)(Pico_mcd->word_ram+a);
\r
915 dprintf("ret = %04x", d);
\r
920 if ((a&0xff0000)==0xfe0000) {
\r
921 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
923 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
924 d|= Pico_mcd->bram[a++] << 8;
\r
925 dprintf("ret = %04x", d);
\r
930 if ((a&0xff8000)==0xff0000) {
\r
931 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
934 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
935 else if (a >= 0x20) {
\r
937 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
938 if (a & 2) d >>= 8;
\r
940 dprintf("ret = %04x", d);
\r
944 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
949 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
955 u32 PicoReadS68k32(u32 a)
\r
963 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
964 d = (pm[0]<<16)|pm[1];
\r
969 if ((a&0xfffe00) == 0xff8000) {
\r
971 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
972 if (a >= 0x50 && a < 0x68)
\r
973 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
974 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
975 rdprintf("ret = %08x", d);
\r
979 // word RAM (2M area)
\r
980 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
981 dprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
982 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
984 dprintf("(decode)");
\r
986 // allow access in any mode, like Gens does
\r
987 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
989 dprintf("ret = %08x", d);
\r
993 // word RAM (1M area)
\r
994 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
995 dprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
996 a=((a&0x1fffe)<<1);
\r
997 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
998 d = *(u16 *)(Pico_mcd->word_ram+a) << 16;
\r
999 d |= *(u16 *)(Pico_mcd->word_ram+a+4);
\r
1000 dprintf("ret = %08x", d);
\r
1005 if ((a&0xff8000)==0xff0000) {
\r
1006 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1008 if (a >= 0x2000) {
\r
1010 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1011 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1012 } else if (a >= 0x20) {
\r
1016 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1017 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1019 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1020 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1023 dprintf("ret = %08x", d);
\r
1028 if ((a&0xff0000)==0xfe0000) {
\r
1029 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1030 a = (a>>1)&0x1fff;
\r
1031 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1032 d|= Pico_mcd->bram[a++] << 24;
\r
1033 d|= Pico_mcd->bram[a++];
\r
1034 d|= Pico_mcd->bram[a++] << 8;
\r
1035 dprintf("ret = %08x", d);
\r
1039 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1043 #ifdef __debug_io2
\r
1044 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1050 // -----------------------------------------------------------------
\r
1052 void PicoWriteS68k8(u32 a,u8 d)
\r
1054 #ifdef __debug_io2
\r
1055 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1061 if (a < 0x80000) {
\r
1062 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1068 if ((a&0xfffe00) == 0xff8000) {
\r
1070 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1071 if (a >= 0x50 && a < 0x68)
\r
1072 gfx_cd_write(a&~1, (d<<8)|d);
\r
1073 else s68k_reg_write8(a,d);
\r
1077 // word RAM (2M area)
\r
1078 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1079 dprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1080 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
1082 dprintf("(decode)");
\r
1084 // allow access in any mode, like Gens does
\r
1085 *(u8 *)(Pico_mcd->word_ram+((a^1)&0x3ffff))=d;
\r
1090 // word RAM (1M area)
\r
1091 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1093 dprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1094 a=((a&0x1fffe)<<1)|(a&1);
\r
1095 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
1096 *(u8 *)(Pico_mcd->word_ram+(a^1))=d;
\r
1101 if ((a&0xff8000)==0xff0000) {
\r
1104 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1105 else if (a < 0x12)
\r
1106 pcm_write(a>>1, d);
\r
1111 if ((a&0xff0000)==0xfe0000) {
\r
1112 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1117 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1121 void PicoWriteS68k16(u32 a,u16 d)
\r
1123 #ifdef __debug_io2
\r
1124 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1130 if (a < 0x80000) {
\r
1131 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1136 if ((a&0xfffe00) == 0xff8000) {
\r
1138 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1139 if (a >= 0x50 && a < 0x68)
\r
1140 gfx_cd_write(a, d);
\r
1142 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1143 Pico_mcd->s68k_regs[0xf] = d;
\r
1146 s68k_reg_write8(a, d>>8);
\r
1147 s68k_reg_write8(a+1,d&0xff);
\r
1152 // word RAM (2M area)
\r
1153 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1154 dprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1155 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
1157 dprintf("(decode)");
\r
1159 // allow access in any mode, like Gens does
\r
1160 *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe))=d;
\r
1165 // word RAM (1M area)
\r
1166 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1168 dprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1169 a=((a&0x1fffe)<<1);
\r
1170 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
1171 *(u16 *)(Pico_mcd->word_ram+a)=d;
\r
1176 if ((a&0xff8000)==0xff0000) {
\r
1179 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1180 else if (a < 0x12)
\r
1181 pcm_write(a>>1, d & 0xff);
\r
1186 if ((a&0xff0000)==0xfe0000) {
\r
1187 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1188 a = (a>>1)&0x1fff;
\r
1189 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1190 Pico_mcd->bram[a++] = d >> 8;
\r
1195 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1199 void PicoWriteS68k32(u32 a,u32 d)
\r
1201 #ifdef __debug_io2
\r
1202 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1208 if (a < 0x80000) {
\r
1209 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1210 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1215 if ((a&0xfffe00) == 0xff8000) {
\r
1217 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1218 if (a >= 0x50 && a < 0x68) {
\r
1219 gfx_cd_write(a, d>>16);
\r
1220 gfx_cd_write(a+2, d&0xffff);
\r
1222 s68k_reg_write8(a, d>>24);
\r
1223 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1224 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1225 s68k_reg_write8(a+3, d &0xff);
\r
1230 // word RAM (2M area)
\r
1231 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1232 dprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1233 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
1235 dprintf("(decode)");
\r
1237 // allow access in any mode, like Gens does
\r
1238 u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
1239 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1244 // word RAM (1M area)
\r
1245 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1247 dprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1248 a=((a&0x1fffe)<<1);
\r
1249 if (!(Pico_mcd->s68k_regs[3]&1)) a+=2;
\r
1250 *(u16 *)(Pico_mcd->word_ram+a) = d>>16;
\r
1251 *(u16 *)(Pico_mcd->word_ram+a+4) = d;
\r
1256 if ((a&0xff8000)==0xff0000) {
\r
1258 if (a >= 0x2000) {
\r
1260 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1261 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1262 } else if (a < 0x12) {
\r
1264 pcm_write(a, (d>>16) & 0xff);
\r
1265 pcm_write(a+1, d & 0xff);
\r
1271 if ((a&0xff0000)==0xfe0000) {
\r
1272 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1273 a = (a>>1)&0x1fff;
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1274 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1275 Pico_mcd->bram[a++] = d >> 24;
\r
1276 Pico_mcd->bram[a++] = d;
\r
1277 Pico_mcd->bram[a++] = d >> 8;
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1282 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
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1287 // -----------------------------------------------------------------
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1290 #if defined(EMU_C68K)
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1291 static __inline int PicoMemBaseM68k(u32 pc)
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1297 membase=(int)Pico_mcd->bios; // Program Counter in BIOS
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1299 else if ((pc&0xe00000)==0xe00000)
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1301 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
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1303 else if ((pc&0xfc0000)==0x200000 && !(Pico_mcd->s68k_regs[3]&4))
\r
1305 membase=(int)Pico_mcd->word_ram-0x200000; // Program Counter in Word Ram
\r
1309 // Error - Program Counter is invalid
\r
1310 dprintf("m68k: unhandled jump to %06x", pc);
\r
1311 membase=(int)Pico.rom;
\r
1318 static u32 PicoCheckPcM68k(u32 pc)
\r
1320 pc-=PicoCpu.membase; // Get real pc
\r
1323 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1325 return PicoCpu.membase+pc;
\r
1329 static __inline int PicoMemBaseS68k(u32 pc)
\r
1333 membase=(int)Pico_mcd->prg_ram; // Program Counter in Prg RAM
\r
1334 if (pc >= 0x80000)
\r
1336 // Error - Program Counter is invalid
\r
1337 dprintf("s68k: unhandled jump to %06x", pc);
\r
1344 static u32 PicoCheckPcS68k(u32 pc)
\r
1346 pc-=PicoCpuS68k.membase; // Get real pc
\r
1349 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1351 return PicoCpuS68k.membase+pc;
\r
1356 void PicoMemSetupCD()
\r
1358 dprintf("PicoMemSetupCD()");
\r
1360 // Setup m68k memory callbacks:
\r
1361 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1362 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
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1363 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1364 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
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1365 PicoCpu.write8 =PicoWriteM68k8;
\r
1366 PicoCpu.write16=PicoWriteM68k16;
\r
1367 PicoCpu.write32=PicoWriteM68k32;
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1369 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1370 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1371 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
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1372 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1373 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1374 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1375 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1381 unsigned char PicoReadCD8w (unsigned int a) {
\r
1382 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
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1384 unsigned short PicoReadCD16w(unsigned int a) {
\r
1385 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1387 unsigned int PicoReadCD32w(unsigned int a) {
\r
1388 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1390 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1391 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1393 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1394 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1396 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1397 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1400 // these are allowed to access RAM
\r
1401 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1403 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1404 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1405 dprintf("s68k_read_pcrelative_CD8: can't handle %06x", a);
\r
1407 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1408 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1409 if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)
\r
1410 return Pico_mcd->word_ram[(a^1)&0x3fffe];
\r
1411 dprintf("m68k_read_pcrelative_CD8: can't handle %06x", a);
\r
1413 return 0;//(u8) lastread_d;
\r
1415 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1417 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1418 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1419 dprintf("s68k_read_pcrelative_CD16: can't handle %06x", a);
\r
1421 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1422 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1423 if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)
\r
1424 return *(u16 *)(Pico_mcd->word_ram+(a&0x3fffe));
\r
1425 dprintf("m68k_read_pcrelative_CD16: can't handle %06x", a);
\r
1429 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1431 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1432 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1433 dprintf("s68k_read_pcrelative_CD32: can't handle %06x", a);
\r
1435 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1436 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1437 if(!(Pico_mcd->s68k_regs[3]&4) && (a&0xfc0000)==0x200000)
\r
1438 { u16 *pm=(u16 *)(Pico_mcd->word_ram+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1439 dprintf("m68k_read_pcrelative_CD32: can't handle %06x", a);
\r
1443 #endif // EMU_M68K
\r