1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 #include "cell_map.c"
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24 typedef unsigned char u8;
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25 typedef unsigned short u16;
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26 typedef unsigned int u32;
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28 //#define __debug_io
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29 //#define __debug_io2
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30 //#define rdprintf dprintf
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31 #define rdprintf(...)
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32 //#define wrdprintf dprintf
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33 #define wrdprintf(...)
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35 // -----------------------------------------------------------------
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38 static u32 m68k_reg_read16(u32 a)
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42 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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46 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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49 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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50 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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53 d = Pico_mcd->s68k_regs[4]<<8;
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56 d = *(u16 *)(Pico_mcd->bios + 0x72);
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59 d = Read_CDC_Host(0);
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62 dprintf("m68k FIXME: reserved read");
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65 dprintf("m68k stopwatch timer read");
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66 d = Pico_mcd->m.timer_stopwatch >> 16;
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71 // comm flag/cmd/status (0xE-0x2F)
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72 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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76 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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80 // dprintf("ret = %04x", d);
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84 static void m68k_reg_write8(u32 a, u32 d)
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87 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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92 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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96 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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97 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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98 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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99 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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100 SekResetS68k(); // S68k comes out of RESET or BRQ state
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101 Pico_mcd->m.state_flags&=~1;
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102 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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104 Pico_mcd->m.busreq = d;
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107 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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110 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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112 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
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113 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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114 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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115 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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116 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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117 d |= Pico_mcd->s68k_regs[3]&0x1d;
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118 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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119 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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122 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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125 Pico_mcd->bios[0x72] = d;
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126 dprintf("hint vector set to %08x", PicoRead32(0x70));
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129 //dprintf("m68k: comm flag: %02x", d);
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130 Pico_mcd->s68k_regs[0xe] = d;
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134 if ((a&0xf0) == 0x10) {
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135 Pico_mcd->s68k_regs[a] = d;
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139 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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143 #define READ_FONT_DATA(basemask) \
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145 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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146 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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147 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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148 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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149 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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150 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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154 static u32 s68k_reg_read16(u32 a)
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158 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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162 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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165 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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166 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
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169 d = CDC_Read_Reg();
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172 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
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175 dprintf("s68k stopwatch timer read");
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176 d = Pico_mcd->m.timer_stopwatch >> 16;
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179 dprintf("s68k int3 timer read");
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181 case 0x34: // fader
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182 d = 0; // no busy bit
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184 case 0x50: // font data (check: Lunar 2, Silpheed)
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185 READ_FONT_DATA(0x00100000);
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188 READ_FONT_DATA(0x00010000);
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191 READ_FONT_DATA(0x10000000);
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194 READ_FONT_DATA(0x01000000);
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198 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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202 // dprintf("ret = %04x", d);
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207 static void s68k_reg_write8(u32 a, u32 d)
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209 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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211 // TODO: review against Gens
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214 return; // only m68k can change WP
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216 int dold = Pico_mcd->s68k_regs[3];
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217 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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221 if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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223 dprintf("wram mode 2M->1M");
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224 wram_2M_to_1M(Pico_mcd->word_ram2M);
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227 d |= Pico_mcd->s68k_regs[3]&0xc3;
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228 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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230 dprintf("wram mode 1M->2M");
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231 wram_1M_to_2M(Pico_mcd->word_ram2M);
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237 dprintf("s68k CDC dest: %x", d&7);
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238 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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241 //dprintf("s68k CDC reg addr: %x", d&0xf);
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247 dprintf("s68k set CDC dma addr");
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251 dprintf("s68k set stopwatch timer");
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252 Pico_mcd->m.timer_stopwatch = 0;
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255 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
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256 Pico_mcd->m.timer_stopwatch = 0;
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259 dprintf("s68k set int3 timer: %02x", d);
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260 Pico_mcd->m.timer_int3 = d << 16;
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262 case 0x33: // IRQ mask
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263 dprintf("s68k irq mask: %02x", d);
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264 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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265 CDD_Export_Status();
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268 case 0x34: // fader
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269 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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272 return; // d/m bit is unsetable
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274 u32 d_old = Pico_mcd->s68k_regs[0x37];
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275 Pico_mcd->s68k_regs[0x37] = d&7;
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276 if ((d&4) && !(d_old&4)) {
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277 CDD_Export_Status();
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282 Pico_mcd->s68k_regs[a] = (u8) d;
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283 CDD_Import_Command();
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287 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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289 dprintf("s68k FIXME: invalid write @ %02x?", a);
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293 Pico_mcd->s68k_regs[a] = (u8) d;
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298 static u32 OtherRead16End(u32 a, int realsize)
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302 if ((a&0xffffc0)==0xa12000) {
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303 d=m68k_reg_read16(a);
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307 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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314 static void OtherWrite8End(u32 a, u32 d, int realsize)
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316 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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318 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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322 #undef _ASM_MEMORY_C
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323 #include "../MemoryCmn.c"
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326 // -----------------------------------------------------------------
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327 // Read Rom and read Ram
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329 u8 PicoReadM68k8(u32 a)
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333 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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337 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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340 if ((a&0xfe0000)==0x020000) {
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341 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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342 d = *(prg_bank+((a^1)&0x1ffff));
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347 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)
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351 unsigned short *ram = (unsigned short *) Pico.ram;
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352 // unswap and dump RAM
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353 for (i = 0; i < 0x10000/2; i++)
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354 ram[i] = (ram[i]>>8) | (ram[i]<<8);
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355 ff = fopen("ram.bin", "wb");
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356 fwrite(ram, 1, 0x10000, ff);
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363 if ((a&0xfc0000)==0x200000) {
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364 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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365 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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366 int bank = Pico_mcd->s68k_regs[3]&1;
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368 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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370 d = Pico_mcd->word_ram1M[bank][a^1];
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372 // allow access in any mode, like Gens does
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373 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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375 wrdprintf("ret = %02x", (u8)d);
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379 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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381 if ((a&0xffffc0)==0xa12000)
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382 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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384 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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386 if ((a&0xffffc0)==0xa12000)
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387 rdprintf("ret = %02x", (u8)d);
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392 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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398 u16 PicoReadM68k16(u32 a)
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402 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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406 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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409 if ((a&0xfe0000)==0x020000) {
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410 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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411 d = *(u16 *)(prg_bank+(a&0x1fffe));
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416 if ((a&0xfc0000)==0x200000) {
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417 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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418 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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419 int bank = Pico_mcd->s68k_regs[3]&1;
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421 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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423 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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426 // allow access in any mode, like Gens does
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427 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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429 wrdprintf("ret = %04x", d);
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433 if ((a&0xffffc0)==0xa12000)
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434 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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436 d = (u16)OtherRead16(a, 16);
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438 if ((a&0xffffc0)==0xa12000)
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439 rdprintf("ret = %04x", d);
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444 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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450 u32 PicoReadM68k32(u32 a)
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454 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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458 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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461 if ((a&0xfe0000)==0x020000) {
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462 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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463 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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464 d = (pm[0]<<16)|pm[1];
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469 if ((a&0xfc0000)==0x200000) {
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470 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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471 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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472 int bank = Pico_mcd->s68k_regs[3]&1;
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473 if (a >= 0x220000) { // cell arranged
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475 a1 = (a&2) | (cell_map(a >> 2) << 2);
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476 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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478 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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479 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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481 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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484 // allow access in any mode, like Gens does
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485 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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487 wrdprintf("ret = %08x", d);
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491 if ((a&0xffffc0)==0xa12000)
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492 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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494 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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496 if ((a&0xffffc0)==0xa12000)
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497 rdprintf("ret = %08x", d);
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501 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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507 // -----------------------------------------------------------------
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510 void PicoWriteM68k8(u32 a,u8 d)
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513 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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515 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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516 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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519 if ((a&0xe00000)==0xe00000) { // Ram
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520 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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527 if ((a&0xfe0000)==0x020000) {
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528 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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529 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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534 if ((a&0xfc0000)==0x200000) {
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535 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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536 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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537 int bank = Pico_mcd->s68k_regs[3]&1;
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539 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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541 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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543 // allow access in any mode, like Gens does
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544 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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549 if ((a&0xffffc0)==0xa12000)
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550 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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552 OtherWrite8(a,d,8);
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556 void PicoWriteM68k16(u32 a,u16 d)
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559 dprintf("w16: %06x, %04x", a&0xffffff, d);
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561 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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563 if ((a&0xe00000)==0xe00000) { // Ram
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564 *(u16 *)(Pico.ram+(a&0xfffe))=d;
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571 if ((a&0xfe0000)==0x020000) {
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572 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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573 *(u16 *)(prg_bank+(a&0x1fffe))=d;
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578 if ((a&0xfc0000)==0x200000) {
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579 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
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580 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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581 int bank = Pico_mcd->s68k_regs[3]&1;
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583 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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585 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
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587 // allow access in any mode, like Gens does
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588 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
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593 if ((a&0xffffc0)==0xa12000)
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594 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
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600 void PicoWriteM68k32(u32 a,u32 d)
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603 dprintf("w32: %06x, %08x", a&0xffffff, d);
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606 if ((a&0xe00000)==0xe00000)
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609 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
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610 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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617 if ((a&0xfe0000)==0x020000) {
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618 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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619 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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620 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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625 if ((a&0xfc0000)==0x200000) {
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626 if (d != 0) // don't log clears
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627 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
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628 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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629 int bank = Pico_mcd->s68k_regs[3]&1;
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630 if (a >= 0x220000) { // cell arranged
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632 a1 = (a&2) | (cell_map(a >> 2) << 2);
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633 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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635 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
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636 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
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638 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
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639 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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642 // allow access in any mode, like Gens does
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643 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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644 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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649 if ((a&0xffffc0)==0xa12000)
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650 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
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652 OtherWrite16(a, (u16)(d>>16));
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653 OtherWrite16(a+2,(u16)d);
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657 // -----------------------------------------------------------------
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660 u8 PicoReadS68k8(u32 a)
\r
668 d = *(Pico_mcd->prg_ram+(a^1));
\r
673 if ((a&0xfffe00) == 0xff8000) {
\r
675 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
676 if (a >= 0x58 && a < 0x68)
\r
677 d = gfx_cd_read(a&~1);
\r
678 else d = s68k_reg_read16(a&~1);
\r
679 if ((a&1)==0) d>>=8;
\r
680 rdprintf("ret = %02x", (u8)d);
\r
684 // word RAM (2M area)
\r
685 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
686 // test: batman returns
\r
687 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
688 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
689 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
690 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
691 if (a&1) d &= 0x0f;
\r
693 dprintf("FIXME: decode");
\r
695 // allow access in any mode, like Gens does
\r
696 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
698 wrdprintf("ret = %02x", (u8)d);
\r
702 // word RAM (1M area)
\r
703 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
705 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
706 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
707 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
708 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
709 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
710 wrdprintf("ret = %02x", (u8)d);
\r
715 if ((a&0xff8000)==0xff0000) {
\r
716 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
719 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
720 else if (a >= 0x20) {
\r
722 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
723 if (a & 2) d >>= 8;
\r
725 dprintf("ret = %02x", (u8)d);
\r
730 if ((a&0xff0000)==0xfe0000) {
\r
731 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
735 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
740 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
746 u16 PicoReadS68k16(u32 a)
\r
754 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
759 if ((a&0xfffe00) == 0xff8000) {
\r
761 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
762 if (a >= 0x58 && a < 0x68)
\r
763 d = gfx_cd_read(a);
\r
764 else d = s68k_reg_read16(a);
\r
765 rdprintf("ret = %04x", d);
\r
769 // word RAM (2M area)
\r
770 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
771 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
772 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
773 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
774 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
775 d |= d << 4; d &= ~0xf0;
\r
776 dprintf("FIXME: decode");
\r
778 // allow access in any mode, like Gens does
\r
779 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
781 wrdprintf("ret = %04x", d);
\r
785 // word RAM (1M area)
\r
786 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
788 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
789 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
790 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
791 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
792 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
793 wrdprintf("ret = %04x", d);
\r
798 if ((a&0xff0000)==0xfe0000) {
\r
799 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
801 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
802 d|= Pico_mcd->bram[a++] << 8;
\r
803 dprintf("ret = %04x", d);
\r
808 if ((a&0xff8000)==0xff0000) {
\r
809 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
812 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
813 else if (a >= 0x20) {
\r
815 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
816 if (a & 2) d >>= 8;
\r
818 dprintf("ret = %04x", d);
\r
822 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
827 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
833 u32 PicoReadS68k32(u32 a)
\r
841 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
842 d = (pm[0]<<16)|pm[1];
\r
847 if ((a&0xfffe00) == 0xff8000) {
\r
849 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
850 if (a >= 0x58 && a < 0x68)
\r
851 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
852 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
853 rdprintf("ret = %08x", d);
\r
857 // word RAM (2M area)
\r
858 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
859 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
860 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
861 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
863 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
864 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
865 d |= d << 4; d &= 0x0f0f0f0f;
\r
866 dprintf("FIXME: decode");
\r
868 // allow access in any mode, like Gens does
\r
869 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
871 wrdprintf("ret = %08x", d);
\r
875 // word RAM (1M area)
\r
876 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
878 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
879 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
880 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
881 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
882 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
883 wrdprintf("ret = %08x", d);
\r
888 if ((a&0xff8000)==0xff0000) {
\r
889 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
893 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
894 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
895 } else if (a >= 0x20) {
\r
899 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
900 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
902 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
903 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
906 dprintf("ret = %08x", d);
\r
911 if ((a&0xff0000)==0xfe0000) {
\r
912 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
914 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
915 d|= Pico_mcd->bram[a++] << 24;
\r
916 d|= Pico_mcd->bram[a++];
\r
917 d|= Pico_mcd->bram[a++] << 8;
\r
918 dprintf("ret = %08x", d);
\r
922 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
927 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
933 /* check: jaguar xj 220 (draws entire world using decode) */
\r
934 static void decode_write8(u32 a, u8 d, int r3)
\r
936 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
937 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
939 //if ((a & 0x3ffff) < 0x28000) return;
\r
944 if (!(a&1)) d <<= 4;
\r
946 //dprintf("FIXME: decode, r3 = %02x", r3);
\r
949 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
950 } else if (r3 > 8) {
\r
958 *pd = d | (*pd & oldmask);
\r
962 static void decode_write16(u32 a, u16 d, int r3)
\r
964 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
966 //if ((a & 0x3ffff) < 0x28000) return;
\r
974 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
975 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
977 } else if (r3 > 8) {
\r
979 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
980 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
986 //dprintf("FIXME: decode");
\r
990 // -----------------------------------------------------------------
\r
992 void PicoWriteS68k8(u32 a,u8 d)
\r
995 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1001 if (a < 0x80000) {
\r
1002 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1008 if ((a&0xfffe00) == 0xff8000) {
\r
1010 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1011 if (a >= 0x58 && a < 0x68)
\r
1012 gfx_cd_write(a&~1, (d<<8)|d);
\r
1013 else s68k_reg_write8(a,d);
\r
1017 // word RAM (2M area)
\r
1018 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1019 int r3 = Pico_mcd->s68k_regs[3];
\r
1020 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1021 if (r3 & 4) { // 1M decode mode?
\r
1022 decode_write8(a, d, r3);
\r
1024 // allow access in any mode, like Gens does
\r
1025 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1030 // word RAM (1M area)
\r
1031 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1032 // Wing Commander tries to write here in wrong mode
\r
1035 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1036 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1037 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1038 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1039 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1044 if ((a&0xff8000)==0xff0000) {
\r
1047 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1048 else if (a < 0x12)
\r
1049 pcm_write(a>>1, d);
\r
1054 if ((a&0xff0000)==0xfe0000) {
\r
1055 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1060 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1064 void PicoWriteS68k16(u32 a,u16 d)
\r
1066 #ifdef __debug_io2
\r
1067 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1073 if (a < 0x80000) {
\r
1074 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1079 if ((a&0xfffe00) == 0xff8000) {
\r
1081 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1082 if (a >= 0x58 && a < 0x68)
\r
1083 gfx_cd_write(a, d);
\r
1085 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1086 Pico_mcd->s68k_regs[0xf] = d;
\r
1089 s68k_reg_write8(a, d>>8);
\r
1090 s68k_reg_write8(a+1,d&0xff);
\r
1095 // word RAM (2M area)
\r
1096 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1097 int r3 = Pico_mcd->s68k_regs[3];
\r
1098 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1099 if (r3 & 4) { // 1M decode mode?
\r
1100 decode_write16(a, d, r3);
\r
1102 // allow access in any mode, like Gens does
\r
1103 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1108 // word RAM (1M area)
\r
1109 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1112 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1113 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1114 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1115 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1116 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1121 if ((a&0xff8000)==0xff0000) {
\r
1124 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1125 else if (a < 0x12)
\r
1126 pcm_write(a>>1, d & 0xff);
\r
1131 if ((a&0xff0000)==0xfe0000) {
\r
1132 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1133 a = (a>>1)&0x1fff;
\r
1134 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1135 Pico_mcd->bram[a++] = d >> 8;
\r
1140 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1144 void PicoWriteS68k32(u32 a,u32 d)
\r
1146 #ifdef __debug_io2
\r
1147 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1153 if (a < 0x80000) {
\r
1154 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1155 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1160 if ((a&0xfffe00) == 0xff8000) {
\r
1162 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1163 if (a >= 0x58 && a < 0x68) {
\r
1164 gfx_cd_write(a, d>>16);
\r
1165 gfx_cd_write(a+2, d&0xffff);
\r
1167 s68k_reg_write8(a, d>>24);
\r
1168 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1169 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1170 s68k_reg_write8(a+3, d &0xff);
\r
1175 // word RAM (2M area)
\r
1176 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1177 int r3 = Pico_mcd->s68k_regs[3];
\r
1178 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1179 if (r3 & 4) { // 1M decode mode?
\r
1180 decode_write16(a , d >> 16, r3);
\r
1181 decode_write16(a+2, d , r3);
\r
1183 // allow access in any mode, like Gens does
\r
1184 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1185 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1190 // word RAM (1M area)
\r
1191 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1195 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1196 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1197 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1198 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1199 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1200 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1205 if ((a&0xff8000)==0xff0000) {
\r
1207 if (a >= 0x2000) {
\r
1209 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1210 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1211 } else if (a < 0x12) {
\r
1213 pcm_write(a, (d>>16) & 0xff);
\r
1214 pcm_write(a+1, d & 0xff);
\r
1220 if ((a&0xff0000)==0xfe0000) {
\r
1221 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1222 a = (a>>1)&0x1fff;
\r
1223 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1224 Pico_mcd->bram[a++] = d >> 24;
\r
1225 Pico_mcd->bram[a++] = d;
\r
1226 Pico_mcd->bram[a++] = d >> 8;
\r
1231 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1236 // -----------------------------------------------------------------
\r
1239 #if defined(EMU_C68K)
\r
1240 static __inline int PicoMemBaseM68k(u32 pc)
\r
1242 if ((pc&0xe00000)==0xe00000)
\r
1243 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1246 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1248 if ((pc&0xfc0000)==0x200000)
\r
1250 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1251 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1252 if (pc < 0x220000) {
\r
1253 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1254 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1258 // Error - Program Counter is invalid
\r
1259 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1261 return (int)Pico_mcd->bios;
\r
1265 static u32 PicoCheckPcM68k(u32 pc)
\r
1267 pc-=PicoCpu.membase; // Get real pc
\r
1270 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1272 return PicoCpu.membase+pc;
\r
1276 static __inline int PicoMemBaseS68k(u32 pc)
\r
1278 if (pc < 0x80000) // PRG RAM
\r
1279 return (int)Pico_mcd->prg_ram;
\r
1281 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1282 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1284 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1285 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1286 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1289 // Error - Program Counter is invalid
\r
1290 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1292 return (int)Pico_mcd->prg_ram;
\r
1296 static u32 PicoCheckPcS68k(u32 pc)
\r
1298 pc-=PicoCpuS68k.membase; // Get real pc
\r
1301 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1303 return PicoCpuS68k.membase+pc;
\r
1308 void PicoMemSetupCD()
\r
1310 dprintf("PicoMemSetupCD()");
\r
1312 // Setup m68k memory callbacks:
\r
1313 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1314 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1315 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1316 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1317 PicoCpu.write8 =PicoWriteM68k8;
\r
1318 PicoCpu.write16=PicoWriteM68k16;
\r
1319 PicoCpu.write32=PicoWriteM68k32;
\r
1321 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1322 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1323 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1324 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1325 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1326 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1327 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1333 unsigned char PicoReadCD8w (unsigned int a) {
\r
1334 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1336 unsigned short PicoReadCD16w(unsigned int a) {
\r
1337 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1339 unsigned int PicoReadCD32w(unsigned int a) {
\r
1340 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1342 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1343 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1345 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1346 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1348 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1349 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1352 // these are allowed to access RAM
\r
1353 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1355 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1356 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1357 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1358 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1359 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1360 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1361 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1363 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1365 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1366 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1367 if((a&0xfc0000)==0x200000) { // word RAM
\r
1368 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1369 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1370 else if (a < 0x220000) {
\r
1371 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1372 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1375 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1377 return 0;//(u8) lastread_d;
\r
1379 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1381 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1382 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1383 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1384 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1385 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1386 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1387 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1389 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1391 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1392 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1393 if((a&0xfc0000)==0x200000) { // word RAM
\r
1394 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1395 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1396 else if (a < 0x220000) {
\r
1397 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1398 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1401 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1405 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1408 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1409 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1410 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1411 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1412 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1413 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1414 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1415 return (pm[0]<<16)|pm[1];
\r
1417 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1419 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1420 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1421 if((a&0xfc0000)==0x200000) { // word RAM
\r
1422 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1423 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1424 else if (a < 0x220000) {
\r
1425 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1426 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1427 return (pm[0]<<16)|pm[1];
\r
1430 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1434 #endif // EMU_M68K
\r