1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 typedef unsigned char u8;
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23 typedef unsigned short u16;
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24 typedef unsigned int u32;
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26 //#define __debug_io
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27 //#define __debug_io2
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29 //#define rdprintf dprintf
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30 #define rdprintf(...)
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31 //#define wrdprintf dprintf
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32 #define wrdprintf(...)
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34 // -----------------------------------------------------------------
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37 #define USE_POLL_DETECT
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38 #define POLL_LIMIT 16
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39 #define POLL_CYCLES 124
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40 // int m68k_poll_addr, m68k_poll_cnt;
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41 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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43 #ifndef _ASM_CD_MEMORY_C
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44 static u32 m68k_reg_read16(u32 a)
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48 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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52 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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55 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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56 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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59 d = Pico_mcd->s68k_regs[4]<<8;
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62 d = *(u16 *)(Pico_mcd->bios + 0x72);
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65 d = Read_CDC_Host(0);
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68 dprintf("m68k FIXME: reserved read");
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71 d = Pico_mcd->m.timer_stopwatch >> 16;
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72 dprintf("m68k stopwatch timer read (%04x)", d);
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77 // comm flag/cmd/status (0xE-0x2F)
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78 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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82 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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86 // dprintf("ret = %04x", d);
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91 #ifndef _ASM_CD_MEMORY_C
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94 void m68k_reg_write8(u32 a, u32 d)
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97 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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102 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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106 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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107 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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108 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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109 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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110 SekResetS68k(); // S68k comes out of RESET or BRQ state
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111 Pico_mcd->m.state_flags&=~1;
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112 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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114 Pico_mcd->m.busreq = d;
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117 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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120 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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121 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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123 if ((dold>>6) != ((d>>6)&3))
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124 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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125 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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126 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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127 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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129 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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131 //dold &= ~2; // ??
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132 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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134 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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135 #ifdef USE_POLL_DETECT
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136 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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137 SekSetStopS68k(0); s68k_poll_adclk = 0;
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138 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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144 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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147 Pico_mcd->bios[0x72] = d;
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148 dprintf("hint vector set to %08x", PicoRead32(0x70));
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151 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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153 //dprintf("m68k: comm flag: %02x", d);
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154 Pico_mcd->s68k_regs[0xe] = d;
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155 #ifdef USE_POLL_DETECT
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156 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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157 SekSetStopS68k(0); s68k_poll_adclk = 0;
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158 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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164 if ((a&0xf0) == 0x10) {
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165 Pico_mcd->s68k_regs[a] = d;
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166 #ifdef USE_POLL_DETECT
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167 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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168 SekSetStopS68k(0); s68k_poll_adclk = 0;
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169 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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175 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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179 #define READ_FONT_DATA(basemask) \
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181 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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182 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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183 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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184 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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185 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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186 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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190 #ifndef _ASM_CD_MEMORY_C
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193 u32 s68k_reg_read16(u32 a)
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197 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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201 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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203 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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204 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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207 return CDC_Read_Reg();
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209 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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211 d = Pico_mcd->m.timer_stopwatch >> 16;
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212 dprintf("s68k stopwatch timer read (%04x)", d);
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215 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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216 return Pico_mcd->s68k_regs[31];
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217 case 0x34: // fader
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218 return 0; // no busy bit
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219 case 0x50: // font data (check: Lunar 2, Silpheed)
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220 READ_FONT_DATA(0x00100000);
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223 READ_FONT_DATA(0x00010000);
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226 READ_FONT_DATA(0x10000000);
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229 READ_FONT_DATA(0x01000000);
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233 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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235 if (a >= 0x0e && a < 0x30) goto poll_detect;
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240 #ifdef USE_POLL_DETECT
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241 // polling detection
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242 if (a == (s68k_poll_adclk&0xfe)) {
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243 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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244 if (clkdiff <= POLL_CYCLES) {
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246 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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247 if (s68k_poll_cnt > POLL_LIMIT) {
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249 //printf("%05i:%03i: s68k poll detected @ %06x, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, SekPcS68k, a);
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251 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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255 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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262 #ifndef _ASM_CD_MEMORY_C
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265 void s68k_reg_write8(u32 a, u32 d)
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267 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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269 // TODO: review against Gens
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270 // Warning: d might have upper bits set
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273 return; // only m68k can change WP
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275 int dold = Pico_mcd->s68k_regs[3];
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276 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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280 if ((d ^ dold) & 5) {
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281 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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282 #ifdef _ASM_CD_MEMORY_C
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286 #ifdef _ASM_CD_MEMORY_C
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287 if ((d ^ dold) & 0x1d)
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288 PicoMemResetCDdecode(d);
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291 dprintf("wram mode 2M->1M");
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292 wram_2M_to_1M(Pico_mcd->word_ram2M);
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296 dprintf("wram mode 1M->2M");
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297 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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299 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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301 wram_1M_to_2M(Pico_mcd->word_ram2M);
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302 #ifdef _ASM_CD_MEMORY_C
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308 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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313 dprintf("s68k CDC dest: %x", d&7);
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314 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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317 //dprintf("s68k CDC reg addr: %x", d&0xf);
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323 dprintf("s68k set CDC dma addr");
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327 dprintf("s68k set stopwatch timer");
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328 Pico_mcd->m.timer_stopwatch = 0;
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331 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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334 dprintf("s68k set int3 timer: %02x", d);
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335 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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337 case 0x33: // IRQ mask
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338 dprintf("s68k irq mask: %02x", d);
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339 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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340 CDD_Export_Status();
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343 case 0x34: // fader
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344 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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347 return; // d/m bit is unsetable
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349 u32 d_old = Pico_mcd->s68k_regs[0x37];
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350 Pico_mcd->s68k_regs[0x37] = d&7;
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351 if ((d&4) && !(d_old&4)) {
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352 CDD_Export_Status();
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357 Pico_mcd->s68k_regs[a] = (u8) d;
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358 CDD_Import_Command();
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362 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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364 dprintf("s68k FIXME: invalid write @ %02x?", a);
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368 Pico_mcd->s68k_regs[a] = (u8) d;
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372 #ifndef _ASM_CD_MEMORY_C
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373 static u32 OtherRead16End(u32 a, int realsize)
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377 if ((a&0xffffc0)==0xa12000) {
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378 d=m68k_reg_read16(a);
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382 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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389 static void OtherWrite8End(u32 a, u32 d, int realsize)
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391 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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393 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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397 #undef _ASM_MEMORY_C
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398 #include "../MemoryCmn.c"
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399 #include "cell_map.c"
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400 #endif // !def _ASM_CD_MEMORY_C
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402 // -----------------------------------------------------------------
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403 // Read Rom and read Ram
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405 //u8 PicoReadM68k8_(u32 a);
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406 #ifdef _ASM_CD_MEMORY_C
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407 u8 PicoReadM68k8(u32 a);
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409 static u8 PicoReadM68k8(u32 a)
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413 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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417 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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420 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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421 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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422 d = *(prg_bank+((a^1)&0x1ffff));
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427 if ((a&0xfc0000)==0x200000) {
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428 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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429 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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430 int bank = Pico_mcd->s68k_regs[3]&1;
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432 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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434 d = Pico_mcd->word_ram1M[bank][a^1];
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436 // allow access in any mode, like Gens does
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437 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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439 wrdprintf("ret = %02x", (u8)d);
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443 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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445 if ((a&0xffffc0)==0xa12000)
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446 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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448 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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450 if ((a&0xffffc0)==0xa12000)
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451 rdprintf("ret = %02x", (u8)d);
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456 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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463 #ifdef _ASM_CD_MEMORY_C
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464 u16 PicoReadM68k16(u32 a);
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466 static u16 PicoReadM68k16(u32 a)
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470 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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474 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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477 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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478 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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479 d = *(u16 *)(prg_bank+(a&0x1fffe));
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484 if ((a&0xfc0000)==0x200000) {
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485 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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486 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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487 int bank = Pico_mcd->s68k_regs[3]&1;
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489 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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491 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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493 // allow access in any mode, like Gens does
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494 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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496 wrdprintf("ret = %04x", d);
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500 if ((a&0xffffc0)==0xa12000)
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501 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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503 d = (u16)OtherRead16(a, 16);
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505 if ((a&0xffffc0)==0xa12000)
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506 rdprintf("ret = %04x", d);
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511 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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518 #ifdef _ASM_CD_MEMORY_C
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519 u32 PicoReadM68k32(u32 a);
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521 static u32 PicoReadM68k32(u32 a)
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525 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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529 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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532 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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533 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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534 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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535 d = (pm[0]<<16)|pm[1];
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540 if ((a&0xfc0000)==0x200000) {
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541 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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542 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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543 int bank = Pico_mcd->s68k_regs[3]&1;
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544 if (a >= 0x220000) { // cell arranged
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546 a1 = (a&2) | (cell_map(a >> 2) << 2);
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547 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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549 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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550 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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552 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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555 // allow access in any mode, like Gens does
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556 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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558 wrdprintf("ret = %08x", d);
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562 if ((a&0xffffc0)==0xa12000)
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563 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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565 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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567 if ((a&0xffffc0)==0xa12000)
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568 rdprintf("ret = %08x", d);
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572 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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579 // -----------------------------------------------------------------
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582 #ifdef _ASM_CD_MEMORY_C
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583 void PicoWriteM68k8(u32 a,u8 d);
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585 static void PicoWriteM68k8(u32 a,u8 d)
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588 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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590 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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591 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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594 if ((a&0xe00000)==0xe00000) { // Ram
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595 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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602 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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603 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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604 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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609 if ((a&0xfc0000)==0x200000) {
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610 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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611 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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612 int bank = Pico_mcd->s68k_regs[3]&1;
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614 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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616 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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618 // allow access in any mode, like Gens does
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619 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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624 if ((a&0xffffc0)==0xa12000)
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625 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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627 OtherWrite8(a,d,8);
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632 #ifdef _ASM_CD_MEMORY_C
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633 void PicoWriteM68k16(u32 a,u16 d);
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635 static void PicoWriteM68k16(u32 a,u16 d)
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638 dprintf("w16: %06x, %04x", a&0xffffff, d);
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640 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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642 if ((a&0xe00000)==0xe00000) { // Ram
\r
643 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
650 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
\r
651 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
652 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
657 if ((a&0xfc0000)==0x200000) {
\r
658 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
659 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
660 int bank = Pico_mcd->s68k_regs[3]&1;
\r
662 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
664 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
666 // allow access in any mode, like Gens does
\r
667 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
673 if ((a&0xffffc0)==0xa12000) {
\r
674 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
675 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
676 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
677 #ifdef USE_POLL_DETECT
\r
678 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
679 SekSetStopS68k(0); s68k_poll_adclk = -1;
\r
680 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
\r
685 m68k_reg_write8(a, d>>8);
\r
686 m68k_reg_write8(a+1,d&0xff);
\r
695 #ifdef _ASM_CD_MEMORY_C
\r
696 void PicoWriteM68k32(u32 a,u32 d);
\r
698 static void PicoWriteM68k32(u32 a,u32 d)
\r
701 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
704 if ((a&0xe00000)==0xe00000)
\r
707 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
708 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
715 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
\r
716 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
717 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
718 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
723 if ((a&0xfc0000)==0x200000) {
\r
724 if (d != 0) // don't log clears
\r
725 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
726 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
727 int bank = Pico_mcd->s68k_regs[3]&1;
\r
728 if (a >= 0x220000) { // cell arranged
\r
730 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
731 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
733 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
734 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
736 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
737 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
740 // allow access in any mode, like Gens does
\r
741 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
742 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
747 if ((a&0xffffc0)==0xa12000)
\r
748 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
750 OtherWrite16(a, (u16)(d>>16));
\r
751 OtherWrite16(a+2,(u16)d);
\r
756 // -----------------------------------------------------------------
\r
758 #ifdef _ASM_CD_MEMORY_C
\r
759 u8 PicoReadS68k8(u32 a);
\r
761 static u8 PicoReadS68k8(u32 a)
\r
769 d = *(Pico_mcd->prg_ram+(a^1));
\r
774 if ((a&0xfffe00) == 0xff8000) {
\r
776 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
777 if (a >= 0x58 && a < 0x68)
\r
778 d = gfx_cd_read(a&~1);
\r
779 else d = s68k_reg_read16(a&~1);
\r
780 if ((a&1)==0) d>>=8;
\r
781 rdprintf("ret = %02x", (u8)d);
\r
785 // word RAM (2M area)
\r
786 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
787 // test: batman returns
\r
788 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
789 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
790 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
791 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
792 if (a&1) d &= 0x0f;
\r
794 dprintf("FIXME: decode");
\r
796 // allow access in any mode, like Gens does
\r
797 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
799 wrdprintf("ret = %02x", (u8)d);
\r
803 // word RAM (1M area)
\r
804 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
806 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
807 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
808 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
809 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
810 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
811 wrdprintf("ret = %02x", (u8)d);
\r
816 if ((a&0xff8000)==0xff0000) {
\r
817 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
820 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
821 else if (a >= 0x20) {
\r
823 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
824 if (a & 2) d >>= 8;
\r
826 dprintf("ret = %02x", (u8)d);
\r
831 if ((a&0xff0000)==0xfe0000) {
\r
832 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
836 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
841 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
848 //u16 PicoReadS68k16_(u32 a);
\r
849 #ifdef _ASM_CD_MEMORY_C
\r
850 u16 PicoReadS68k16(u32 a);
\r
852 static u16 PicoReadS68k16(u32 a)
\r
860 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
865 if ((a&0xfffe00) == 0xff8000) {
\r
867 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
868 if (a >= 0x58 && a < 0x68)
\r
869 d = gfx_cd_read(a);
\r
870 else d = s68k_reg_read16(a);
\r
871 rdprintf("ret = %04x", d);
\r
875 // word RAM (2M area)
\r
876 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
877 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
878 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
879 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
880 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
881 d |= d << 4; d &= ~0xf0;
\r
882 dprintf("FIXME: decode");
\r
884 // allow access in any mode, like Gens does
\r
885 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
887 wrdprintf("ret = %04x", d);
\r
891 // word RAM (1M area)
\r
892 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
894 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
895 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
896 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
897 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
898 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
899 wrdprintf("ret = %04x", d);
\r
904 if ((a&0xff0000)==0xfe0000) {
\r
905 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
907 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
908 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
909 dprintf("ret = %04x", d);
\r
914 if ((a&0xff8000)==0xff0000) {
\r
915 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
918 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
919 else if (a >= 0x20) {
\r
921 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
922 if (a & 2) d >>= 8;
\r
924 dprintf("ret = %04x", d);
\r
928 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
933 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
940 #ifdef _ASM_CD_MEMORY_C
\r
941 u32 PicoReadS68k32(u32 a);
\r
943 static u32 PicoReadS68k32(u32 a)
\r
951 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
952 d = (pm[0]<<16)|pm[1];
\r
957 if ((a&0xfffe00) == 0xff8000) {
\r
959 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
960 if (a >= 0x58 && a < 0x68)
\r
961 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
962 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
963 rdprintf("ret = %08x", d);
\r
967 // word RAM (2M area)
\r
968 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
969 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
970 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
971 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
973 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
974 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
975 d |= d << 4; d &= 0x0f0f0f0f;
\r
976 dprintf("FIXME: decode");
\r
978 // allow access in any mode, like Gens does
\r
979 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
981 wrdprintf("ret = %08x", d);
\r
985 // word RAM (1M area)
\r
986 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
988 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
989 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
990 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
991 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
992 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
993 wrdprintf("ret = %08x", d);
\r
998 if ((a&0xff8000)==0xff0000) {
\r
999 dprintf("FIXME: s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1001 if (a >= 0x2000) {
\r
1003 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1004 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1005 } else if (a >= 0x20) {
\r
1009 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1010 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1012 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1013 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1016 dprintf("ret = %08x", d);
\r
1021 if ((a&0xff0000)==0xfe0000) {
\r
1022 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1023 a = (a>>1)&0x1fff;
\r
1024 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1025 d|= Pico_mcd->bram[a++] << 24;
\r
1026 d|= Pico_mcd->bram[a++];
\r
1027 d|= Pico_mcd->bram[a++] << 8;
\r
1028 dprintf("ret = %08x", d);
\r
1032 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1036 #ifdef __debug_io2
\r
1037 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1044 #ifndef _ASM_CD_MEMORY_C
\r
1045 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1046 static void decode_write8(u32 a, u8 d, int r3)
\r
1048 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1049 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1053 if (!(a&1)) d <<= 4;
\r
1055 //dprintf("FIXME: decode, r3 = %02x", r3);
\r
1058 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1059 } else if (r3 > 8) {
\r
1060 if (d) goto do_it;
\r
1067 *pd = d | (*pd & oldmask);
\r
1071 static void decode_write16(u32 a, u16 d, int r3)
\r
1073 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1075 //if ((a & 0x3ffff) < 0x28000) return;
\r
1083 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1084 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1086 } else if (r3 > 8) {
\r
1088 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1089 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1095 //dprintf("FIXME: decode");
\r
1099 // -----------------------------------------------------------------
\r
1101 //void PicoWriteS68k8_(u32 a,u8 d);
\r
1102 //void PicoWriteS68k8__(u32 a,u8 d);
\r
1103 #ifdef _ASM_CD_MEMORY_C
\r
1104 void PicoWriteS68k8(u32 a,u8 d);
\r
1106 static void PicoWriteS68k8(u32 a,u8 d)
\r
1108 #ifdef __debug_io2
\r
1109 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1114 PicoWriteS68k8_(a, d);
\r
1115 /* if ((a&0xfc0000)!=0x080000) {
\r
1116 PicoWriteS68k8_(a, d);
\r
1119 printf("r3: %02x\n", Pico_mcd->s68k_regs[3]);
\r
1120 PicoWriteS68k8__(a,d);*/
\r
1125 if (a < 0x80000) {
\r
1126 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1132 if ((a&0xfffe00) == 0xff8000) {
\r
1134 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1135 if (a >= 0x58 && a < 0x68)
\r
1136 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1137 else s68k_reg_write8(a,d);
\r
1141 // word RAM (2M area)
\r
1142 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1143 int r3 = Pico_mcd->s68k_regs[3];
\r
1144 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1145 if (r3 & 4) { // 1M decode mode?
\r
1146 decode_write8(a, d, r3);
\r
1148 // allow access in any mode, like Gens does
\r
1149 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1154 // word RAM (1M area)
\r
1155 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1156 // Wing Commander tries to write here in wrong mode
\r
1159 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1160 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1161 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1162 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1163 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1168 if ((a&0xff8000)==0xff0000) {
\r
1171 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1172 else if (a < 0x12)
\r
1173 pcm_write(a>>1, d);
\r
1178 if ((a&0xff0000)==0xfe0000) {
\r
1179 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1184 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1189 #ifdef _ASM_CD_MEMORY_C
\r
1190 void PicoWriteS68k16(u32 a,u16 d);
\r
1192 static void PicoWriteS68k16(u32 a,u16 d)
\r
1194 #ifdef __debug_io2
\r
1195 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1201 if (a < 0x80000) {
\r
1202 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1207 if ((a&0xfffe00) == 0xff8000) {
\r
1209 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1210 if (a >= 0x58 && a < 0x68)
\r
1211 gfx_cd_write16(a, d);
\r
1213 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1214 Pico_mcd->s68k_regs[0xf] = d;
\r
1217 s68k_reg_write8(a, d>>8);
\r
1218 s68k_reg_write8(a+1,d&0xff);
\r
1223 // word RAM (2M area)
\r
1224 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1225 int r3 = Pico_mcd->s68k_regs[3];
\r
1226 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1227 if (r3 & 4) { // 1M decode mode?
\r
1228 decode_write16(a, d, r3);
\r
1230 // allow access in any mode, like Gens does
\r
1231 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1236 // word RAM (1M area)
\r
1237 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1240 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1241 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1242 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1243 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1244 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1249 if ((a&0xff8000)==0xff0000) {
\r
1252 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1253 else if (a < 0x12)
\r
1254 pcm_write(a>>1, d & 0xff);
\r
1259 if ((a&0xff0000)==0xfe0000) {
\r
1260 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1261 a = (a>>1)&0x1fff;
\r
1262 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1263 Pico_mcd->bram[a++] = d >> 8;
\r
1268 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1273 #ifdef _ASM_CD_MEMORY_C
\r
1274 void PicoWriteS68k32(u32 a,u32 d);
\r
1276 static void PicoWriteS68k32(u32 a,u32 d)
\r
1278 #ifdef __debug_io2
\r
1279 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1285 if (a < 0x80000) {
\r
1286 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1287 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1292 if ((a&0xfffe00) == 0xff8000) {
\r
1294 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1295 if (a >= 0x58 && a < 0x68) {
\r
1296 gfx_cd_write16(a, d>>16);
\r
1297 gfx_cd_write16(a+2, d&0xffff);
\r
1299 s68k_reg_write8(a, d>>24);
\r
1300 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1301 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1302 s68k_reg_write8(a+3, d &0xff);
\r
1307 // word RAM (2M area)
\r
1308 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1309 int r3 = Pico_mcd->s68k_regs[3];
\r
1310 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1311 if (r3 & 4) { // 1M decode mode?
\r
1312 decode_write16(a , d >> 16, r3);
\r
1313 decode_write16(a+2, d , r3);
\r
1315 // allow access in any mode, like Gens does
\r
1316 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1317 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1322 // word RAM (1M area)
\r
1323 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1327 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1328 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1329 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1330 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1331 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1332 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1337 if ((a&0xff8000)==0xff0000) {
\r
1339 if (a >= 0x2000) {
\r
1341 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1342 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1343 } else if (a < 0x12) {
\r
1345 pcm_write(a, (d>>16) & 0xff);
\r
1346 pcm_write(a+1, d & 0xff);
\r
1352 if ((a&0xff0000)==0xfe0000) {
\r
1353 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1354 a = (a>>1)&0x1fff;
\r
1355 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1356 Pico_mcd->bram[a++] = d >> 24;
\r
1357 Pico_mcd->bram[a++] = d;
\r
1358 Pico_mcd->bram[a++] = d >> 8;
\r
1363 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1368 // -----------------------------------------------------------------
\r
1371 #if defined(EMU_C68K)
\r
1372 static __inline int PicoMemBaseM68k(u32 pc)
\r
1374 if ((pc&0xe00000)==0xe00000)
\r
1375 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1378 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1380 if ((pc&0xfc0000)==0x200000)
\r
1382 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1383 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1384 if (pc < 0x220000) {
\r
1385 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1386 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1390 // Error - Program Counter is invalid
\r
1391 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1393 return (int)Pico_mcd->bios;
\r
1397 static u32 PicoCheckPcM68k(u32 pc)
\r
1399 pc-=PicoCpu.membase; // Get real pc
\r
1402 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1404 return PicoCpu.membase+pc;
\r
1408 static __inline int PicoMemBaseS68k(u32 pc)
\r
1410 if (pc < 0x80000) // PRG RAM
\r
1411 return (int)Pico_mcd->prg_ram;
\r
1413 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1414 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1416 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1417 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1418 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1421 // Error - Program Counter is invalid
\r
1422 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1424 return (int)Pico_mcd->prg_ram;
\r
1428 static u32 PicoCheckPcS68k(u32 pc)
\r
1430 pc-=PicoCpuS68k.membase; // Get real pc
\r
1433 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1435 return PicoCpuS68k.membase+pc;
\r
1440 void PicoMemSetupCD()
\r
1442 dprintf("PicoMemSetupCD()");
\r
1444 // Setup m68k memory callbacks:
\r
1445 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1446 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1447 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1448 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1449 PicoCpu.write8 =PicoWriteM68k8;
\r
1450 PicoCpu.write16=PicoWriteM68k16;
\r
1451 PicoCpu.write32=PicoWriteM68k32;
\r
1453 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1454 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1455 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1456 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1457 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1458 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1459 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1461 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1462 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1467 unsigned char PicoReadCD8w (unsigned int a) {
\r
1468 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1470 unsigned short PicoReadCD16w(unsigned int a) {
\r
1471 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1473 unsigned int PicoReadCD32w(unsigned int a) {
\r
1474 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1476 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1477 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1479 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1480 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1482 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1483 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1486 // these are allowed to access RAM
\r
1487 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1489 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1490 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1491 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1492 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1493 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1494 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1495 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1497 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1499 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1500 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1501 if((a&0xfc0000)==0x200000) { // word RAM
\r
1502 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1503 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1504 else if (a < 0x220000) {
\r
1505 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1506 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1509 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1511 return 0;//(u8) lastread_d;
\r
1513 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1515 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1516 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1517 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1518 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1519 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1520 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1521 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1523 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1525 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1526 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1527 if((a&0xfc0000)==0x200000) { // word RAM
\r
1528 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1529 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1530 else if (a < 0x220000) {
\r
1531 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1532 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1535 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1539 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1542 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1543 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1544 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1545 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1546 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1547 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1548 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1549 return (pm[0]<<16)|pm[1];
\r
1551 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1553 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1554 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1555 if((a&0xfc0000)==0x200000) { // word RAM
\r
1556 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1557 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1558 else if (a < 0x220000) {
\r
1559 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1560 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1561 return (pm[0]<<16)|pm[1];
\r
1564 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1568 #endif // EMU_M68K
\r