1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 #include "cell_map.c"
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24 typedef unsigned char u8;
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25 typedef unsigned short u16;
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26 typedef unsigned int u32;
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28 //#define __debug_io
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29 //#define __debug_io2
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30 //#define rdprintf dprintf
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31 #define rdprintf(...)
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32 #define wrdprintf(...)
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34 // -----------------------------------------------------------------
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37 static u32 m68k_reg_read16(u32 a)
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41 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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45 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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48 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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49 dprintf("m68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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52 d = Pico_mcd->s68k_regs[4]<<8;
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55 d = *(u16 *)(Pico_mcd->bios + 0x72);
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58 d = Read_CDC_Host(0);
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61 dprintf("m68k FIXME: reserved read");
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64 dprintf("m68k stopwatch timer read");
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65 d = Pico_mcd->m.timer_stopwatch >> 16;
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70 // comm flag/cmd/status (0xE-0x2F)
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71 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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75 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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79 // dprintf("ret = %04x", d);
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83 static void m68k_reg_write8(u32 a, u32 d)
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86 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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91 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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95 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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96 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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97 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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98 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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99 SekResetS68k(); // S68k comes out of RESET or BRQ state
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100 Pico_mcd->m.state_flags&=~1;
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101 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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103 Pico_mcd->m.busreq = d;
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106 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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109 dprintf("m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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111 if ((Pico_mcd->s68k_regs[3]>>6) != ((d>>6)&3))
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112 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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113 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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114 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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115 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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116 d |= Pico_mcd->s68k_regs[3]&0x1d;
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117 if (!(d & 4) && (d & 2)) d &= ~1; // return word RAM to s68k in 2M mode
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118 Pico_mcd->s68k_regs[3] = d; // really use s68k side register
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121 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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124 Pico_mcd->bios[0x72] = d;
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125 dprintf("hint vector set to %08x", PicoRead32(0x70));
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128 //dprintf("m68k: comm flag: %02x", d);
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129 Pico_mcd->s68k_regs[0xe] = d;
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133 if ((a&0xf0) == 0x10) {
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134 Pico_mcd->s68k_regs[a] = d;
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138 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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142 #define READ_FONT_DATA(basemask) \
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144 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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145 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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146 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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147 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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148 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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149 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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153 static u32 s68k_reg_read16(u32 a)
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157 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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161 d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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164 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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165 dprintf("s68k_regs r3: %02x @%06x", (u8)d, SekPc);
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168 d = CDC_Read_Reg();
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171 d = Read_CDC_Host(1); // Gens returns 0 here on byte reads
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174 dprintf("s68k stopwatch timer read");
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175 d = Pico_mcd->m.timer_stopwatch >> 16;
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178 dprintf("s68k int3 timer read");
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180 case 0x34: // fader
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181 d = 0; // no busy bit
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183 case 0x50: // font data (check: Lunar 2, Silpheed)
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184 READ_FONT_DATA(0x00100000);
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187 READ_FONT_DATA(0x00010000);
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190 READ_FONT_DATA(0x10000000);
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193 READ_FONT_DATA(0x01000000);
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197 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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201 // dprintf("ret = %04x", d);
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206 static void s68k_reg_write8(u32 a, u32 d)
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208 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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210 // TODO: review against Gens
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213 return; // only m68k can change WP
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215 int dold = Pico_mcd->s68k_regs[3];
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216 dprintf("s68k_regs w3: %02x @%06x", (u8)d, SekPc);
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220 if ((d ^ dold) & 5) d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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222 dprintf("wram mode 2M->1M");
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223 wram_2M_to_1M(Pico_mcd->word_ram2M);
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226 d |= Pico_mcd->s68k_regs[3]&0xc3;
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227 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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229 dprintf("wram mode 1M->2M");
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230 wram_1M_to_2M(Pico_mcd->word_ram2M);
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236 dprintf("s68k CDC dest: %x", d&7);
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237 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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240 //dprintf("s68k CDC reg addr: %x", d&0xf);
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246 dprintf("s68k set CDC dma addr");
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250 dprintf("s68k set stopwatch timer");
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251 Pico_mcd->m.timer_stopwatch = 0;
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254 Pico_mcd->s68k_regs[0Xf] = (d>>1) | (d<<7); // ror8, Gens note: Dragons lair
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255 Pico_mcd->m.timer_stopwatch = 0;
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258 dprintf("s68k set int3 timer: %02x", d);
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259 Pico_mcd->m.timer_int3 = d << 16;
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261 case 0x33: // IRQ mask
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262 dprintf("s68k irq mask: %02x", d);
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263 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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264 CDD_Export_Status();
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267 case 0x34: // fader
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268 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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271 return; // d/m bit is unsetable
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273 u32 d_old = Pico_mcd->s68k_regs[0x37];
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274 Pico_mcd->s68k_regs[0x37] = d&7;
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275 if ((d&4) && !(d_old&4)) {
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276 CDD_Export_Status();
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281 Pico_mcd->s68k_regs[a] = (u8) d;
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282 CDD_Import_Command();
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286 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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288 dprintf("s68k FIXME: invalid write @ %02x?", a);
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292 Pico_mcd->s68k_regs[a] = (u8) d;
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297 static u32 OtherRead16End(u32 a, int realsize)
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301 if ((a&0xffffc0)==0xa12000) {
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302 d=m68k_reg_read16(a);
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306 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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313 static void OtherWrite8End(u32 a, u32 d, int realsize)
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315 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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317 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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321 #undef _ASM_MEMORY_C
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322 #include "../MemoryCmn.c"
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325 // -----------------------------------------------------------------
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326 // Read Rom and read Ram
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328 u8 PicoReadM68k8(u32 a)
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332 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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336 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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339 if ((a&0xfe0000)==0x020000) {
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340 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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341 d = *(prg_bank+((a^1)&0x1ffff));
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346 if (a == 0x200000 && SekPc == 0xff0b66 && Pico.m.frame_count > 1000)
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350 unsigned short *ram = (unsigned short *) Pico.ram;
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351 // unswap and dump RAM
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352 for (i = 0; i < 0x10000/2; i++)
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353 ram[i] = (ram[i]>>8) | (ram[i]<<8);
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354 ff = fopen("ram.bin", "wb");
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355 fwrite(ram, 1, 0x10000, ff);
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362 if ((a&0xfc0000)==0x200000) {
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363 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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364 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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365 int bank = Pico_mcd->s68k_regs[3]&1;
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367 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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369 d = Pico_mcd->word_ram1M[bank][a^1];
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371 // allow access in any mode, like Gens does
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372 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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374 wrdprintf("ret = %02x", (u8)d);
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378 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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380 if ((a&0xffffc0)==0xa12000)
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381 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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383 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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385 if ((a&0xffffc0)==0xa12000)
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386 rdprintf("ret = %02x", (u8)d);
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391 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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397 u16 PicoReadM68k16(u32 a)
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401 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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405 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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408 if ((a&0xfe0000)==0x020000) {
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409 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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410 d = *(u16 *)(prg_bank+(a&0x1fffe));
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415 if ((a&0xfc0000)==0x200000) {
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416 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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417 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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418 int bank = Pico_mcd->s68k_regs[3]&1;
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420 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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422 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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424 // allow access in any mode, like Gens does
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425 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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427 wrdprintf("ret = %04x", d);
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431 if ((a&0xffffc0)==0xa12000)
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432 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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434 d = (u16)OtherRead16(a, 16);
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436 if ((a&0xffffc0)==0xa12000)
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437 rdprintf("ret = %04x", d);
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442 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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448 u32 PicoReadM68k32(u32 a)
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452 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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456 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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459 if ((a&0xfe0000)==0x020000) {
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460 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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461 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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462 d = (pm[0]<<16)|pm[1];
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467 if ((a&0xfc0000)==0x200000) {
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468 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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469 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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470 int bank = Pico_mcd->s68k_regs[3]&1;
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471 if (a >= 0x220000) { // cell arranged
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473 a1 = (a&2) | (cell_map(a >> 2) << 2);
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474 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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476 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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477 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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479 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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482 // allow access in any mode, like Gens does
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483 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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485 wrdprintf("ret = %08x", d);
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489 if ((a&0xffffc0)==0xa12000)
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490 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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492 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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494 if ((a&0xffffc0)==0xa12000)
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495 rdprintf("ret = %08x", d);
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499 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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505 // -----------------------------------------------------------------
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508 void PicoWriteM68k8(u32 a,u8 d)
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511 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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513 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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514 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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517 if ((a&0xe00000)==0xe00000) { // Ram
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518 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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525 if ((a&0xfe0000)==0x020000) {
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526 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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527 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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532 if ((a&0xfc0000)==0x200000) {
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533 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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534 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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535 int bank = Pico_mcd->s68k_regs[3]&1;
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537 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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539 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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541 // allow access in any mode, like Gens does
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542 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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547 if ((a&0xffffc0)==0xa12000)
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548 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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550 OtherWrite8(a,d,8);
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554 void PicoWriteM68k16(u32 a,u16 d)
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557 dprintf("w16: %06x, %04x", a&0xffffff, d);
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559 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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561 if ((a&0xe00000)==0xe00000) { // Ram
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562 *(u16 *)(Pico.ram+(a&0xfffe))=d;
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569 if ((a&0xfe0000)==0x020000) {
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570 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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571 *(u16 *)(prg_bank+(a&0x1fffe))=d;
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576 if ((a&0xfc0000)==0x200000) {
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577 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
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578 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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579 int bank = Pico_mcd->s68k_regs[3]&1;
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581 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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583 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
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585 // allow access in any mode, like Gens does
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586 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
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591 if ((a&0xffffc0)==0xa12000)
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592 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
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598 void PicoWriteM68k32(u32 a,u32 d)
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601 dprintf("w32: %06x, %08x", a&0xffffff, d);
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604 if ((a&0xe00000)==0xe00000)
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607 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
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608 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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615 if ((a&0xfe0000)==0x020000) {
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616 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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617 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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618 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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623 if ((a&0xfc0000)==0x200000) {
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624 if (d != 0) // don't log clears
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625 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
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626 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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627 int bank = Pico_mcd->s68k_regs[3]&1;
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628 if (a >= 0x220000) { // cell arranged
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630 a1 = (a&2) | (cell_map(a >> 2) << 2);
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631 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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633 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
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634 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
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636 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
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637 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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640 // allow access in any mode, like Gens does
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641 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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642 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
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647 if ((a&0xffffc0)==0xa12000)
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648 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
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650 OtherWrite16(a, (u16)(d>>16));
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651 OtherWrite16(a+2,(u16)d);
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655 // -----------------------------------------------------------------
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658 u8 PicoReadS68k8(u32 a)
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666 d = *(Pico_mcd->prg_ram+(a^1));
\r
671 if ((a&0xfffe00) == 0xff8000) {
\r
673 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
674 if (a >= 0x58 && a < 0x68)
\r
675 d = gfx_cd_read(a&~1);
\r
676 else d = s68k_reg_read16(a&~1);
\r
677 if ((a&1)==0) d>>=8;
\r
678 rdprintf("ret = %02x", (u8)d);
\r
682 // word RAM (2M area)
\r
683 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
684 // test: batman returns
\r
685 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
686 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
687 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
688 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
689 if (a&1) d &= 0x0f;
\r
691 dprintf("FIXME: decode");
\r
693 // allow access in any mode, like Gens does
\r
694 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
696 wrdprintf("ret = %02x", (u8)d);
\r
700 // word RAM (1M area)
\r
701 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
703 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
704 if (!(Pico_mcd->s68k_regs[3]&4))
\r
705 dprintf("s68k_wram1M FIXME: wrong mode");
\r
706 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
707 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
708 wrdprintf("ret = %02x", (u8)d);
\r
713 if ((a&0xff8000)==0xff0000) {
\r
714 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
717 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
718 else if (a >= 0x20) {
\r
720 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
721 if (a & 2) d >>= 8;
\r
723 dprintf("ret = %02x", (u8)d);
\r
728 if ((a&0xff0000)==0xfe0000) {
\r
729 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
733 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
738 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
744 u16 PicoReadS68k16(u32 a)
\r
752 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
757 if ((a&0xfffe00) == 0xff8000) {
\r
759 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
760 if (a >= 0x58 && a < 0x68)
\r
761 d = gfx_cd_read(a);
\r
762 else d = s68k_reg_read16(a);
\r
763 rdprintf("ret = %04x", d);
\r
767 // word RAM (2M area)
\r
768 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
769 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
770 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
771 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
772 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
773 d |= d << 4; d &= ~0xf0;
\r
774 dprintf("FIXME: decode");
\r
776 // allow access in any mode, like Gens does
\r
777 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
779 wrdprintf("ret = %04x", d);
\r
783 // word RAM (1M area)
\r
784 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
786 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
787 if (!(Pico_mcd->s68k_regs[3]&4))
\r
788 dprintf("s68k_wram1M FIXME: wrong mode");
\r
789 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
790 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
791 wrdprintf("ret = %04x", d);
\r
796 if ((a&0xff0000)==0xfe0000) {
\r
797 dprintf("s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
799 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
800 d|= Pico_mcd->bram[a++] << 8;
\r
801 dprintf("ret = %04x", d);
\r
806 if ((a&0xff8000)==0xff0000) {
\r
807 dprintf("s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
810 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
811 else if (a >= 0x20) {
\r
813 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
814 if (a & 2) d >>= 8;
\r
816 dprintf("ret = %04x", d);
\r
820 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
825 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
831 u32 PicoReadS68k32(u32 a)
\r
839 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
840 d = (pm[0]<<16)|pm[1];
\r
845 if ((a&0xfffe00) == 0xff8000) {
\r
847 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
848 if (a >= 0x58 && a < 0x68)
\r
849 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
850 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
851 rdprintf("ret = %08x", d);
\r
855 // word RAM (2M area)
\r
856 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
857 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
858 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
859 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
861 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
862 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
863 d |= d << 4; d &= 0x0f0f0f0f;
\r
864 dprintf("FIXME: decode");
\r
866 // allow access in any mode, like Gens does
\r
867 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
869 wrdprintf("ret = %08x", d);
\r
873 // word RAM (1M area)
\r
874 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
876 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
877 if (!(Pico_mcd->s68k_regs[3]&4))
\r
878 dprintf("s68k_wram1M FIXME: wrong mode");
\r
879 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
880 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
881 wrdprintf("ret = %08x", d);
\r
886 if ((a&0xff8000)==0xff0000) {
\r
887 dprintf("s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
891 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
892 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
893 } else if (a >= 0x20) {
\r
897 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
898 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
900 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
901 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
904 dprintf("ret = %08x", d);
\r
909 if ((a&0xff0000)==0xfe0000) {
\r
910 dprintf("s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
912 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
913 d|= Pico_mcd->bram[a++] << 24;
\r
914 d|= Pico_mcd->bram[a++];
\r
915 d|= Pico_mcd->bram[a++] << 8;
\r
916 dprintf("ret = %08x", d);
\r
920 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
925 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
931 // -----------------------------------------------------------------
\r
933 void PicoWriteS68k8(u32 a,u8 d)
\r
936 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
943 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
949 if ((a&0xfffe00) == 0xff8000) {
\r
951 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
952 if (a >= 0x58 && a < 0x68)
\r
953 gfx_cd_write(a&~1, (d<<8)|d);
\r
954 else s68k_reg_write8(a,d);
\r
958 // word RAM (2M area)
\r
959 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
960 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
961 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
962 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
963 if (a&1) d &= 0x0f;
\r
965 Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff]=d;
\r
966 dprintf("FIXME: decode");
\r
968 // allow access in any mode, like Gens does
\r
969 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
974 // word RAM (1M area)
\r
975 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
978 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
979 if (!(Pico_mcd->s68k_regs[3]&4))
\r
980 dprintf("s68k_wram1M FIXME: wrong mode");
\r
981 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
982 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
987 if ((a&0xff8000)==0xff0000) {
\r
990 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
992 pcm_write(a>>1, d);
\r
997 if ((a&0xff0000)==0xfe0000) {
\r
998 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1003 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1007 void PicoWriteS68k16(u32 a,u16 d)
\r
1009 #ifdef __debug_io2
\r
1010 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1016 if (a < 0x80000) {
\r
1017 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1022 if ((a&0xfffe00) == 0xff8000) {
\r
1024 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1025 if (a >= 0x58 && a < 0x68)
\r
1026 gfx_cd_write(a, d);
\r
1028 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1029 Pico_mcd->s68k_regs[0xf] = d;
\r
1032 s68k_reg_write8(a, d>>8);
\r
1033 s68k_reg_write8(a+1,d&0xff);
\r
1038 // word RAM (2M area)
\r
1039 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1040 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1041 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1042 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1043 d &= ~0xf0; d |= d >> 8;
\r
1044 Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff] = d;
\r
1045 dprintf("FIXME: decode");
\r
1047 // allow access in any mode, like Gens does
\r
1048 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1053 // word RAM (1M area)
\r
1054 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
1057 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1058 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1059 dprintf("s68k_wram1M FIXME: wrong mode");
\r
1060 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1061 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1066 if ((a&0xff8000)==0xff0000) {
\r
1069 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1070 else if (a < 0x12)
\r
1071 pcm_write(a>>1, d & 0xff);
\r
1076 if ((a&0xff0000)==0xfe0000) {
\r
1077 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1078 a = (a>>1)&0x1fff;
\r
1079 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1080 Pico_mcd->bram[a++] = d >> 8;
\r
1085 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1089 void PicoWriteS68k32(u32 a,u32 d)
\r
1091 #ifdef __debug_io2
\r
1092 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1098 if (a < 0x80000) {
\r
1099 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1100 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1105 if ((a&0xfffe00) == 0xff8000) {
\r
1107 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1108 if (a >= 0x58 && a < 0x68) {
\r
1109 gfx_cd_write(a, d>>16);
\r
1110 gfx_cd_write(a+2, d&0xffff);
\r
1112 s68k_reg_write8(a, d>>24);
\r
1113 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1114 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1115 s68k_reg_write8(a+3, d &0xff);
\r
1120 // word RAM (2M area)
\r
1121 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1122 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1123 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
1124 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1126 d &= 0x0f0f0f0f; d |= d >> 4;
\r
1127 Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] = d >> 16;
\r
1128 Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff] = d;
\r
1129 dprintf("FIXME: decode");
\r
1131 // allow access in any mode, like Gens does
\r
1132 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1133 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1138 // word RAM (1M area)
\r
1139 if ((a&0xfe0000)==0x0c0000) { // 0c0000-0dffff
\r
1143 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1144 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1145 dprintf("s68k_wram1M FIXME: wrong mode");
\r
1146 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1147 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1148 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1153 if ((a&0xff8000)==0xff0000) {
\r
1155 if (a >= 0x2000) {
\r
1157 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1158 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1159 } else if (a < 0x12) {
\r
1161 pcm_write(a, (d>>16) & 0xff);
\r
1162 pcm_write(a+1, d & 0xff);
\r
1168 if ((a&0xff0000)==0xfe0000) {
\r
1169 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1170 a = (a>>1)&0x1fff;
\r
1171 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1172 Pico_mcd->bram[a++] = d >> 24;
\r
1173 Pico_mcd->bram[a++] = d;
\r
1174 Pico_mcd->bram[a++] = d >> 8;
\r
1179 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1184 // -----------------------------------------------------------------
\r
1187 #if defined(EMU_C68K)
\r
1188 static __inline int PicoMemBaseM68k(u32 pc)
\r
1190 if ((pc&0xe00000)==0xe00000)
\r
1191 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1194 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1196 if ((pc&0xfc0000)==0x200000)
\r
1198 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1199 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1200 if (pc < 0x220000) {
\r
1201 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1202 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1206 // Error - Program Counter is invalid
\r
1207 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1209 return (int)Pico_mcd->bios;
\r
1213 static u32 PicoCheckPcM68k(u32 pc)
\r
1215 pc-=PicoCpu.membase; // Get real pc
\r
1218 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1220 return PicoCpu.membase+pc;
\r
1224 static __inline int PicoMemBaseS68k(u32 pc)
\r
1226 if (pc < 0x80000) // PRG RAM
\r
1227 return (int)Pico_mcd->prg_ram;
\r
1229 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1230 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1232 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1233 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1234 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1237 // Error - Program Counter is invalid
\r
1238 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1240 return (int)Pico_mcd->prg_ram;
\r
1244 static u32 PicoCheckPcS68k(u32 pc)
\r
1246 pc-=PicoCpuS68k.membase; // Get real pc
\r
1249 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1251 return PicoCpuS68k.membase+pc;
\r
1256 void PicoMemSetupCD()
\r
1258 dprintf("PicoMemSetupCD()");
\r
1260 // Setup m68k memory callbacks:
\r
1261 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1262 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1263 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1264 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1265 PicoCpu.write8 =PicoWriteM68k8;
\r
1266 PicoCpu.write16=PicoWriteM68k16;
\r
1267 PicoCpu.write32=PicoWriteM68k32;
\r
1269 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1270 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1271 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1272 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1273 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1274 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1275 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1281 unsigned char PicoReadCD8w (unsigned int a) {
\r
1282 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1284 unsigned short PicoReadCD16w(unsigned int a) {
\r
1285 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1287 unsigned int PicoReadCD32w(unsigned int a) {
\r
1288 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1290 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1291 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1293 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1294 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1296 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1297 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1300 // these are allowed to access RAM
\r
1301 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1303 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1304 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1305 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1306 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1307 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1308 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1309 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1311 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1313 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1314 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1315 if((a&0xfc0000)==0x200000) { // word RAM
\r
1316 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1317 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1318 else if (a < 0x220000) {
\r
1319 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1320 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1323 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1325 return 0;//(u8) lastread_d;
\r
1327 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1329 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1330 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1331 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1332 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1333 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1334 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1335 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1337 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1339 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1340 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1341 if((a&0xfc0000)==0x200000) { // word RAM
\r
1342 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1343 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1344 else if (a < 0x220000) {
\r
1345 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1346 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1349 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1353 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1356 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1357 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1358 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1359 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1360 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1361 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1362 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1363 return (pm[0]<<16)|pm[1];
\r
1365 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1367 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1368 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1369 if((a&0xfc0000)==0x200000) { // word RAM
\r
1370 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1371 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1372 else if (a < 0x220000) {
\r
1373 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1374 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1375 return (pm[0]<<16)|pm[1];
\r
1378 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1382 #endif // EMU_M68K
\r