1 // This is part of Pico Library
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3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2007 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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9 // A68K no longer supported here
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11 //#define __debug_io
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13 #include "../PicoInt.h"
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15 #include "../sound/sound.h"
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16 #include "../sound/ym2612.h"
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17 #include "../sound/sn76496.h"
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22 typedef unsigned char u8;
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23 typedef unsigned short u16;
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24 typedef unsigned int u32;
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26 //#define __debug_io
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27 //#define __debug_io2
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29 //#define rdprintf dprintf
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30 #define rdprintf(...)
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31 //#define wrdprintf dprintf
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32 #define wrdprintf(...)
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34 // -----------------------------------------------------------------
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37 #define POLL_LIMIT 16
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38 #define POLL_CYCLES 124
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39 // int m68k_poll_addr, m68k_poll_cnt;
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40 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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42 #ifndef _ASM_CD_MEMORY_C
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43 static u32 m68k_reg_read16(u32 a)
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47 // dprintf("m68k_regs r%2i: [%02x] @%06x", realsize&~1, a+(realsize&1), SekPc);
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51 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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54 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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55 // the DMNA delay must only be visible on s68k side (Lunar2, Silpheed)
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56 if (Pico_mcd->m.state_flags&2) { d &= ~1; d |= 2; }
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57 //printf("m68k_regs r3: %02x @%06x\n", (u8)d, SekPc);
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60 d = Pico_mcd->s68k_regs[4]<<8;
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63 d = *(u16 *)(Pico_mcd->bios + 0x72);
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66 d = Read_CDC_Host(0);
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69 dprintf("m68k FIXME: reserved read");
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72 d = Pico_mcd->m.timer_stopwatch >> 16;
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73 dprintf("m68k stopwatch timer read (%04x)", d);
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78 // comm flag/cmd/status (0xE-0x2F)
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79 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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83 dprintf("m68k_regs FIXME invalid read @ %02x", a);
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87 // dprintf("ret = %04x", d);
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92 #ifndef _ASM_CD_MEMORY_C
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95 void m68k_reg_write8(u32 a, u32 d)
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98 // dprintf("m68k_regs w%2i: [%02x] %02x @%06x", realsize, a, d, SekPc);
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103 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { dprintf("m68k: s68k irq 2"); SekInterruptS68k(2); }
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107 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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108 if ( (Pico_mcd->m.busreq&1) != (d&1)) dprintf("m68k: s68k reset %i", !(d&1));
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109 if ( (Pico_mcd->m.busreq&2) != (d&2)) dprintf("m68k: s68k brq %i", (d&2)>>1);
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110 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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111 SekResetS68k(); // S68k comes out of RESET or BRQ state
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112 Pico_mcd->m.state_flags&=~1;
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113 dprintf("m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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115 Pico_mcd->m.busreq = d;
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118 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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121 u32 dold = Pico_mcd->s68k_regs[3]&0x1f;
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122 //printf("m68k_regs w3: %02x @%06x\n", (u8)d, SekPc);
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124 if ((dold>>6) != ((d>>6)&3))
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125 dprintf("m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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126 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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127 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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128 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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130 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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132 //dold &= ~2; // ??
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134 if ((d & 2) && !(dold & 2)) {
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135 Pico_mcd->m.state_flags |= 2; // we must delay setting DMNA bit (needed for Silpheed)
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139 if (d & 2) dold &= ~1; // return word RAM to s68k in 2M mode
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142 Pico_mcd->s68k_regs[3] = d | dold; // really use s68k side register
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143 #ifdef USE_POLL_DETECT
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144 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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145 SekSetStopS68k(0); s68k_poll_adclk = 0;
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146 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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152 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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155 Pico_mcd->bios[0x72] = d;
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156 dprintf("hint vector set to %08x", PicoRead32(0x70));
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159 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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161 //dprintf("m68k: comm flag: %02x", d);
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162 Pico_mcd->s68k_regs[0xe] = d;
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163 #ifdef USE_POLL_DETECT
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164 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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165 SekSetStopS68k(0); s68k_poll_adclk = 0;
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166 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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172 if ((a&0xf0) == 0x10) {
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173 Pico_mcd->s68k_regs[a] = d;
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174 #ifdef USE_POLL_DETECT
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175 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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176 SekSetStopS68k(0); s68k_poll_adclk = 0;
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177 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
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183 dprintf("m68k FIXME: invalid write? [%02x] %02x", a, d);
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187 #define READ_FONT_DATA(basemask) \
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189 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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190 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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191 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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192 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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193 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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194 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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198 #ifndef _ASM_CD_MEMORY_C
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201 u32 s68k_reg_read16(u32 a)
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205 // dprintf("s68k_regs r%2i: [%02x] @ %06x", realsize&~1, a+(realsize&1), SekPcS68k);
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209 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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211 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0x1f);
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212 //printf("s68k_regs r3: %02x @%06x\n", (u8)d, SekPcS68k);
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215 return CDC_Read_Reg();
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217 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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219 d = Pico_mcd->m.timer_stopwatch >> 16;
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220 dprintf("s68k stopwatch timer read (%04x)", d);
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223 dprintf("s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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224 return Pico_mcd->s68k_regs[31];
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225 case 0x34: // fader
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226 return 0; // no busy bit
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227 case 0x50: // font data (check: Lunar 2, Silpheed)
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228 READ_FONT_DATA(0x00100000);
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231 READ_FONT_DATA(0x00010000);
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234 READ_FONT_DATA(0x10000000);
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237 READ_FONT_DATA(0x01000000);
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241 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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243 if (a >= 0x0e && a < 0x30) goto poll_detect;
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248 #ifdef USE_POLL_DETECT
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249 // polling detection
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250 if (a == (s68k_poll_adclk&0xfe)) {
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251 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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252 if (clkdiff <= POLL_CYCLES) {
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254 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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255 if (s68k_poll_cnt > POLL_LIMIT) {
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257 //printf("%05i:%03i: s68k poll detected @ %06x, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, SekPcS68k, a);
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259 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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263 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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270 #ifndef _ASM_CD_MEMORY_C
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273 void s68k_reg_write8(u32 a, u32 d)
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275 //dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);
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277 // TODO: review against Gens
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278 // Warning: d might have upper bits set
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281 return; // only m68k can change WP
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283 int dold = Pico_mcd->s68k_regs[3];
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284 //printf("s68k_regs w3: %02x @%06x\n", (u8)d, SekPcS68k);
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288 if ((d ^ dold) & 5) {
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289 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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290 #ifdef _ASM_CD_MEMORY_C
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294 #ifdef _ASM_CD_MEMORY_C
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295 if ((d ^ dold) & 0x1d)
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296 PicoMemResetCDdecode(d);
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299 dprintf("wram mode 2M->1M");
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300 wram_2M_to_1M(Pico_mcd->word_ram2M);
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304 dprintf("wram mode 1M->2M");
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305 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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307 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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309 wram_1M_to_2M(Pico_mcd->word_ram2M);
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310 #ifdef _ASM_CD_MEMORY_C
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316 if (d&1) d &= ~2; // return word RAM to m68k in 2M mode
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321 dprintf("s68k CDC dest: %x", d&7);
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322 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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325 //dprintf("s68k CDC reg addr: %x", d&0xf);
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331 dprintf("s68k set CDC dma addr");
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335 dprintf("s68k set stopwatch timer");
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336 Pico_mcd->m.timer_stopwatch = 0;
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339 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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342 dprintf("s68k set int3 timer: %02x", d);
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343 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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345 case 0x33: // IRQ mask
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346 dprintf("s68k irq mask: %02x", d);
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347 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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348 CDD_Export_Status();
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351 case 0x34: // fader
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352 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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355 return; // d/m bit is unsetable
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357 u32 d_old = Pico_mcd->s68k_regs[0x37];
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358 Pico_mcd->s68k_regs[0x37] = d&7;
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359 if ((d&4) && !(d_old&4)) {
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360 CDD_Export_Status();
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365 Pico_mcd->s68k_regs[a] = (u8) d;
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366 CDD_Import_Command();
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370 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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372 dprintf("s68k FIXME: invalid write @ %02x?", a);
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376 Pico_mcd->s68k_regs[a] = (u8) d;
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380 #ifndef _ASM_CD_MEMORY_C
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381 static u32 OtherRead16End(u32 a, int realsize)
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385 if ((a&0xffffc0)==0xa12000) {
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386 d=m68k_reg_read16(a);
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390 dprintf("m68k FIXME: unusual r%i: %06x @%06x", realsize&~1, (a&0xfffffe)+(realsize&1), SekPc);
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397 static void OtherWrite8End(u32 a, u32 d, int realsize)
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399 if ((a&0xffffc0)==0xa12000) { m68k_reg_write8(a, d); return; }
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401 dprintf("m68k FIXME: strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);
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405 #undef _ASM_MEMORY_C
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406 #include "../MemoryCmn.c"
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407 #include "cell_map.c"
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408 #endif // !def _ASM_CD_MEMORY_C
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410 // -----------------------------------------------------------------
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411 // Read Rom and read Ram
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413 //u8 PicoReadM68k8_(u32 a);
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414 #ifdef _ASM_CD_MEMORY_C
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415 u8 PicoReadM68k8(u32 a);
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417 static u8 PicoReadM68k8(u32 a)
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421 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram
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425 if (a < 0x20000) { d = *(u8 *)(Pico_mcd->bios+(a^1)); goto end; } // bios
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428 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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429 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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430 d = *(prg_bank+((a^1)&0x1ffff));
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435 if ((a&0xfc0000)==0x200000) {
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436 wrdprintf("m68k_wram r8: [%06x] @%06x", a, SekPc);
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437 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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438 int bank = Pico_mcd->s68k_regs[3]&1;
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440 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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442 d = Pico_mcd->word_ram1M[bank][a^1];
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444 // allow access in any mode, like Gens does
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445 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
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447 wrdprintf("ret = %02x", (u8)d);
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451 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram
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453 if ((a&0xffffc0)==0xa12000)
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454 rdprintf("m68k_regs r8: [%02x] @%06x", a&0x3f, SekPc);
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456 d=OtherRead16(a&~1, 8|(a&1)); if ((a&1)==0) d>>=8;
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458 if ((a&0xffffc0)==0xa12000)
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459 rdprintf("ret = %02x", (u8)d);
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464 dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
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471 #ifdef _ASM_CD_MEMORY_C
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472 u16 PicoReadM68k16(u32 a);
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474 static u16 PicoReadM68k16(u32 a)
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478 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
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482 if (a < 0x20000) { d = *(u16 *)(Pico_mcd->bios+a); goto end; } // bios
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485 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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486 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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487 wrdprintf("m68k_prgram r16: [%i,%06x] @%06x", Pico_mcd->s68k_regs[3]>>6, a, SekPc);
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488 d = *(u16 *)(prg_bank+(a&0x1fffe));
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489 wrdprintf("ret = %04x", d);
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494 if ((a&0xfc0000)==0x200000) {
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495 wrdprintf("m68k_wram r16: [%06x] @%06x", a, SekPc);
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496 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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497 int bank = Pico_mcd->s68k_regs[3]&1;
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499 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
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501 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a);
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503 // allow access in any mode, like Gens does
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504 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
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506 wrdprintf("ret = %04x", d);
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510 if ((a&0xffffc0)==0xa12000)
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511 rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
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513 d = (u16)OtherRead16(a, 16);
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515 if ((a&0xffffc0)==0xa12000)
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516 rdprintf("ret = %04x", d);
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521 dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
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528 #ifdef _ASM_CD_MEMORY_C
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529 u32 PicoReadM68k32(u32 a);
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531 static u32 PicoReadM68k32(u32 a)
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535 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram
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539 if (a < 0x20000) { u16 *pm=(u16 *)(Pico_mcd->bios+a); d = (pm[0]<<16)|pm[1]; goto end; } // bios
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542 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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543 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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544 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
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545 d = (pm[0]<<16)|pm[1];
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550 if ((a&0xfc0000)==0x200000) {
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551 wrdprintf("m68k_wram r32: [%06x] @%06x", a, SekPc);
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552 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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553 int bank = Pico_mcd->s68k_regs[3]&1;
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554 if (a >= 0x220000) { // cell arranged
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556 a1 = (a&2) | (cell_map(a >> 2) << 2);
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557 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
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559 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) << 16;
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560 d |= *(u16 *)(Pico_mcd->word_ram1M[bank]+a2);
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562 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
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565 // allow access in any mode, like Gens does
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566 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
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568 wrdprintf("ret = %08x", d);
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572 if ((a&0xffffc0)==0xa12000)
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573 rdprintf("m68k_regs r32: [%02x] @%06x", a&0x3f, SekPc);
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575 d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);
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577 if ((a&0xffffc0)==0xa12000)
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578 rdprintf("ret = %08x", d);
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582 dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);
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589 // -----------------------------------------------------------------
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592 #ifdef _ASM_CD_MEMORY_C
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593 void PicoWriteM68k8(u32 a,u8 d);
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595 static void PicoWriteM68k8(u32 a,u8 d)
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598 dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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600 //if ((a&0xe0ffff)==0xe0a9ba+0x69c)
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601 // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);
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604 if ((a&0xe00000)==0xe00000) { // Ram
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605 *(u8 *)(Pico.ram+((a^1)&0xffff)) = d;
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612 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
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613 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
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614 *(u8 *)(prg_bank+((a^1)&0x1ffff))=d;
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619 if ((a&0xfc0000)==0x200000) {
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620 wrdprintf("m68k_wram w8: [%06x] %02x @%06x", a, d, SekPc);
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621 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
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622 int bank = Pico_mcd->s68k_regs[3]&1;
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624 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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626 *(u8 *)(Pico_mcd->word_ram1M[bank]+(a^1))=d;
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628 // allow access in any mode, like Gens does
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629 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
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634 if ((a&0xffffc0)==0xa12000)
\r
635 rdprintf("m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
\r
637 OtherWrite8(a,d,8);
\r
642 #ifdef _ASM_CD_MEMORY_C
\r
643 void PicoWriteM68k16(u32 a,u16 d);
\r
645 static void PicoWriteM68k16(u32 a,u16 d)
\r
648 dprintf("w16: %06x, %04x", a&0xffffff, d);
\r
650 // dprintf("w16: %06x, %04x @%06x", a&0xffffff, d, SekPc);
\r
652 if ((a&0xe00000)==0xe00000) { // Ram
\r
653 *(u16 *)(Pico.ram+(a&0xfffe))=d;
\r
660 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
\r
661 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
662 wrdprintf("m68k_prgram w16: [%i,%06x] %04x @%06x", Pico_mcd->s68k_regs[3]>>6, a, d, SekPc);
\r
663 *(u16 *)(prg_bank+(a&0x1fffe))=d;
\r
668 if ((a&0xfc0000)==0x200000) {
\r
669 wrdprintf("m68k_wram w16: [%06x] %04x @%06x", a, d, SekPc);
\r
670 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
671 int bank = Pico_mcd->s68k_regs[3]&1;
\r
673 a = (a&2) | (cell_map(a >> 2) << 2); // cell arranged
\r
675 *(u16 *)(Pico_mcd->word_ram1M[bank]+a)=d;
\r
677 // allow access in any mode, like Gens does
\r
678 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
684 if ((a&0xffffc0)==0xa12000) {
\r
685 rdprintf("m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
686 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
687 Pico_mcd->s68k_regs[0xe] = d >> 8;
\r
688 #ifdef USE_POLL_DETECT
\r
689 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
\r
690 SekSetStopS68k(0); s68k_poll_adclk = -1;
\r
691 //printf("%05i:%03i: s68k poll release, a=%02x\n", Pico.m.frame_count, Pico.m.scanline, a);
\r
696 m68k_reg_write8(a, d>>8);
\r
697 m68k_reg_write8(a+1,d&0xff);
\r
706 #ifdef _ASM_CD_MEMORY_C
\r
707 void PicoWriteM68k32(u32 a,u32 d);
\r
709 static void PicoWriteM68k32(u32 a,u32 d)
\r
712 dprintf("w32: %06x, %08x", a&0xffffff, d);
\r
715 if ((a&0xe00000)==0xe00000)
\r
718 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));
\r
719 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
726 if ((a&0xfe0000)==0x020000 && (Pico_mcd->m.busreq&2)) {
\r
727 u8 *prg_bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3]>>6];
\r
728 u16 *pm=(u16 *)(prg_bank+(a&0x1fffe));
\r
729 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
734 if ((a&0xfc0000)==0x200000) {
\r
735 if (d != 0) // don't log clears
\r
736 wrdprintf("m68k_wram w32: [%06x] %08x @%06x", a, d, SekPc);
\r
737 if (Pico_mcd->s68k_regs[3]&4) { // 1M mode?
\r
738 int bank = Pico_mcd->s68k_regs[3]&1;
\r
739 if (a >= 0x220000) { // cell arranged
\r
741 a1 = (a&2) | (cell_map(a >> 2) << 2);
\r
742 if (a&2) a2 = cell_map((a+2) >> 2) << 2;
\r
744 *(u16 *)(Pico_mcd->word_ram1M[bank]+a1) = d >> 16;
\r
745 *(u16 *)(Pico_mcd->word_ram1M[bank]+a2) = d;
\r
747 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
748 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
751 // allow access in any mode, like Gens does
\r
752 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
753 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
758 if ((a&0xffffc0)==0xa12000)
\r
759 rdprintf("m68k_regs w32: [%02x] %08x @%06x", a&0x3f, d, SekPc);
\r
761 OtherWrite16(a, (u16)(d>>16));
\r
762 OtherWrite16(a+2,(u16)d);
\r
767 // -----------------------------------------------------------------
\r
769 #ifdef _ASM_CD_MEMORY_C
\r
770 u8 PicoReadS68k8(u32 a);
\r
772 static u8 PicoReadS68k8(u32 a)
\r
780 d = *(Pico_mcd->prg_ram+(a^1));
\r
785 if ((a&0xfffe00) == 0xff8000) {
\r
787 rdprintf("s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
788 if (a >= 0x58 && a < 0x68)
\r
789 d = gfx_cd_read(a&~1);
\r
790 else d = s68k_reg_read16(a&~1);
\r
791 if ((a&1)==0) d>>=8;
\r
792 rdprintf("ret = %02x", (u8)d);
\r
796 // word RAM (2M area)
\r
797 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
798 // test: batman returns
\r
799 wrdprintf("s68k_wram2M r8: [%06x] @%06x", a, SekPcS68k);
\r
800 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
801 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
802 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
803 if (a&1) d &= 0x0f;
\r
805 dprintf("FIXME: decode");
\r
807 // allow access in any mode, like Gens does
\r
808 d = Pico_mcd->word_ram2M[(a^1)&0x3ffff];
\r
810 wrdprintf("ret = %02x", (u8)d);
\r
814 // word RAM (1M area)
\r
815 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
817 wrdprintf("s68k_wram1M r8: [%06x] @%06x", a, SekPcS68k);
\r
818 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
819 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
820 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
821 d = Pico_mcd->word_ram1M[bank][(a^1)&0x1ffff];
\r
822 wrdprintf("ret = %02x", (u8)d);
\r
827 if ((a&0xff8000)==0xff0000) {
\r
828 dprintf("s68k_pcm r8: [%06x] @%06x", a, SekPcS68k);
\r
831 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
832 else if (a >= 0x20) {
\r
834 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
835 if (a & 2) d >>= 8;
\r
837 dprintf("ret = %02x", (u8)d);
\r
842 if ((a&0xff0000)==0xfe0000) {
\r
843 d = Pico_mcd->bram[(a>>1)&0x1fff];
\r
847 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
852 dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
\r
859 //u16 PicoReadS68k16_(u32 a);
\r
860 #ifdef _ASM_CD_MEMORY_C
\r
861 u16 PicoReadS68k16(u32 a);
\r
863 static u16 PicoReadS68k16(u32 a)
\r
871 wrdprintf("s68k_prgram r16: [%06x] @%06x", a, SekPcS68k);
\r
872 d = *(u16 *)(Pico_mcd->prg_ram+a);
\r
873 wrdprintf("ret = %04x", d);
\r
878 if ((a&0xfffe00) == 0xff8000) {
\r
880 rdprintf("s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
881 if (a >= 0x58 && a < 0x68)
\r
882 d = gfx_cd_read(a);
\r
883 else d = s68k_reg_read16(a);
\r
884 rdprintf("ret = %04x", d);
\r
888 // word RAM (2M area)
\r
889 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
890 wrdprintf("s68k_wram2M r16: [%06x] @%06x", a, SekPcS68k);
\r
891 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
892 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
893 d = Pico_mcd->word_ram1M[bank][((a>>1)^1)&0x1ffff];
\r
894 d |= d << 4; d &= ~0xf0;
\r
895 dprintf("FIXME: decode");
\r
897 // allow access in any mode, like Gens does
\r
898 d = *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
900 wrdprintf("ret = %04x", d);
\r
904 // word RAM (1M area)
\r
905 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
907 wrdprintf("s68k_wram1M r16: [%06x] @%06x", a, SekPcS68k);
\r
908 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
909 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
910 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
911 d = *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
912 wrdprintf("ret = %04x", d);
\r
917 if ((a&0xff0000)==0xfe0000) {
\r
918 dprintf("FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
920 d = Pico_mcd->bram[a++]; // Gens does little endian here, and so do we..
\r
921 d|= Pico_mcd->bram[a++] << 8; // This is most likely wrong
\r
922 dprintf("ret = %04x", d);
\r
927 if ((a&0xff8000)==0xff0000) {
\r
928 dprintf("FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
931 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
932 else if (a >= 0x20) {
\r
934 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
935 if (a & 2) d >>= 8;
\r
937 dprintf("ret = %04x", d);
\r
941 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
946 dprintf("s68k r16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
953 #ifdef _ASM_CD_MEMORY_C
\r
954 u32 PicoReadS68k32(u32 a);
\r
956 static u32 PicoReadS68k32(u32 a)
\r
964 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
965 d = (pm[0]<<16)|pm[1];
\r
970 if ((a&0xfffe00) == 0xff8000) {
\r
972 rdprintf("s68k_regs r32: [%02x] @ %06x", a, SekPcS68k);
\r
973 if (a >= 0x58 && a < 0x68)
\r
974 d = (gfx_cd_read(a)<<16)|gfx_cd_read(a+2);
\r
975 else d = (s68k_reg_read16(a)<<16)|s68k_reg_read16(a+2);
\r
976 rdprintf("ret = %08x", d);
\r
980 // word RAM (2M area)
\r
981 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
982 wrdprintf("s68k_wram2M r32: [%06x] @%06x", a, SekPcS68k);
\r
983 if (Pico_mcd->s68k_regs[3]&4) { // 1M decode mode?
\r
984 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
986 d = Pico_mcd->word_ram1M[bank][((a+0)^1)&0x1ffff] << 16;
\r
987 d |= Pico_mcd->word_ram1M[bank][((a+1)^1)&0x1ffff];
\r
988 d |= d << 4; d &= 0x0f0f0f0f;
\r
990 // allow access in any mode, like Gens does
\r
991 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); d = (pm[0]<<16)|pm[1];
\r
993 wrdprintf("ret = %08x", d);
\r
997 // word RAM (1M area)
\r
998 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1000 wrdprintf("s68k_wram1M r32: [%06x] @%06x", a, SekPcS68k);
\r
1001 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1002 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1003 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1004 u16 *pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe)); d = (pm[0]<<16)|pm[1];
\r
1005 wrdprintf("ret = %08x", d);
\r
1010 if ((a&0xff8000)==0xff0000) {
\r
1011 dprintf("FIXME: s68k_pcm r32: [%06x] @%06x", a, SekPcS68k);
\r
1013 if (a >= 0x2000) {
\r
1015 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] << 16;
\r
1016 d |= Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff];
\r
1017 } else if (a >= 0x20) {
\r
1021 d = (Pico_mcd->pcm.ch[a].addr >> (PCM_STEP_SHIFT-8)) & 0xff0000;
\r
1022 d |= (Pico_mcd->pcm.ch[(a+1)&7].addr >> PCM_STEP_SHIFT) & 0xff;
\r
1024 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
1025 d = ((d<<16)&0xff0000) | ((d>>8)&0xff); // PCM chip is LE
\r
1028 dprintf("ret = %08x", d);
\r
1033 if ((a&0xff0000)==0xfe0000) {
\r
1034 dprintf("FIXME: s68k_bram r32: [%06x] @%06x", a, SekPcS68k);
\r
1035 a = (a>>1)&0x1fff;
\r
1036 d = Pico_mcd->bram[a++] << 16; // middle endian? TODO: verify against Fusion..
\r
1037 d|= Pico_mcd->bram[a++] << 24;
\r
1038 d|= Pico_mcd->bram[a++];
\r
1039 d|= Pico_mcd->bram[a++] << 8;
\r
1040 dprintf("ret = %08x", d);
\r
1044 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1048 #ifdef __debug_io2
\r
1049 dprintf("s68k r32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1056 #ifndef _ASM_CD_MEMORY_C
\r
1057 /* check: jaguar xj 220 (draws entire world using decode) */
\r
1058 static void decode_write8(u32 a, u8 d, int r3)
\r
1060 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1061 u8 oldmask = (a&1) ? 0xf0 : 0x0f;
\r
1065 if (!(a&1)) d <<= 4;
\r
1068 if ((!(*pd & (~oldmask))) && d) goto do_it;
\r
1069 } else if (r3 > 8) {
\r
1070 if (d) goto do_it;
\r
1077 *pd = d | (*pd & oldmask);
\r
1081 static void decode_write16(u32 a, u16 d, int r3)
\r
1083 u8 *pd = Pico_mcd->word_ram1M[!(r3 & 1)] + (((a>>1)^1)&0x1ffff);
\r
1085 //if ((a & 0x3ffff) < 0x28000) return;
\r
1093 if (!(dold & 0xf0)) dold |= d & 0xf0;
\r
1094 if (!(dold & 0x0f)) dold |= d & 0x0f;
\r
1096 } else if (r3 > 8) {
\r
1098 if (!(d & 0xf0)) d |= dold & 0xf0;
\r
1099 if (!(d & 0x0f)) d |= dold & 0x0f;
\r
1107 // -----------------------------------------------------------------
\r
1109 #ifdef _ASM_CD_MEMORY_C
\r
1110 void PicoWriteS68k8(u32 a,u8 d);
\r
1112 static void PicoWriteS68k8(u32 a,u8 d)
\r
1114 #ifdef __debug_io2
\r
1115 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1121 if (a < 0x80000) {
\r
1122 u8 *pm=(u8 *)(Pico_mcd->prg_ram+(a^1));
\r
1128 if ((a&0xfffe00) == 0xff8000) {
\r
1130 rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
1131 if (a >= 0x58 && a < 0x68)
\r
1132 gfx_cd_write16(a&~1, (d<<8)|d);
\r
1133 else s68k_reg_write8(a,d);
\r
1137 // word RAM (2M area)
\r
1138 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1139 int r3 = Pico_mcd->s68k_regs[3];
\r
1140 wrdprintf("s68k_wram2M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1141 if (r3 & 4) { // 1M decode mode?
\r
1142 decode_write8(a, d, r3);
\r
1144 // allow access in any mode, like Gens does
\r
1145 *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff))=d;
\r
1150 // word RAM (1M area)
\r
1151 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1152 // Wing Commander tries to write here in wrong mode
\r
1155 wrdprintf("s68k_wram1M w8: [%06x] %02x @%06x", a, d, SekPcS68k);
\r
1156 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1157 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1158 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1159 *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff))=d;
\r
1164 if ((a&0xff8000)==0xff0000) {
\r
1167 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1168 else if (a < 0x12)
\r
1169 pcm_write(a>>1, d);
\r
1174 if ((a&0xff0000)==0xfe0000) {
\r
1175 Pico_mcd->bram[(a>>1)&0x1fff] = d;
\r
1180 dprintf("s68k w8 : %06x, %02x @%06x", a&0xffffff, d, SekPcS68k);
\r
1185 #ifdef _ASM_CD_MEMORY_C
\r
1186 void PicoWriteS68k16(u32 a,u16 d);
\r
1188 static void PicoWriteS68k16(u32 a,u16 d)
\r
1190 #ifdef __debug_io2
\r
1191 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1197 if (a < 0x80000) {
\r
1198 wrdprintf("s68k_prgram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1199 *(u16 *)(Pico_mcd->prg_ram+a)=d;
\r
1204 if ((a&0xfffe00) == 0xff8000) {
\r
1206 rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
1207 if (a >= 0x58 && a < 0x68)
\r
1208 gfx_cd_write16(a, d);
\r
1210 if (a == 0xe) { // special case, 2 byte writes would be handled differently
\r
1211 Pico_mcd->s68k_regs[0xf] = d;
\r
1214 s68k_reg_write8(a, d>>8);
\r
1215 s68k_reg_write8(a+1,d&0xff);
\r
1220 // word RAM (2M area)
\r
1221 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1222 int r3 = Pico_mcd->s68k_regs[3];
\r
1223 wrdprintf("s68k_wram2M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1224 if (r3 & 4) { // 1M decode mode?
\r
1225 decode_write16(a, d, r3);
\r
1227 // allow access in any mode, like Gens does
\r
1228 *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe))=d;
\r
1233 // word RAM (1M area)
\r
1234 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1237 wrdprintf("s68k_wram1M w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1238 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1239 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1240 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1241 *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe))=d;
\r
1246 if ((a&0xff8000)==0xff0000) {
\r
1249 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
1250 else if (a < 0x12)
\r
1251 pcm_write(a>>1, d & 0xff);
\r
1256 if ((a&0xff0000)==0xfe0000) {
\r
1257 dprintf("s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
1258 a = (a>>1)&0x1fff;
\r
1259 Pico_mcd->bram[a++] = d; // Gens does little endian here, an so do we..
\r
1260 Pico_mcd->bram[a++] = d >> 8;
\r
1265 dprintf("s68k w16: %06x, %04x @%06x", a&0xffffff, d, SekPcS68k);
\r
1270 #ifdef _ASM_CD_MEMORY_C
\r
1271 void PicoWriteS68k32(u32 a,u32 d);
\r
1273 static void PicoWriteS68k32(u32 a,u32 d)
\r
1275 #ifdef __debug_io2
\r
1276 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1282 if (a < 0x80000) {
\r
1283 u16 *pm=(u16 *)(Pico_mcd->prg_ram+a);
\r
1284 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1289 if ((a&0xfffe00) == 0xff8000) {
\r
1291 rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);
\r
1292 if (a >= 0x58 && a < 0x68) {
\r
1293 gfx_cd_write16(a, d>>16);
\r
1294 gfx_cd_write16(a+2, d&0xffff);
\r
1296 s68k_reg_write8(a, d>>24);
\r
1297 s68k_reg_write8(a+1,(d>>16)&0xff);
\r
1298 s68k_reg_write8(a+2,(d>>8) &0xff);
\r
1299 s68k_reg_write8(a+3, d &0xff);
\r
1304 // word RAM (2M area)
\r
1305 if ((a&0xfc0000)==0x080000) { // 080000-0bffff
\r
1306 int r3 = Pico_mcd->s68k_regs[3];
\r
1307 wrdprintf("s68k_wram2M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1308 if (r3 & 4) { // 1M decode mode?
\r
1309 decode_write16(a , d >> 16, r3);
\r
1310 decode_write16(a+2, d , r3);
\r
1312 // allow access in any mode, like Gens does
\r
1313 u16 *pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1314 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1319 // word RAM (1M area)
\r
1320 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // 0c0000-0dffff
\r
1324 wrdprintf("s68k_wram1M w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1325 // if (!(Pico_mcd->s68k_regs[3]&4))
\r
1326 // dprintf("s68k_wram1M FIXME: wrong mode");
\r
1327 bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1328 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1329 pm[0]=(u16)(d>>16); pm[1]=(u16)d;
\r
1334 if ((a&0xff8000)==0xff0000) {
\r
1336 if (a >= 0x2000) {
\r
1338 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][a&0xfff] = (d >> 16);
\r
1339 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a+1)&0xfff] = d;
\r
1340 } else if (a < 0x12) {
\r
1342 pcm_write(a, (d>>16) & 0xff);
\r
1343 pcm_write(a+1, d & 0xff);
\r
1349 if ((a&0xff0000)==0xfe0000) {
\r
1350 dprintf("s68k_bram w32: [%06x] %08x @%06x", a, d, SekPcS68k);
\r
1351 a = (a>>1)&0x1fff;
\r
1352 Pico_mcd->bram[a++] = d >> 16; // middle endian? verify?
\r
1353 Pico_mcd->bram[a++] = d >> 24;
\r
1354 Pico_mcd->bram[a++] = d;
\r
1355 Pico_mcd->bram[a++] = d >> 8;
\r
1360 dprintf("s68k w32: %06x, %08x @%06x", a&0xffffff, d, SekPcS68k);
\r
1365 // -----------------------------------------------------------------
\r
1368 #if defined(EMU_C68K)
\r
1369 static __inline int PicoMemBaseM68k(u32 pc)
\r
1371 if ((pc&0xe00000)==0xe00000)
\r
1372 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
1375 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
1377 if ((pc&0xfc0000)==0x200000)
\r
1379 if (!(Pico_mcd->s68k_regs[3]&4))
\r
1380 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
1381 if (pc < 0x220000) {
\r
1382 int bank = (Pico_mcd->s68k_regs[3]&1);
\r
1383 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
1387 // Error - Program Counter is invalid
\r
1388 dprintf("m68k FIXME: unhandled jump to %06x", pc);
\r
1390 return (int)Pico_mcd->bios;
\r
1394 static u32 PicoCheckPcM68k(u32 pc)
\r
1396 pc-=PicoCpu.membase; // Get real pc
\r
1399 PicoCpu.membase=PicoMemBaseM68k(pc);
\r
1401 return PicoCpu.membase+pc;
\r
1405 static __inline int PicoMemBaseS68k(u32 pc)
\r
1407 if (pc < 0x80000) // PRG RAM
\r
1408 return (int)Pico_mcd->prg_ram;
\r
1410 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
1411 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
1413 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
1414 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1415 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
1418 // Error - Program Counter is invalid
\r
1419 dprintf("s68k FIXME: unhandled jump to %06x", pc);
\r
1421 return (int)Pico_mcd->prg_ram;
\r
1425 static u32 PicoCheckPcS68k(u32 pc)
\r
1427 pc-=PicoCpuS68k.membase; // Get real pc
\r
1430 PicoCpuS68k.membase=PicoMemBaseS68k(pc);
\r
1432 return PicoCpuS68k.membase+pc;
\r
1437 void PicoMemSetupCD()
\r
1439 dprintf("PicoMemSetupCD()");
\r
1441 // Setup m68k memory callbacks:
\r
1442 PicoCpu.checkpc=PicoCheckPcM68k;
\r
1443 PicoCpu.fetch8 =PicoCpu.read8 =PicoReadM68k8;
\r
1444 PicoCpu.fetch16=PicoCpu.read16=PicoReadM68k16;
\r
1445 PicoCpu.fetch32=PicoCpu.read32=PicoReadM68k32;
\r
1446 PicoCpu.write8 =PicoWriteM68k8;
\r
1447 PicoCpu.write16=PicoWriteM68k16;
\r
1448 PicoCpu.write32=PicoWriteM68k32;
\r
1450 PicoCpuS68k.checkpc=PicoCheckPcS68k;
\r
1451 PicoCpuS68k.fetch8 =PicoCpuS68k.read8 =PicoReadS68k8;
\r
1452 PicoCpuS68k.fetch16=PicoCpuS68k.read16=PicoReadS68k16;
\r
1453 PicoCpuS68k.fetch32=PicoCpuS68k.read32=PicoReadS68k32;
\r
1454 PicoCpuS68k.write8 =PicoWriteS68k8;
\r
1455 PicoCpuS68k.write16=PicoWriteS68k16;
\r
1456 PicoCpuS68k.write32=PicoWriteS68k32;
\r
1458 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1459 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1464 unsigned char PicoReadCD8w (unsigned int a) {
\r
1465 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k8(a) : PicoReadM68k8(a);
\r
1467 unsigned short PicoReadCD16w(unsigned int a) {
\r
1468 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k16(a) : PicoReadM68k16(a);
\r
1470 unsigned int PicoReadCD32w(unsigned int a) {
\r
1471 return m68ki_cpu_p == &PicoS68kCPU ? PicoReadS68k32(a) : PicoReadM68k32(a);
\r
1473 void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1474 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k8(a, d); else PicoWriteM68k8(a, d);
\r
1476 void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1477 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k16(a, d); else PicoWriteM68k16(a, d);
\r
1479 void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1480 if (m68ki_cpu_p == &PicoS68kCPU) PicoWriteS68k32(a, d); else PicoWriteM68k32(a, d);
\r
1483 // these are allowed to access RAM
\r
1484 unsigned int m68k_read_pcrelative_CD8 (unsigned int a) {
\r
1486 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1487 if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram
\r
1488 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1489 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1490 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1491 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1492 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1494 dprintf("s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1496 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram
\r
1497 if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios
\r
1498 if((a&0xfc0000)==0x200000) { // word RAM
\r
1499 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1500 return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));
\r
1501 else if (a < 0x220000) {
\r
1502 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1503 return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));
\r
1506 dprintf("m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);
\r
1508 return 0;//(u8) lastread_d;
\r
1510 unsigned int m68k_read_pcrelative_CD16(unsigned int a) {
\r
1512 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1513 if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram
\r
1514 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1515 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1516 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1517 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1518 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1520 dprintf("s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1522 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram
\r
1523 if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios
\r
1524 if((a&0xfc0000)==0x200000) { // word RAM
\r
1525 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1526 return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));
\r
1527 else if (a < 0x220000) {
\r
1528 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1529 return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1532 dprintf("m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);
\r
1536 unsigned int m68k_read_pcrelative_CD32(unsigned int a) {
\r
1539 if(m68ki_cpu_p == &PicoS68kCPU) {
\r
1540 if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram
\r
1541 if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)
\r
1542 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1543 if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)
\r
1544 int bank = !(Pico_mcd->s68k_regs[3]&1);
\r
1545 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1546 return (pm[0]<<16)|pm[1];
\r
1548 dprintf("s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1550 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram
\r
1551 if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }
\r
1552 if((a&0xfc0000)==0x200000) { // word RAM
\r
1553 if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?
\r
1554 { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }
\r
1555 else if (a < 0x220000) {
\r
1556 int bank = Pico_mcd->s68k_regs[3]&1;
\r
1557 pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));
\r
1558 return (pm[0]<<16)|pm[1];
\r
1561 dprintf("m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);
\r
1565 #endif // EMU_M68K
\r