3 @ Memory i/o handlers for Sega/Mega CD emulation
4 @ (c) Copyright 2007, Grazvydas "notaz" Ignotas
9 .equiv PCM_STEP_SHIFT, 11
16 .macro mk_m68k_jump_table on sz @ operation name, size
17 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
18 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
19 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
20 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
23 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
24 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
25 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
26 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
29 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x400000
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x600000
34 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7fffff
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
39 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
41 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
42 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
44 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
46 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
47 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
48 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
49 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
50 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
51 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
52 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
56 .macro mk_s68k_jump_table1 on sz @ operation name, size
57 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
58 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
59 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
60 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
61 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
64 .macro mk_s68k_jump_table2 on sz @ operation name, size
65 .long m_s68k_&\on&\sz&_backup @ 0xfe0000 - 0xfe7fff
66 .long m_s68k_&\on&\sz&_backup @ 0xfe8000 - 0xfeffff
67 .long m_s68k_&\on&\sz&_pcm @ 0xff0000 - 0xff7fff
68 .long m_s68k_&\on&\sz&_regs @ 0xff8000 - 0xffffff
72 @ the jumptables themselves
73 m_m68k_read8_table: mk_m68k_jump_table read 8
74 m_m68k_read16_table: mk_m68k_jump_table read 16
75 m_m68k_read32_table: mk_m68k_jump_table read 32
76 m_m68k_write8_table: mk_m68k_jump_table write 8
77 m_m68k_write16_table: mk_m68k_jump_table write 16
78 m_m68k_write32_table: mk_m68k_jump_table write 32
82 mk_s68k_jump_table1 read 8
83 mk_s68k_jump_table2 read 8
85 mk_s68k_jump_table1 read 16
86 mk_s68k_jump_table2 read 16
88 mk_s68k_jump_table1 read 32
89 mk_s68k_jump_table2 read 32
91 mk_s68k_jump_table1 write 8
92 mk_s68k_jump_table2 write 8
94 mk_s68k_jump_table1 write 16
95 mk_s68k_jump_table2 write 16
97 mk_s68k_jump_table1 write 32
98 mk_s68k_jump_table2 write 32
101 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
106 .global PicoMemResetCD
107 .global PicoReadM68k8
108 .global PicoReadM68k16
109 .global PicoReadM68k32
110 .global PicoWriteM68k8
111 .global PicoWriteM68k16
112 .global PicoWriteM68k32
113 .global PicoReadS68k8
114 .global PicoReadS68k16
115 .global PicoReadS68k32
116 .global PicoWriteS68k8
117 .global PicoWriteS68k16
118 .global PicoWriteS68k32
120 @ externs, just for reference
124 .extern PicoVideoRead
125 .extern Read_CDC_Host
126 .extern m68k_reg_write8
130 .extern s68k_reg_read16
133 .extern s68k_reg_write8
136 @ r0=reg3, r1-r3=temp
137 .macro mk_update_table on sz @ operation name, size
138 @ we only set word-ram handlers
139 ldr r1, =m_m68k_&\on&\sz&_table
140 ldr r12,=m_s68k_&\on&\sz&_table
145 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
146 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
149 ldr r2, =m_&\on&_null
160 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
161 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
164 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
165 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
172 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
173 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
176 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
177 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
187 mk_update_table read 8
188 mk_update_table read 16
189 mk_update_table read 32
190 mk_update_table write 8
191 mk_update_table write 16
192 mk_update_table write 32
198 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
200 .macro mk_entry_m68k table
202 bic r0, r0, #0xff000000
203 and r3, r0, #0x00fe0000
204 ldr pc, [r2, r3, lsr #15]
207 PicoReadM68k8: @ u32 a
208 mk_entry_m68k m_m68k_read8_table
210 PicoReadM68k16: @ u32 a
211 mk_entry_m68k m_m68k_read16_table
213 PicoReadM68k32: @ u32 a
214 mk_entry_m68k m_m68k_read32_table
216 PicoWriteM68k8: @ u32 a, u8 d
217 mk_entry_m68k m_m68k_write8_table
219 PicoWriteM68k16: @ u32 a, u16 d
220 mk_entry_m68k m_m68k_write16_table
222 PicoWriteM68k32: @ u32 a, u32 d
223 mk_entry_m68k m_m68k_write32_table
226 .macro mk_entry_s68k table
228 bic r0, r0, #0xff000000
229 and r3, r0, #0x00fe0000
231 ldrlt pc, [r2, r3, lsr #15]
232 add r2, r2, #8*4 @ skip to table2
234 andge r3, r0, #0x00018000
235 ldrge pc, [r2, r3, lsr #13]
240 PicoReadS68k8: @ u32 a
241 mk_entry_s68k m_s68k_read8_table
243 PicoReadS68k16: @ u32 a
244 mk_entry_s68k m_s68k_read16_table
246 PicoReadS68k32: @ u32 a
247 mk_entry_s68k m_s68k_read32_table
249 PicoWriteS68k8: @ u32 a, u8 d
250 mk_entry_s68k m_s68k_write8_table
252 PicoWriteS68k16: @ u32 a, u16 d
253 mk_entry_s68k m_s68k_write16_table
255 PicoWriteS68k32: @ u32 a, u32 d
256 mk_entry_s68k m_s68k_write32_table
261 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
265 @ r0=addr[in,out], r1,r2=tmp
267 ands r1, r0, #0x01c000
268 ldrne pc, [pc, r1, lsr #12]
269 beq 0f @ most common?
279 and r1, r0, #0x7e00 @ col
280 and r2, r0, #0x01fc @ row
282 orr r1, r2, r1, ror #13
285 and r1, r0, #0x3f00 @ col
286 and r2, r0, #0x00fc @ row
288 orr r1, r2, r1, ror #12
291 and r1, r0, #0x1f80 @ col
292 and r2, r0, #0x007c @ row
293 orr r1, r2, r1, ror #11
295 orr r1, r1, r2, lsr #6
298 and r1, r0, #0xfc00 @ col
299 and r2, r0, #0x03fc @ row
300 orr r1, r2, r1, ror #14
303 orr r0, r0, r1, ror #26 @ rol 4+2
313 moveq r0, r0, ror #16
314 orrne r0, r1, r0, lsl #16
318 @ r0=prt1, r1=data, r2=ptr2
323 movne r1, r1, lsr #16
329 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
338 ldr r1, =(Pico+0x22200)
339 bic r0, r0, #0xfe0000
346 m_m68k_read8_prgbank:
347 ldr r1, =(Pico+0x22200)
351 orr r3, r2, #0x002200
354 tst r3, #0x00020000 @ have bus?
357 and r2, r2, #0xc0000000 @ r3 & 0xC0
358 add r1, r1, r2, lsr #12
363 m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
364 m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
365 ldr r1, =(Pico+0x22200)
366 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
373 m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
374 ldr r1, =(Pico+0x22200)
375 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
382 m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
383 ldr r1, =(Pico+0x22200)
384 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
391 m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
393 ldr r1, =(Pico+0x22200)
394 add r0, r0, #0x0c0000
401 m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
403 ldr r1, =(Pico+0x22200)
404 add r0, r0, #0x0e0000
411 m_m68k_read8_system_io:
412 bic r2, r0, #0xfe0000
415 bne m_m68k_read8_misc
417 ldr r1, =(Pico+0x22200)
419 ldr r1, [r1] @ Pico.mcd (used everywhere)
421 ldrlt pc, [pc, r0, lsl #2]
423 .long m_m68k_read8_r00
424 .long m_m68k_read8_r01
425 .long m_m68k_read8_r02
426 .long m_m68k_read8_r03
427 .long m_m68k_read8_r04
428 .long m_read_null @ unused bits
429 .long m_m68k_read8_r06
430 .long m_m68k_read8_r07
431 .long m_m68k_read8_r08
432 .long m_m68k_read8_r09
433 .long m_read_null @ reserved
435 .long m_m68k_read8_r0c
436 .long m_m68k_read8_r0d
438 add r1, r1, #0x110000
440 and r0, r0, #0x04000000 @ we need irq2 mask state
444 add r1, r1, #0x110000
445 add r1, r1, #0x002200
446 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
449 add r1, r1, #0x110000
453 add r1, r1, #0x110000
458 add r1, r1, #0x110000
462 ldrb r0, [r1, #0x73] @ IRQ vector
469 bl Read_CDC_Host @ TODO: make it local
476 add r1, r1, #0x110000
477 add r1, r1, #0x002200
478 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
482 add r1, r1, #0x110000
483 add r1, r1, #0x002200
491 add r1, r1, #0x110000
499 cmp r2, #0xa00000 @ Z80 RAM?
501 @ ldreq r2, =z80Read8
506 bl OtherRead16 @ non-MCD version should be ok too
516 bxne lr @ invalid read
519 bl PicoVideoRead @ TODO: implement it in asm
528 bic r0, r0, #0xff0000
534 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
538 ldr r1, =(Pico+0x22200)
539 bic r0, r0, #0xfe0000
546 m_m68k_read16_prgbank:
547 ldr r1, =(Pico+0x22200)
551 orr r3, r2, #0x002200
554 tst r3, #0x00020000 @ have bus?
557 and r2, r2, #0xc0000000 @ r3 & 0xC0
558 add r1, r1, r2, lsr #12
563 m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
564 m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
565 ldr r1, =(Pico+0x22200)
566 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
573 m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
574 ldr r1, =(Pico+0x22200)
575 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
582 m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
583 ldr r1, =(Pico+0x22200)
584 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
591 m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
592 @ Warning: read32 relies on NOT using r3 and r12 here
594 ldr r1, =(Pico+0x22200)
595 add r0, r0, #0x0c0000
602 m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
604 ldr r1, =(Pico+0x22200)
605 add r0, r0, #0x0e0000
612 m_m68k_read16_system_io:
613 bic r1, r0, #0xfe0000
616 bne m_m68k_read16_misc
618 m_m68k_read16_m68k_regs:
619 ldr r1, =(Pico+0x22200)
621 ldr r1, [r1] @ Pico.mcd (used everywhere)
623 ldrlt pc, [pc, r0, lsl #1]
625 .long m_m68k_read16_r00
626 .long m_m68k_read16_r02
627 .long m_m68k_read16_r04
628 .long m_m68k_read16_r06
629 .long m_m68k_read16_r08
630 .long m_read_null @ reserved
631 .long m_m68k_read16_r0c
633 add r1, r1, #0x110000
635 add r1, r1, #0x002200
636 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
637 and r0, r0, #0x04000000 @ we need irq2 mask state
638 orr r0, r1, r0, lsr #11
641 add r1, r1, #0x110000
645 orr r0, r1, r0, lsl #8
648 add r1, r1, #0x110000
653 ldrh r0, [r1, #0x72] @ IRQ vector
659 add r1, r1, #0x110000
660 add r1, r1, #0x002200
666 addlt r1, r1, #0x110000
672 orr r0, r0, r1, lsl #8
685 bxne lr @ invalid read
692 bic r0, r0, #0xff0000
698 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
702 ldr r1, =(Pico+0x22200)
703 bic r0, r0, #0xfe0000
710 m_m68k_read32_prgbank:
711 ldr r1, =(Pico+0x22200)
715 orr r3, r2, #0x002200
718 tst r3, #0x00020000 @ have bus?
721 and r2, r2, #0xc0000000 @ r3 & 0xC0
722 add r1, r1, r2, lsr #12
727 m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
728 m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
729 ldr r1, =(Pico+0x22200)
730 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
737 m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
738 ldr r1, =(Pico+0x22200)
739 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
746 m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
747 ldr r1, =(Pico+0x22200)
748 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
755 m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
757 bne m_m68k_read32_wordram1_1M_b0_unal
759 ldr r1, =(Pico+0x22200)
760 add r0, r0, #0x0c0000
765 m_m68k_read32_wordram1_1M_b0_unal:
766 @ hopefully this doesn't happen too often
769 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
773 bl m_m68k_read16_wordram1_1M_b0
774 orr r0, r0, r3, lsl #16
778 m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
780 bne m_m68k_read32_wordram1_1M_b1_unal
782 ldr r1, =(Pico+0x22200)
783 add r0, r0, #0x0e0000
788 m_m68k_read32_wordram1_1M_b1_unal:
791 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
795 bl m_m68k_read16_wordram1_1M_b1
796 orr r0, r0, r3, lsl #16
800 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
801 m_m68k_read32_system_io:
802 bic r1, r0, #0xfe0000
805 bne m_m68k_read32_misc
808 blt m_m68k_read32_misc
812 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
813 ldr r0, =(Pico+0x22200)
816 orr r2, r2, r2, lsl #16
817 add r0, r0, #0x110000
819 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
820 and r0, r2, r0, lsr #8
821 orr r0, r0, r1, lsl #8
827 bl m_m68k_read16_system_io
829 bl m_m68k_read16_system_io
831 orr r0, r0, r1, lsl #16
838 bxne lr @ invalid read
846 orr r0, r0, r1, lsl #16
852 bic r0, r0, #0xff0000
859 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
867 m_m68k_write8_prgbank:
868 ldr r2, =(Pico+0x22200)
872 orr r3, r12, #0x002200
875 tst r3, #0x00020000 @ have bus?
877 and r12,r12,#0xc0000000 @ r3 & 0xC0
878 add r2, r2, r12, lsr #12
883 m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
884 m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
885 ldr r2, =(Pico+0x22200)
886 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
893 m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
894 ldr r2, =(Pico+0x22200)
895 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
902 m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
903 ldr r2, =(Pico+0x22200)
904 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
911 m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
914 ldr r2, =(Pico+0x22200)
915 add r0, r0, #0x0c0000
922 m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
925 ldr r2, =(Pico+0x22200)
926 add r0, r0, #0x0e0000
933 m_m68k_write8_system_io:
934 bic r2, r0, #0xfe0000
947 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
953 bic r0, r0, #0xff0000
959 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
966 m_m68k_write16_prgbank:
967 ldr r2, =(Pico+0x22200)
971 orr r3, r12, #0x002200
974 tst r3, #0x00020000 @ have bus?
976 and r12,r12,#0xc0000000 @ r3 & 0xC0
977 add r2, r2, r12, lsr #12
982 m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
983 m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
984 ldr r2, =(Pico+0x22200)
985 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
992 m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
993 ldr r2, =(Pico+0x22200)
994 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1001 m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1002 ldr r2, =(Pico+0x22200)
1003 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1010 m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1011 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1014 ldr r1, =(Pico+0x22200)
1015 add r0, r0, #0x0c0000
1022 m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1025 ldr r1, =(Pico+0x22200)
1026 add r0, r0, #0x0e0000
1033 m_m68k_write16_system_io:
1035 bic r2, r0, #0xfe0000
1040 m_m68k_write16_m68k_regs:
1043 stmfd sp!,{r2,r3,lr}
1046 ldmfd sp!,{r0,r1,lr}
1060 bic r0, r0, #0xff0000
1066 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1069 m_m68k_write32_bios:
1073 m_m68k_write32_prgbank:
1074 ldr r2, =(Pico+0x22200)
1078 orr r3, r12, #0x002200
1081 tst r3, #0x00020000 @ have bus?
1083 and r12,r12,#0xc0000000 @ r3 & 0xC0
1084 add r2, r2, r12, lsr #12
1089 m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1090 m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1091 ldr r2, =(Pico+0x22200)
1092 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1099 m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1100 ldr r2, =(Pico+0x22200)
1101 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1108 m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1109 ldr r2, =(Pico+0x22200)
1110 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1117 m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1119 bne m_m68k_write32_wordram1_1M_b0_unal
1122 ldr r2, =(Pico+0x22200)
1123 add r0, r0, #0x0c0000
1129 m_m68k_write32_wordram1_1M_b0_unal:
1130 @ hopefully this doesn't happen too often
1134 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1138 b m_m68k_write16_wordram1_1M_b0
1141 m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1143 bne m_m68k_write32_wordram1_1M_b1_unal
1146 ldr r2, =(Pico+0x22200)
1147 add r0, r0, #0x0e0000
1153 m_m68k_write32_wordram1_1M_b1_unal:
1157 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1161 b m_m68k_write16_wordram1_1M_b1
1164 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1165 m_m68k_write32_system_io:
1166 bic r2, r0, #0xfe0000
1169 bne m_m68k_write32_misc
1172 blt m_m68k_write32_regs
1175 @ Handle the 0x10-0x1f range
1176 ldr r0, =(Pico+0x22200)
1179 orr r3, r3, r3, lsl #16
1180 add r0, r0, #0x110000
1181 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1182 and r1, r3, r1, ror #24
1183 orr r1, r1, r12,lsl #8 @ end of byteswap
1186 movne r1, r1, lsr #16
1190 m_m68k_write32_regs:
1191 stmfd sp!,{r0,r1,lr}
1204 ldmfd sp!,{r0,r1,lr}
1208 m_m68k_write32_misc:
1209 stmfd sp!,{r0,r1,lr}
1212 ldmfd sp!,{r0,r1,lr}
1221 stmfd sp!,{r0,r1,lr}
1224 ldmfd sp!,{r0,r1,lr}
1231 bic r0, r0, #0xff0000
1239 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1242 m_s68k_read8_prg: @ 0x000000 - 0x07ffff
1243 ldr r1, =(Pico+0x22200)
1246 add r0, r0, #0x020000 @ map to our address
1251 m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
1252 ldr r1, =(Pico+0x22200)
1255 add r0, r0, #0x020000 @ map to our address (0x0a0000)
1260 m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1261 m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1266 m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1267 ldr r1, =(Pico+0x22200)
1274 m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff
1275 ldr r1, =(Pico+0x22200)
1276 add r0, r0, #0x020000 @ map to our offset, which is 0x0e0000
1283 m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1284 @ must not trash r3 and r12
1285 ldr r1, =(Pico+0x22200)
1288 bic r0, r0, #0xff0000
1289 bic r0, r0, #0x00fe00
1290 add r1, r1, #0x110000
1291 add r1, r1, #0x000200
1297 @ must not trash r3 and r12
1298 ldr r1, =(Pico+0x22200)
1299 bic r0, r0, #0xff0000
1300 @ bic r0, r0, #0x008000
1303 orr r2, r2, #0x002200
1305 bge m_s68k_read8_pcm_ram
1309 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1312 ldr r1, [r1, r2, lsl #2]
1314 moveq r0, r1, lsr #PCM_STEP_SHIFT
1315 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1319 m_s68k_read8_pcm_ram:
1322 add r1, r1, #0x100000 @ pcm_ram
1323 and r2, r2, #0x0f000000 @ bank
1324 add r1, r1, r2, lsr #12
1325 bic r0, r0, #0x00e000
1332 bic r0, r0, #0xff0000
1333 bic r0, r0, #0x008000
1339 ldrlo r2, =gfx_cd_read
1340 ldrhs r2, =s68k_reg_read16
1347 moveq r0, r0, lsr #8
1352 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1355 m_s68k_read16_prg: @ 0x000000 - 0x07ffff
1356 ldr r1, =(Pico+0x22200)
1359 add r0, r0, #0x020000 @ map to our address
1364 m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
1365 ldr r1, =(Pico+0x22200)
1368 add r0, r0, #0x020000 @ map to our address (0x0a0000)
1373 m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1374 m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1379 m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1380 ldr r1, =(Pico+0x22200)
1387 m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff
1388 ldr r1, =(Pico+0x22200)
1389 add r0, r0, #0x020000 @ map to our offset, which is 0x0e0000
1396 @ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1397 @ bram is not meant to be accessed by words, does any game do this?
1398 .equiv m_s68k_read16_backup, m_s68k_read8_backup
1401 @ m_s68k_read16_pcm:
1402 @ pcm is on 8-bit bus, would this be same as byte access?
1403 .equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1407 bic r0, r0, #0xff0000
1408 bic r0, r0, #0x008000
1409 bic r0, r0, #0x000001
1419 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1422 m_s68k_read32_prg: @ 0x000000 - 0x07ffff
1423 ldr r1, =(Pico+0x22200)
1426 add r0, r0, #0x020000 @ map to our address
1431 m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
1432 ldr r1, =(Pico+0x22200)
1435 add r0, r0, #0x020000 @ map to our address (0x0a0000)
1440 m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1441 m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1446 m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1447 ldr r1, =(Pico+0x22200)
1454 m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff
1455 ldr r1, =(Pico+0x22200)
1456 add r0, r0, #0x020000 @ map to our offset, which is 0x0e0000
1463 m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1464 @ bram is not meant to be accessed by words, does any game do this?
1467 bl m_s68k_read8_backup @ must preserve r3 and r12
1471 bl m_s68k_read8_backup
1472 orr r0, r0, r3, lsl #16
1479 bl m_s68k_read8_pcm @ must preserve r3 and r12
1484 orr r0, r0, r3, lsl #16
1489 bic r0, r0, #0xff0000
1490 bic r0, r0, #0x008000
1491 bic r0, r0, #0x000001
1498 blo m_s68k_read32_regs_gfx
1504 orr r0, r0, r1, lsl #16
1508 m_s68k_read32_regs_gfx:
1514 orr r0, r0, r1, lsl #16
1519 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1522 m_s68k_write8_prg: @ 0x000000 - 0x07ffff
1523 ldr r2, =(Pico+0x22200)
1526 add r0, r0, #0x020000 @ map to our address
1531 m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
1532 ldr r2, =(Pico+0x22200)
1535 add r0, r0, #0x020000 @ map to our address (0x0a0000)
1540 m_s68k_write8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1541 m_s68k_write8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1545 m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1546 ldr r2, =(Pico+0x22200)
1553 m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff
1554 ldr r2, =(Pico+0x22200)
1555 add r0, r0, #0x020000 @ map to our offset, which is 0x0e0000
1562 m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1563 @ must not trash r3 and r12
1564 ldr r2, =(Pico+0x22200)
1567 bic r0, r0, #0xff0000
1568 bic r0, r0, #0x00fe00
1569 add r2, r2, #0x110000
1570 add r2, r2, #0x000200
1574 str r0, [r1, #0x0e] @ SRam.changed = 1
1579 bic r0, r0, #0xff0000
1581 movlt r0, r0, lsr #1
1587 m_s68k_write8_pcm_ram:
1588 ldr r3, =(Pico+0x22200)
1589 bic r0, r0, #0x00e000
1592 add r2, r3, #0x110000
1593 add r2, r2, #0x002200
1594 add r2, r2, #0x000040
1596 add r3, r3, #0x100000 @ pcm_ram
1597 and r2, r2, #0x0f000000 @ bank
1598 add r3, r3, r2, lsr #12
1604 bic r0, r0, #0xff0000
1605 bic r0, r0, #0x008000
1615 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1618 m_s68k_write16_prg: @ 0x000000 - 0x07ffff
1619 ldr r2, =(Pico+0x22200)
1622 add r0, r0, #0x020000 @ map to our address
1627 m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
1628 ldr r2, =(Pico+0x22200)
1631 add r0, r0, #0x020000 @ map to our address (0x0a0000)
1636 m_s68k_write16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1637 m_s68k_write16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1641 m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1642 ldr r2, =(Pico+0x22200)
1649 m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff
1650 ldr r2, =(Pico+0x22200)
1651 add r0, r0, #0x020000 @ map to our offset, which is 0x0e0000
1658 @ m_s68k_write16_backup:
1659 .equiv m_s68k_write16_backup, m_s68k_write8_backup
1662 @ m_s68k_write16_pcm:
1663 .equiv m_s68k_write16_pcm, m_s68k_write8_pcm
1666 m_s68k_write16_regs:
1667 bic r0, r0, #0xff0000
1668 bic r0, r0, #0x008000
1676 blo m_s68k_write16_regs_gfx
1677 stmfd sp!,{r2,r3,lr}
1680 ldmfd sp!,{r0,r1,lr}
1683 m_s68k_write16_regs_gfx:
1684 stmfd sp!,{r2,r3,lr}
1687 ldmfd sp!,{r0,r1,lr}
1691 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1694 m_s68k_write32_prg: @ 0x000000 - 0x07ffff
1695 ldr r2, =(Pico+0x22200)
1698 add r0, r0, #0x020000 @ map to our address
1703 m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
1704 ldr r2, =(Pico+0x22200)
1707 add r0, r0, #0x020000 @ map to our address (0x0a0000)
1712 m_s68k_write32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1713 m_s68k_write32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1717 m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1718 ldr r2, =(Pico+0x22200)
1725 m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff
1726 ldr r2, =(Pico+0x22200)
1727 add r0, r0, #0x020000 @ map to our offset, which is 0x0e0000
1734 m_s68k_write32_backup:
1739 bl m_s68k_write8_backup @ must preserve r3 and r12
1743 b m_s68k_write8_backup
1747 bic r0, r0, #0xff0000
1749 blt m_s68k_write32_pcm_reg
1754 m_s68k_write32_pcm_ram:
1755 ldr r3, =(Pico+0x22200)
1756 bic r0, r0, #0x00e000
1759 add r2, r3, #0x110000
1760 add r2, r2, #0x002200
1761 add r2, r2, #0x000040
1763 add r3, r3, #0x100000 @ pcm_ram
1764 and r2, r2, #0x0f000000 @ bank
1765 add r3, r3, r2, lsr #12
1772 m_s68k_write32_pcm_reg:
1776 stmfd sp!,{r2,r3,lr}
1779 ldmfd sp!,{r0,r1,lr}
1783 m_s68k_write32_regs:
1784 bic r0, r0, #0xff0000
1785 bic r0, r0, #0x008000
1791 blo m_s68k_write32_regs_gfx
1793 stmfd sp!,{r0,r1,lr}
1806 ldmfd sp!,{r0,r1,lr}
1810 m_s68k_write32_regs_gfx:
1811 stmfd sp!,{r0,r1,lr}
1824 ldmfd sp!,{r0,r1,lr}