3 @ Memory i/o handlers for Sega/Mega CD emulation
4 @ (c) Copyright 2007, Grazvydas "notaz" Ignotas
9 .equiv PCM_STEP_SHIFT, 11
16 .macro mk_m68k_jump_table on sz @ operation name, size
17 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
18 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
19 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
20 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
23 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
24 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
25 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
26 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
29 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x400000
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x600000
34 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7fffff
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
39 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
41 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
42 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
44 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
46 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
47 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
48 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
49 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
50 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
51 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
52 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
56 .macro mk_s68k_jump_table on sz @ operation name, size
57 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
58 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
59 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
60 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
61 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
65 @ the jumptables themselves.
66 m_m68k_read8_table: mk_m68k_jump_table read 8
67 m_m68k_read16_table: mk_m68k_jump_table read 16
68 m_m68k_read32_table: mk_m68k_jump_table read 32
69 m_m68k_write8_table: mk_m68k_jump_table write 8
70 m_m68k_write16_table: mk_m68k_jump_table write 16
71 m_m68k_write32_table: mk_m68k_jump_table write 32
73 m_s68k_read8_table: mk_s68k_jump_table read 8
74 m_s68k_read16_table: mk_s68k_jump_table read 16
75 m_s68k_read32_table: mk_s68k_jump_table read 32
76 m_s68k_write8_table: mk_s68k_jump_table write 8
77 m_s68k_write16_table: mk_s68k_jump_table write 16
78 m_s68k_write32_table: mk_s68k_jump_table write 32
80 m_s68k_decode_write_table:
81 .long m_s68k_write8_2M_decode_b0_m0
82 .long m_s68k_write16_2M_decode_b0_m0
83 .long m_s68k_write32_2M_decode_b0_m0
84 .long m_s68k_write8_2M_decode_b0_m1
85 .long m_s68k_write16_2M_decode_b0_m1
86 .long m_s68k_write32_2M_decode_b0_m1
87 .long m_s68k_write8_2M_decode_b0_m2
88 .long m_s68k_write16_2M_decode_b0_m2
89 .long m_s68k_write32_2M_decode_b0_m2
90 .long m_s68k_write8_2M_decode_b1_m0
91 .long m_s68k_write16_2M_decode_b1_m0
92 .long m_s68k_write32_2M_decode_b1_m0
93 .long m_s68k_write8_2M_decode_b1_m1
94 .long m_s68k_write16_2M_decode_b1_m1
95 .long m_s68k_write32_2M_decode_b1_m1
96 .long m_s68k_write8_2M_decode_b1_m2
97 .long m_s68k_write16_2M_decode_b1_m2
98 .long m_s68k_write32_2M_decode_b1_m2
101 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
106 .global PicoMemResetCD
107 .global PicoMemResetCDdecode
108 .global PicoReadM68k8
109 .global PicoReadM68k16
110 .global PicoReadM68k32
111 .global PicoWriteM68k8
112 .global PicoWriteM68k16
113 .global PicoWriteM68k32
114 .global PicoReadS68k8
115 .global PicoReadS68k16
116 .global PicoReadS68k32
117 .global PicoWriteS68k8
118 .global PicoWriteS68k16
119 .global PicoWriteS68k32
121 @ externs, just for reference
125 .extern PicoVideoRead
126 .extern Read_CDC_Host
127 .extern m68k_reg_write8
131 .extern s68k_reg_read16
133 .extern gfx_cd_write16
134 .extern s68k_reg_write8
137 @ r0=reg3, r1-r3=temp
138 .macro mk_update_table on sz @ operation name, size
139 @ we only set word-ram handlers
140 ldr r1, =m_m68k_&\on&\sz&_table
141 ldr r12,=m_s68k_&\on&\sz&_table
146 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
147 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
150 ldr r2, =m_&\on&_null
161 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
162 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
165 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
167 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
175 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
176 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
179 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
181 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
192 mk_update_table read 8
193 mk_update_table read 16
194 mk_update_table read 32
195 mk_update_table write 8
196 mk_update_table write 16
197 mk_update_table write 32
201 PicoMemResetCDdecode: @r3
203 bxeq lr @ we should not be called in 2M mode
204 ldr r1, =m_s68k_write8_table
205 ldr r3, =m_s68k_decode_write_table
209 moveq r2, #2 @ mode3 is same as mode2?
211 addeq r2, r2, #3 @ bank1 (r2=0..5)
212 add r2, r2, r2, lsl #1 @ *= 3
213 add r2, r3, r2, lsl #2
214 ldmia r2, {r0,r3,r12}
217 str r3, [r1, #4*4+8*4]
218 str r3, [r1, #5*4+8*4]
219 str r12,[r1, #4*4+8*4*2]
220 str r12,[r1, #5*4+8*4*2]
226 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
228 .macro mk_entry_m68k table
230 bic r0, r0, #0xff000000
231 and r3, r0, #0x00fe0000
232 ldr pc, [r2, r3, lsr #15]
235 PicoReadM68k8: @ u32 a
236 mk_entry_m68k m_m68k_read8_table
238 PicoReadM68k16: @ u32 a
239 mk_entry_m68k m_m68k_read16_table
241 PicoReadM68k32: @ u32 a
242 mk_entry_m68k m_m68k_read32_table
244 PicoWriteM68k8: @ u32 a, u8 d
245 mk_entry_m68k m_m68k_write8_table
247 PicoWriteM68k16: @ u32 a, u16 d
248 mk_entry_m68k m_m68k_write16_table
250 PicoWriteM68k32: @ u32 a, u32 d
251 mk_entry_m68k m_m68k_write32_table
254 .macro mk_entry_s68k on sz
255 bic r0, r0, #0xff000000
257 blt m_s68k_&\on&\sz&_prg
259 ldrlt r2, =m_s68k_&\on&\sz&_table
260 andlt r3, r0, #0x000e0000
261 ldrlt pc, [r2, r3, lsr #15]
263 orr r3, r3, #0x00008000
265 bge m_s68k_&\on&\sz&_regs
267 bge m_s68k_&\on&\sz&_pcm
269 bge m_s68k_&\on&\sz&_backup
274 PicoReadS68k8: @ u32 a
277 PicoReadS68k16: @ u32 a
278 mk_entry_s68k read 16
280 PicoReadS68k32: @ u32 a
281 mk_entry_s68k read 32
283 PicoWriteS68k8: @ u32 a, u8 d
284 mk_entry_s68k write 8
286 PicoWriteS68k16: @ u32 a, u16 d
287 mk_entry_s68k write 16
289 PicoWriteS68k32: @ u32 a, u32 d
290 mk_entry_s68k write 32
295 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
299 @ r0=addr[in,out], r1,r2=tmp
301 ands r1, r0, #0x01c000
302 ldrne pc, [pc, r1, lsr #12]
303 beq 0f @ most common?
313 and r1, r0, #0x7e00 @ col
314 and r2, r0, #0x01fc @ row
316 orr r1, r2, r1, ror #13
319 and r1, r0, #0x3f00 @ col
320 and r2, r0, #0x00fc @ row
322 orr r1, r2, r1, ror #12
325 and r1, r0, #0x1f80 @ col
326 and r2, r0, #0x007c @ row
327 orr r1, r2, r1, ror #11
329 orr r1, r1, r2, lsr #6
332 and r1, r0, #0xfc00 @ col
333 and r2, r0, #0x03fc @ row
334 orr r1, r2, r1, ror #14
337 orr r0, r0, r1, ror #26 @ rol 4+2
341 @ r0=prt1, r1=ptr2; unaligned ptr MUST be r0
347 moveq r0, r0, ror #16
348 orrne r0, r1, r0, lsl #16
352 @ r0=prt1, r1=data, r2=ptr2; unaligned ptr MUST be r0
357 movne r1, r1, lsr #16
363 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
372 ldr r1, =(Pico+0x22200)
373 bic r0, r0, #0xfe0000
380 m_m68k_read8_prgbank:
381 ldr r1, =(Pico+0x22200)
385 orr r3, r2, #0x002200
388 tst r3, #0x00020000 @ have bus?
391 and r2, r2, #0xc0000000 @ r3 & 0xC0
392 add r1, r1, r2, lsr #12
397 m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
398 m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
399 ldr r1, =(Pico+0x22200)
400 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
407 m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
408 ldr r1, =(Pico+0x22200)
409 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
416 m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
417 ldr r1, =(Pico+0x22200)
418 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
425 m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
427 ldr r1, =(Pico+0x22200)
428 add r0, r0, #0x0c0000
435 m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
437 ldr r1, =(Pico+0x22200)
438 add r0, r0, #0x0e0000
445 m_m68k_read8_system_io:
446 bic r2, r0, #0xfe0000
449 bne m_m68k_read8_misc
451 ldr r1, =(Pico+0x22200)
453 ldr r1, [r1] @ Pico.mcd (used everywhere)
455 ldrlt pc, [pc, r0, lsl #2]
457 .long m_m68k_read8_r00
458 .long m_m68k_read8_r01
459 .long m_m68k_read8_r02
460 .long m_m68k_read8_r03
461 .long m_m68k_read8_r04
462 .long m_read_null @ unused bits
463 .long m_m68k_read8_r06
464 .long m_m68k_read8_r07
465 .long m_m68k_read8_r08
466 .long m_m68k_read8_r09
467 .long m_read_null @ reserved
469 .long m_m68k_read8_r0c
470 .long m_m68k_read8_r0d
472 add r1, r1, #0x110000
474 and r0, r0, #0x04000000 @ we need irq2 mask state
478 add r1, r1, #0x110000
479 add r1, r1, #0x002200
480 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
483 add r1, r1, #0x110000
487 add r1, r1, #0x110000
492 add r1, r1, #0x110000
496 ldrb r0, [r1, #0x73] @ IRQ vector
503 bl Read_CDC_Host @ TODO: make it local
510 add r1, r1, #0x110000
511 add r1, r1, #0x002200
512 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
516 add r1, r1, #0x110000
517 add r1, r1, #0x002200
525 add r1, r1, #0x110000
533 cmp r2, #0xa00000 @ Z80 RAM?
535 @ ldreq r2, =z80Read8
540 bl OtherRead16 @ non-MCD version should be ok too
550 bxne lr @ invalid read
553 bl PicoVideoRead @ TODO: implement it in asm
562 bic r0, r0, #0xff0000
568 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
572 ldr r1, =(Pico+0x22200)
573 bic r0, r0, #0xfe0000
580 m_m68k_read16_prgbank:
581 ldr r1, =(Pico+0x22200)
585 orr r3, r2, #0x002200
588 tst r3, #0x00020000 @ have bus?
591 and r2, r2, #0xc0000000 @ r3 & 0xC0
592 add r1, r1, r2, lsr #12
597 m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
598 m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
599 ldr r1, =(Pico+0x22200)
600 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
607 m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
608 ldr r1, =(Pico+0x22200)
609 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
616 m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
617 ldr r1, =(Pico+0x22200)
618 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
625 m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
626 @ Warning: read32 relies on NOT using r3 and r12 here
628 ldr r1, =(Pico+0x22200)
629 add r0, r0, #0x0c0000
636 m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
638 ldr r1, =(Pico+0x22200)
639 add r0, r0, #0x0e0000
646 m_m68k_read16_system_io:
647 bic r1, r0, #0xfe0000
650 bne m_m68k_read16_misc
652 m_m68k_read16_m68k_regs:
653 ldr r1, =(Pico+0x22200)
655 ldr r1, [r1] @ Pico.mcd (used everywhere)
657 ldrlt pc, [pc, r0, lsl #1]
659 .long m_m68k_read16_r00
660 .long m_m68k_read16_r02
661 .long m_m68k_read16_r04
662 .long m_m68k_read16_r06
663 .long m_m68k_read16_r08
664 .long m_read_null @ reserved
665 .long m_m68k_read16_r0c
667 add r1, r1, #0x110000
669 add r1, r1, #0x002200
670 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
671 and r0, r0, #0x04000000 @ we need irq2 mask state
672 orr r0, r1, r0, lsr #11
675 add r1, r1, #0x110000
679 orr r0, r1, r0, lsl #8
682 add r1, r1, #0x110000
687 ldrh r0, [r1, #0x72] @ IRQ vector
693 add r1, r1, #0x110000
694 add r1, r1, #0x002200
700 addlt r1, r1, #0x110000
706 orr r0, r0, r1, lsl #8
719 bxne lr @ invalid read
726 bic r0, r0, #0xff0000
732 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
736 ldr r1, =(Pico+0x22200)
737 bic r0, r0, #0xfe0000
744 m_m68k_read32_prgbank:
745 ldr r1, =(Pico+0x22200)
749 orr r3, r2, #0x002200
752 tst r3, #0x00020000 @ have bus?
755 and r2, r2, #0xc0000000 @ r3 & 0xC0
756 add r1, r1, r2, lsr #12
761 m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
762 m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
763 ldr r1, =(Pico+0x22200)
764 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
771 m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
772 ldr r1, =(Pico+0x22200)
773 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
780 m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
781 ldr r1, =(Pico+0x22200)
782 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
789 m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
791 bne m_m68k_read32_wordram1_1M_b0_unal
793 ldr r1, =(Pico+0x22200)
794 add r0, r0, #0x0c0000
799 m_m68k_read32_wordram1_1M_b0_unal:
800 @ hopefully this doesn't happen too often
803 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
807 bl m_m68k_read16_wordram1_1M_b0
808 orr r0, r0, r3, lsl #16
812 m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
814 bne m_m68k_read32_wordram1_1M_b1_unal
816 ldr r1, =(Pico+0x22200)
817 add r0, r0, #0x0e0000
822 m_m68k_read32_wordram1_1M_b1_unal:
825 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
829 bl m_m68k_read16_wordram1_1M_b1
830 orr r0, r0, r3, lsl #16
834 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
835 m_m68k_read32_system_io:
836 bic r1, r0, #0xfe0000
839 bne m_m68k_read32_misc
842 blt m_m68k_read32_misc
846 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
848 ldr r1, =(Pico+0x22200)
851 orr r2, r2, r2, lsl #16
852 add r1, r1, #0x110000
854 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
855 and r0, r2, r0, lsr #8
856 orr r0, r0, r1, lsl #8
862 bl m_m68k_read16_system_io
864 bl m_m68k_read16_system_io
866 orr r0, r0, r1, lsl #16
873 bxne lr @ invalid read
881 orr r0, r0, r1, lsl #16
887 bic r0, r0, #0xff0000
894 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
902 m_m68k_write8_prgbank:
903 ldr r2, =(Pico+0x22200)
907 orr r3, r12, #0x002200
910 tst r3, #0x00020000 @ have bus?
912 and r12,r12,#0xc0000000 @ r3 & 0xC0
913 add r2, r2, r12, lsr #12
918 m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
919 m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
920 ldr r2, =(Pico+0x22200)
921 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
928 m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
929 ldr r2, =(Pico+0x22200)
930 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
937 m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
938 ldr r2, =(Pico+0x22200)
939 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
946 m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
949 ldr r2, =(Pico+0x22200)
950 add r0, r0, #0x0c0000
957 m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
960 ldr r2, =(Pico+0x22200)
961 add r0, r0, #0x0e0000
968 m_m68k_write8_system_io:
969 bic r2, r0, #0xfe0000
982 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
988 bic r0, r0, #0xff0000
994 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1001 m_m68k_write16_prgbank:
1002 ldr r2, =(Pico+0x22200)
1006 orr r3, r12, #0x002200
1009 tst r3, #0x00020000 @ have bus?
1011 and r12,r12,#0xc0000000 @ r3 & 0xC0
1012 add r2, r2, r12, lsr #12
1017 m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
1018 m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
1019 ldr r2, =(Pico+0x22200)
1020 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1027 m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1028 ldr r2, =(Pico+0x22200)
1029 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1036 m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1037 ldr r2, =(Pico+0x22200)
1038 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1045 m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1046 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1049 ldr r1, =(Pico+0x22200)
1050 add r0, r0, #0x0c0000
1057 m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1060 ldr r1, =(Pico+0x22200)
1061 add r0, r0, #0x0e0000
1068 m_m68k_write16_system_io:
1070 bic r2, r0, #0xfe0000
1075 m_m68k_write16_m68k_regs:
1078 stmfd sp!,{r2,r3,lr}
1081 ldmfd sp!,{r0,r1,lr}
1095 bic r0, r0, #0xff0000
1101 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1104 m_m68k_write32_bios:
1108 m_m68k_write32_prgbank:
1109 ldr r2, =(Pico+0x22200)
1113 orr r3, r12, #0x002200
1116 tst r3, #0x00020000 @ have bus?
1118 and r12,r12,#0xc0000000 @ r3 & 0xC0
1119 add r2, r2, r12, lsr #12
1124 m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1125 m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1126 ldr r2, =(Pico+0x22200)
1127 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1134 m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1135 ldr r2, =(Pico+0x22200)
1136 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1143 m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1144 ldr r2, =(Pico+0x22200)
1145 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1152 m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1154 bne m_m68k_write32_wordram1_1M_b0_unal
1157 ldr r2, =(Pico+0x22200)
1158 add r0, r0, #0x0c0000
1164 m_m68k_write32_wordram1_1M_b0_unal:
1165 @ hopefully this doesn't happen too often
1169 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1173 b m_m68k_write16_wordram1_1M_b0
1176 m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1178 bne m_m68k_write32_wordram1_1M_b1_unal
1181 ldr r2, =(Pico+0x22200)
1182 add r0, r0, #0x0e0000
1188 m_m68k_write32_wordram1_1M_b1_unal:
1192 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1196 b m_m68k_write16_wordram1_1M_b1
1199 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1200 m_m68k_write32_system_io:
1201 bic r2, r0, #0xfe0000
1204 bne m_m68k_write32_misc
1207 blt m_m68k_write32_regs
1210 @ Handle the 0x10-0x1f range
1211 ldr r0, =(Pico+0x22200)
1214 orr r3, r3, r3, lsl #16
1215 add r0, r0, #0x110000
1216 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1217 and r1, r3, r1, ror #24
1218 orr r1, r1, r12,lsl #8 @ end of byteswap
1221 movne r1, r1, lsr #16
1225 m_m68k_write32_regs:
1227 stmfd sp!,{r0,r1,lr}
1240 ldmfd sp!,{r0,r1,lr}
1244 m_m68k_write32_misc:
1246 stmfd sp!,{r0,r1,lr}
1249 ldmfd sp!,{r0,r1,lr}
1258 stmfd sp!,{r0,r1,lr}
1261 ldmfd sp!,{r0,r1,lr}
1268 bic r0, r0, #0xff0000
1276 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1278 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1281 .macro m_s68k_read8_ram map_addr
1282 ldr r1, =(Pico+0x22200)
1286 add r0, r0, #\map_addr @ map to our address
1292 .macro m_s68k_read8_wordram_2M_decode map_addr
1293 ldr r2, =(Pico+0x22200)
1296 movs r0, r0, lsr #1 @ +4-6 <<16
1297 add r2, r2, #\map_addr @ map to our address
1299 movcc r0, r0, lsr #4
1305 m_s68k_read8_prg: @ 0x000000 - 0x07ffff
1306 m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
1307 m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1308 m_s68k_read8_ram 0x020000
1311 m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1312 m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2
1315 m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1316 m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2
1319 m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1323 m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1324 @ must not trash r3 and r12
1325 ldr r1, =(Pico+0x22200)
1328 bic r0, r0, #0xff0000
1329 bic r0, r0, #0x00e000
1330 add r1, r1, #0x110000
1331 add r1, r1, #0x000200
1337 @ must not trash r3 and r12
1338 ldr r1, =(Pico+0x22200)
1339 bic r0, r0, #0xff0000
1340 @ bic r0, r0, #0x008000
1343 orr r2, r2, #0x002200
1345 bge m_s68k_read8_pcm_ram
1349 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1352 ldr r1, [r1, r2, lsl #2]
1354 moveq r0, r1, lsr #PCM_STEP_SHIFT
1355 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1359 m_s68k_read8_pcm_ram:
1362 add r1, r1, #0x100000 @ pcm_ram
1363 and r2, r2, #0x0f000000 @ bank
1364 add r1, r1, r2, lsr #12
1365 bic r0, r0, #0x00e000
1372 bic r0, r0, #0xff0000
1373 bic r0, r0, #0x008000
1379 ldrlo r2, =gfx_cd_read
1380 ldrhs r2, =s68k_reg_read16
1387 moveq r0, r0, lsr #8
1392 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1395 .macro m_s68k_read16_ram map_addr
1396 ldr r1, =(Pico+0x22200)
1400 add r0, r0, #\map_addr @ map to our address
1406 .macro m_s68k_read16_wordram_2M_decode map_addr
1407 ldr r2, =(Pico+0x22200)
1410 mov r0, r0, lsr #1 @ +4-6 <<16
1411 add r2, r2, #\map_addr @ map to our address
1413 orr r0, r0, r0, lsl #4
1419 m_s68k_read16_prg: @ 0x000000 - 0x07ffff
1420 m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
1421 m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1422 m_s68k_read16_ram 0x020000
1425 m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1426 m_s68k_read16_wordram_2M_decode 0x080000
1429 m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1430 m_s68k_read16_wordram_2M_decode 0x0a0000
1433 m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1437 @ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1438 @ bram is not meant to be accessed by words, does any game do this?
1439 .equiv m_s68k_read16_backup, m_s68k_read8_backup
1442 @ m_s68k_read16_pcm:
1443 @ pcm is on 8-bit bus, would this be same as byte access?
1444 .equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1448 bic r0, r0, #0xff0000
1449 bic r0, r0, #0x008000
1450 bic r0, r0, #0x000001
1460 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1463 .macro m_s68k_read32_ram map_addr
1464 ldr r1, =(Pico+0x22200)
1468 add r0, r0, #\map_addr @ map to our address
1474 .macro m_s68k_read32_wordram_2M_decode map_addr
1475 ldr r2, =(Pico+0x22200)
1478 mov r0, r0, lsr #1 @ +4-6 <<16
1479 add r2, r2, #\map_addr @ map to our address
1482 ldrneb r0, [r2, #-1]
1484 orr r1, r1, r1, lsl #4
1486 orr r0, r0, r0, lsl #4
1488 orr r0, r0, r1, lsl #16
1493 m_s68k_read32_prg: @ 0x000000 - 0x07ffff
1494 m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
1495 m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1496 m_s68k_read32_ram 0x020000
1499 m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1500 m_s68k_read32_wordram_2M_decode 0x080000
1503 m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1504 m_s68k_read32_wordram_2M_decode 0x0a0000
1507 m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1511 m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1512 @ bram is not meant to be accessed by words, does any game do this?
1515 bl m_s68k_read8_backup @ must preserve r3 and r12
1519 bl m_s68k_read8_backup
1520 orr r0, r0, r3, lsl #16
1527 bl m_s68k_read8_pcm @ must preserve r3 and r12
1532 orr r0, r0, r3, lsl #16
1537 bic r0, r0, #0xff0000
1538 bic r0, r0, #0x008000
1539 bic r0, r0, #0x000001
1546 blo m_s68k_read32_regs_gfx
1552 orr r0, r0, r1, lsl #16
1556 m_s68k_read32_regs_gfx:
1562 orr r0, r0, r1, lsl #16
1567 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1570 .macro m_s68k_write8_ram map_addr
1571 ldr r2, =(Pico+0x22200)
1575 add r0, r0, #\map_addr @ map to our address
1581 .macro m_s68k_write8_2M_decode map_addr
1582 ldr r2, =(Pico+0x22200)
1585 movs r0, r0, lsr #1 @ +4-6 <<16
1586 add r2, r2, #\map_addr @ map to our address
1589 .macro m_s68k_write8_2M_decode_m0 map_addr @ mode off
1590 m_s68k_write8_2M_decode \map_addr
1593 movcc r1, r1, lsl #4
1597 cmp r0, r3 @ avoid writing if result is same
1602 .macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite
1605 m_s68k_write8_2M_decode \map_addr
1607 movcc r1, r1, lsl #4
1618 .macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite
1621 m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode
1626 m_s68k_write8_prg: @ 0x000000 - 0x07ffff
1627 m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
1628 m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1629 m_s68k_write8_ram 0x020000
1632 m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1633 m_s68k_write8_2M_decode_m0 0x080000
1635 m_s68k_write8_2M_decode_b0_m1:
1636 m_s68k_write8_2M_decode_m1 0x080000
1638 m_s68k_write8_2M_decode_b0_m2:
1639 m_s68k_write8_2M_decode_m2 0x080000
1641 m_s68k_write8_2M_decode_b1_m0:
1642 m_s68k_write8_2M_decode_m0 0x0a0000
1644 m_s68k_write8_2M_decode_b1_m1:
1645 m_s68k_write8_2M_decode_m1 0x0a0000
1647 m_s68k_write8_2M_decode_b1_m2:
1648 m_s68k_write8_2M_decode_m2 0x0a0000
1651 m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1655 m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1656 @ must not trash r3 and r12
1657 ldr r2, =(Pico+0x22200)
1660 bic r0, r0, #0xff0000
1661 bic r0, r0, #0x00e000
1662 add r2, r2, #0x110000
1663 add r2, r2, #0x000200
1667 str r0, [r1, #0x0e] @ SRam.changed = 1
1672 bic r0, r0, #0xff0000
1674 movlt r0, r0, lsr #1
1680 m_s68k_write8_pcm_ram:
1681 ldr r3, =(Pico+0x22200)
1682 bic r0, r0, #0x00e000
1685 add r2, r3, #0x110000
1686 add r2, r2, #0x002200
1687 add r2, r2, #0x000040
1689 add r3, r3, #0x100000 @ pcm_ram
1690 and r2, r2, #0x0f000000 @ bank
1691 add r3, r3, r2, lsr #12
1697 bic r0, r0, #0xff0000
1698 bic r0, r0, #0x008000
1706 orr r1, r1, r1, lsl #8
1710 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1713 .macro m_s68k_write16_ram map_addr
1714 ldr r2, =(Pico+0x22200)
1718 add r0, r0, #\map_addr @ map to our address
1724 .macro m_s68k_write16_2M_decode map_addr
1725 ldr r2, =(Pico+0x22200)
1728 mov r0, r0, lsr #1 @ +4-6 <<16
1729 add r2, r2, #\map_addr @ map to our address
1732 .macro m_s68k_write16_2M_decode_m0 map_addr @ mode off
1733 m_s68k_write16_2M_decode \map_addr
1735 orr r1, r1, r1, lsr #4
1740 .macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite
1741 bics r1, r1, #0xf000
1742 bicnes r1, r1, #0x00f0
1744 orr r1, r1, r1, lsr #4
1745 m_s68k_write16_2M_decode \map_addr
1757 .macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite
1758 bics r1, r1, #0xf000
1759 bicnes r1, r1, #0x00f0
1761 orr r1, r1, r1, lsr #4
1762 m_s68k_write16_2M_decode \map_addr
1776 m_s68k_write16_prg: @ 0x000000 - 0x07ffff
1777 m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
1778 m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1779 m_s68k_write16_ram 0x020000
1782 m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1783 m_s68k_write16_2M_decode_m0 0x080000
1785 m_s68k_write16_2M_decode_b0_m1:
1786 m_s68k_write16_2M_decode_m1 0x080000
1788 m_s68k_write16_2M_decode_b0_m2:
1789 m_s68k_write16_2M_decode_m2 0x080000
1791 m_s68k_write16_2M_decode_b1_m0:
1792 m_s68k_write16_2M_decode_m0 0x0a0000
1794 m_s68k_write16_2M_decode_b1_m1:
1795 m_s68k_write16_2M_decode_m1 0x0a0000
1797 m_s68k_write16_2M_decode_b1_m2:
1798 m_s68k_write16_2M_decode_m2 0x0a0000
1801 m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1802 m_s68k_write16_ram 0
1805 @ m_s68k_write16_backup:
1806 .equiv m_s68k_write16_backup, m_s68k_write8_backup
1809 @ m_s68k_write16_pcm:
1810 .equiv m_s68k_write16_pcm, m_s68k_write8_pcm
1813 m_s68k_write16_regs:
1814 bic r0, r0, #0xff0000
1815 bic r0, r0, #0x008000
1821 beq m_s68k_write16_regs_spec
1827 stmfd sp!,{r2,r3,lr}
1830 ldmfd sp!,{r0,r1,lr}
1833 m_s68k_write16_regs_spec: @ special case
1834 ldr r2, =(Pico+0x22200)
1837 add r0, r0, #0x00000f
1838 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
1842 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1845 .macro m_s68k_write32_ram map_addr
1846 ldr r2, =(Pico+0x22200)
1850 add r0, r0, #\map_addr @ map to our address
1856 .macro m_s68k_write32_2M_decode map_addr
1857 ldr r2, =(Pico+0x22200)
1860 mov r0, r0, lsr #1 @ +4-6 <<16
1861 add r2, r2, #\map_addr @ map to our address
1864 .macro m_s68k_write32_2M_decode_m0 map_addr @ mode off
1865 m_s68k_write32_2M_decode \map_addr
1866 bic r1, r1, #0x000000f0
1867 bic r1, r1, #0x00f00000
1868 orr r1, r1, r1, lsr #4
1872 strneb r1, [r2, #-1]
1877 .macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite
1878 bics r1, r1, #0x000000f0
1879 bicnes r1, r1, #0x0000f000
1880 bicnes r1, r1, #0x00f00000
1881 bicnes r1, r1, #0xf0000000
1883 orr r1, r1, r1, lsr #4
1884 m_s68k_write32_2M_decode \map_addr
1887 ldrneb r0, [r2, #-1]
1889 and r12,r1, #0x0000000f
1890 orr r0, r0, r3, lsl #16
1891 orrne r0, r0, #0x80000000 @ remember addr lsb bit
1895 andeq r12,r1, #0x000000f0
1898 andeq r12,r1, #0x000f0000
1901 andeq r12,r1, #0x00f00000
1904 strneb r0, [r2, #-1]
1911 .macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite
1912 bics r1, r1, #0x000000f0
1913 bicnes r1, r1, #0x0000f000
1914 bicnes r1, r1, #0x00f00000
1915 bicnes r1, r1, #0xf0000000
1917 orr r1, r1, r1, lsr #4
1918 m_s68k_write32_2M_decode \map_addr
1921 ldrneb r0, [r2, #-1]
1923 orrne r1, r1, #0x80000000 @ remember addr lsb bit
1924 orr r0, r0, r3, lsl #16
1926 andeq r12,r0, #0x0000000f
1929 andeq r12,r0, #0x000000f0
1932 andeq r12,r0, #0x000f0000
1935 andeq r12,r0, #0x00f00000
1940 strneb r1, [r2, #-1]
1949 m_s68k_write32_prg: @ 0x000000 - 0x07ffff
1950 m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
1951 m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1952 m_s68k_write32_ram 0x020000
1955 m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1956 m_s68k_write32_2M_decode_m0 0x080000
1958 m_s68k_write32_2M_decode_b0_m1:
1959 m_s68k_write32_2M_decode_m1 0x080000
1961 m_s68k_write32_2M_decode_b0_m2:
1962 m_s68k_write32_2M_decode_m2 0x080000
1964 m_s68k_write32_2M_decode_b1_m0:
1965 m_s68k_write32_2M_decode_m0 0x0a0000
1967 m_s68k_write32_2M_decode_b1_m1:
1968 m_s68k_write32_2M_decode_m1 0x0a0000
1970 m_s68k_write32_2M_decode_b1_m2:
1971 m_s68k_write32_2M_decode_m2 0x0a0000
1974 m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1975 m_s68k_write32_ram 0
1978 m_s68k_write32_backup:
1983 bl m_s68k_write8_backup @ must preserve r3 and r12
1987 b m_s68k_write8_backup
1991 bic r0, r0, #0xff0000
1993 blt m_s68k_write32_pcm_reg
1998 m_s68k_write32_pcm_ram:
1999 ldr r3, =(Pico+0x22200)
2000 bic r0, r0, #0x00e000
2003 add r2, r3, #0x110000
2004 add r2, r2, #0x002200
2005 add r2, r2, #0x000040
2007 add r3, r3, #0x100000 @ pcm_ram
2008 and r2, r2, #0x0f000000 @ bank
2009 add r3, r3, r2, lsr #12
2016 m_s68k_write32_pcm_reg:
2020 stmfd sp!,{r2,r3,lr}
2023 ldmfd sp!,{r0,r1,lr}
2027 m_s68k_write32_regs:
2028 bic r0, r0, #0xff0000
2029 bic r0, r0, #0x008000
2036 blo m_s68k_write32_regs_gfx
2038 stmfd sp!,{r0,r1,lr}
2051 ldmfd sp!,{r0,r1,lr}
2055 m_s68k_write32_regs_gfx:
2058 stmfd sp!,{r2,r3,lr}
2061 ldmfd sp!,{r0,r1,lr}