3 @ Memory i/o handlers for Sega/Mega CD emulation
4 @ (c) Copyright 2007, Grazvydas "notaz" Ignotas
9 .equiv PCM_STEP_SHIFT, 11
16 .macro mk_m68k_jump_table on sz @ operation name, size
17 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
18 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
19 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
20 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
23 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
24 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
25 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
26 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
29 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x400000
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x600000
34 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7fffff
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
39 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
41 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
42 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
44 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
46 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
47 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
48 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
49 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
50 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
51 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
52 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
56 .macro mk_s68k_jump_table on sz @ operation name, size
57 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
58 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
59 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
60 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
61 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
65 @ the jumptables themselves
66 m_m68k_read8_table: mk_m68k_jump_table read 8
67 m_m68k_read16_table: mk_m68k_jump_table read 16
68 m_m68k_read32_table: mk_m68k_jump_table read 32
69 m_m68k_write8_table: mk_m68k_jump_table write 8
70 m_m68k_write16_table: mk_m68k_jump_table write 16
71 m_m68k_write32_table: mk_m68k_jump_table write 32
73 m_s68k_read8_table: mk_s68k_jump_table read 8
74 m_s68k_read16_table: mk_s68k_jump_table read 16
75 m_s68k_read32_table: mk_s68k_jump_table read 32
76 m_s68k_write8_table: mk_s68k_jump_table write 8
77 m_s68k_write16_table: mk_s68k_jump_table write 16
78 m_s68k_write32_table: mk_s68k_jump_table write 32
81 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
86 .global PicoMemResetCD
88 .global PicoReadM68k16
89 .global PicoReadM68k32
90 .global PicoWriteM68k8
91 .global PicoWriteM68k16
92 .global PicoWriteM68k32
94 .global PicoReadS68k16
95 .global PicoReadS68k32
96 .global PicoWriteS68k8
97 .global PicoWriteS68k16
98 .global PicoWriteS68k32
100 @ externs, just for reference
104 .extern PicoVideoRead
105 .extern Read_CDC_Host
106 .extern m68k_reg_write8
110 .extern s68k_reg_read16
112 .extern gfx_cd_write16
113 .extern s68k_reg_write8
116 @ r0=reg3, r1-r3=temp
117 .macro mk_update_table on sz @ operation name, size
118 @ we only set word-ram handlers
119 ldr r1, =m_m68k_&\on&\sz&_table
120 ldr r12,=m_s68k_&\on&\sz&_table
125 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
126 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
129 ldr r2, =m_&\on&_null
140 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
141 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
144 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
145 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
152 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
153 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
156 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
157 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
167 mk_update_table read 8
168 mk_update_table read 16
169 mk_update_table read 32
170 mk_update_table write 8
171 mk_update_table write 16
172 mk_update_table write 32
178 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
180 .macro mk_entry_m68k table
182 bic r0, r0, #0xff000000
183 and r3, r0, #0x00fe0000
184 ldr pc, [r2, r3, lsr #15]
187 PicoReadM68k8: @ u32 a
188 mk_entry_m68k m_m68k_read8_table
190 PicoReadM68k16: @ u32 a
191 mk_entry_m68k m_m68k_read16_table
193 PicoReadM68k32: @ u32 a
194 mk_entry_m68k m_m68k_read32_table
196 PicoWriteM68k8: @ u32 a, u8 d
197 mk_entry_m68k m_m68k_write8_table
199 PicoWriteM68k16: @ u32 a, u16 d
200 mk_entry_m68k m_m68k_write16_table
202 PicoWriteM68k32: @ u32 a, u32 d
203 mk_entry_m68k m_m68k_write32_table
206 .macro mk_entry_s68k on sz
207 bic r0, r0, #0xff000000
209 blt m_s68k_&\on&\sz&_prg
211 ldrlt r2, =m_s68k_&\on&\sz&_table
212 andlt r3, r0, #0x000e0000
213 ldrlt pc, [r2, r3, lsr #15]
215 orr r3, r3, #0x00008000
217 bge m_s68k_&\on&\sz&_regs
219 bge m_s68k_&\on&\sz&_pcm
221 bge m_s68k_&\on&\sz&_backup
226 PicoReadS68k8: @ u32 a
229 PicoReadS68k16: @ u32 a
230 mk_entry_s68k read 16
232 PicoReadS68k32: @ u32 a
233 mk_entry_s68k read 32
235 PicoWriteS68k8: @ u32 a, u8 d
236 mk_entry_s68k write 8
238 PicoWriteS68k16: @ u32 a, u16 d
239 mk_entry_s68k write 16
241 PicoWriteS68k32: @ u32 a, u32 d
242 mk_entry_s68k write 32
247 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
251 @ r0=addr[in,out], r1,r2=tmp
253 ands r1, r0, #0x01c000
254 ldrne pc, [pc, r1, lsr #12]
255 beq 0f @ most common?
265 and r1, r0, #0x7e00 @ col
266 and r2, r0, #0x01fc @ row
268 orr r1, r2, r1, ror #13
271 and r1, r0, #0x3f00 @ col
272 and r2, r0, #0x00fc @ row
274 orr r1, r2, r1, ror #12
277 and r1, r0, #0x1f80 @ col
278 and r2, r0, #0x007c @ row
279 orr r1, r2, r1, ror #11
281 orr r1, r1, r2, lsr #6
284 and r1, r0, #0xfc00 @ col
285 and r2, r0, #0x03fc @ row
286 orr r1, r2, r1, ror #14
289 orr r0, r0, r1, ror #26 @ rol 4+2
299 moveq r0, r0, ror #16
300 orrne r0, r1, r0, lsl #16
304 @ r0=prt1, r1=data, r2=ptr2
309 movne r1, r1, lsr #16
315 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
324 ldr r1, =(Pico+0x22200)
325 bic r0, r0, #0xfe0000
332 m_m68k_read8_prgbank:
333 ldr r1, =(Pico+0x22200)
337 orr r3, r2, #0x002200
340 tst r3, #0x00020000 @ have bus?
343 and r2, r2, #0xc0000000 @ r3 & 0xC0
344 add r1, r1, r2, lsr #12
349 m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
350 m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
351 ldr r1, =(Pico+0x22200)
352 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
359 m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
360 ldr r1, =(Pico+0x22200)
361 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
368 m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
369 ldr r1, =(Pico+0x22200)
370 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
377 m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
379 ldr r1, =(Pico+0x22200)
380 add r0, r0, #0x0c0000
387 m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
389 ldr r1, =(Pico+0x22200)
390 add r0, r0, #0x0e0000
397 m_m68k_read8_system_io:
398 bic r2, r0, #0xfe0000
401 bne m_m68k_read8_misc
403 ldr r1, =(Pico+0x22200)
405 ldr r1, [r1] @ Pico.mcd (used everywhere)
407 ldrlt pc, [pc, r0, lsl #2]
409 .long m_m68k_read8_r00
410 .long m_m68k_read8_r01
411 .long m_m68k_read8_r02
412 .long m_m68k_read8_r03
413 .long m_m68k_read8_r04
414 .long m_read_null @ unused bits
415 .long m_m68k_read8_r06
416 .long m_m68k_read8_r07
417 .long m_m68k_read8_r08
418 .long m_m68k_read8_r09
419 .long m_read_null @ reserved
421 .long m_m68k_read8_r0c
422 .long m_m68k_read8_r0d
424 add r1, r1, #0x110000
426 and r0, r0, #0x04000000 @ we need irq2 mask state
430 add r1, r1, #0x110000
431 add r1, r1, #0x002200
432 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
435 add r1, r1, #0x110000
439 add r1, r1, #0x110000
444 add r1, r1, #0x110000
448 ldrb r0, [r1, #0x73] @ IRQ vector
455 bl Read_CDC_Host @ TODO: make it local
462 add r1, r1, #0x110000
463 add r1, r1, #0x002200
464 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
468 add r1, r1, #0x110000
469 add r1, r1, #0x002200
477 add r1, r1, #0x110000
485 cmp r2, #0xa00000 @ Z80 RAM?
487 @ ldreq r2, =z80Read8
492 bl OtherRead16 @ non-MCD version should be ok too
502 bxne lr @ invalid read
505 bl PicoVideoRead @ TODO: implement it in asm
514 bic r0, r0, #0xff0000
520 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
524 ldr r1, =(Pico+0x22200)
525 bic r0, r0, #0xfe0000
532 m_m68k_read16_prgbank:
533 ldr r1, =(Pico+0x22200)
537 orr r3, r2, #0x002200
540 tst r3, #0x00020000 @ have bus?
543 and r2, r2, #0xc0000000 @ r3 & 0xC0
544 add r1, r1, r2, lsr #12
549 m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
550 m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
551 ldr r1, =(Pico+0x22200)
552 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
559 m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
560 ldr r1, =(Pico+0x22200)
561 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
568 m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
569 ldr r1, =(Pico+0x22200)
570 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
577 m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
578 @ Warning: read32 relies on NOT using r3 and r12 here
580 ldr r1, =(Pico+0x22200)
581 add r0, r0, #0x0c0000
588 m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
590 ldr r1, =(Pico+0x22200)
591 add r0, r0, #0x0e0000
598 m_m68k_read16_system_io:
599 bic r1, r0, #0xfe0000
602 bne m_m68k_read16_misc
604 m_m68k_read16_m68k_regs:
605 ldr r1, =(Pico+0x22200)
607 ldr r1, [r1] @ Pico.mcd (used everywhere)
609 ldrlt pc, [pc, r0, lsl #1]
611 .long m_m68k_read16_r00
612 .long m_m68k_read16_r02
613 .long m_m68k_read16_r04
614 .long m_m68k_read16_r06
615 .long m_m68k_read16_r08
616 .long m_read_null @ reserved
617 .long m_m68k_read16_r0c
619 add r1, r1, #0x110000
621 add r1, r1, #0x002200
622 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
623 and r0, r0, #0x04000000 @ we need irq2 mask state
624 orr r0, r1, r0, lsr #11
627 add r1, r1, #0x110000
631 orr r0, r1, r0, lsl #8
634 add r1, r1, #0x110000
639 ldrh r0, [r1, #0x72] @ IRQ vector
645 add r1, r1, #0x110000
646 add r1, r1, #0x002200
652 addlt r1, r1, #0x110000
658 orr r0, r0, r1, lsl #8
671 bxne lr @ invalid read
678 bic r0, r0, #0xff0000
684 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
688 ldr r1, =(Pico+0x22200)
689 bic r0, r0, #0xfe0000
696 m_m68k_read32_prgbank:
697 ldr r1, =(Pico+0x22200)
701 orr r3, r2, #0x002200
704 tst r3, #0x00020000 @ have bus?
707 and r2, r2, #0xc0000000 @ r3 & 0xC0
708 add r1, r1, r2, lsr #12
713 m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
714 m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
715 ldr r1, =(Pico+0x22200)
716 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
723 m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
724 ldr r1, =(Pico+0x22200)
725 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
732 m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
733 ldr r1, =(Pico+0x22200)
734 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
741 m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
743 bne m_m68k_read32_wordram1_1M_b0_unal
745 ldr r1, =(Pico+0x22200)
746 add r0, r0, #0x0c0000
751 m_m68k_read32_wordram1_1M_b0_unal:
752 @ hopefully this doesn't happen too often
755 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
759 bl m_m68k_read16_wordram1_1M_b0
760 orr r0, r0, r3, lsl #16
764 m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
766 bne m_m68k_read32_wordram1_1M_b1_unal
768 ldr r1, =(Pico+0x22200)
769 add r0, r0, #0x0e0000
774 m_m68k_read32_wordram1_1M_b1_unal:
777 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
781 bl m_m68k_read16_wordram1_1M_b1
782 orr r0, r0, r3, lsl #16
786 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
787 m_m68k_read32_system_io:
788 bic r1, r0, #0xfe0000
791 bne m_m68k_read32_misc
794 blt m_m68k_read32_misc
798 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
799 ldr r0, =(Pico+0x22200)
802 orr r2, r2, r2, lsl #16
803 add r0, r0, #0x110000
805 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
806 and r0, r2, r0, lsr #8
807 orr r0, r0, r1, lsl #8
813 bl m_m68k_read16_system_io
815 bl m_m68k_read16_system_io
817 orr r0, r0, r1, lsl #16
824 bxne lr @ invalid read
832 orr r0, r0, r1, lsl #16
838 bic r0, r0, #0xff0000
845 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
853 m_m68k_write8_prgbank:
854 ldr r2, =(Pico+0x22200)
858 orr r3, r12, #0x002200
861 tst r3, #0x00020000 @ have bus?
863 and r12,r12,#0xc0000000 @ r3 & 0xC0
864 add r2, r2, r12, lsr #12
869 m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
870 m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
871 ldr r2, =(Pico+0x22200)
872 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
879 m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
880 ldr r2, =(Pico+0x22200)
881 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
888 m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
889 ldr r2, =(Pico+0x22200)
890 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
897 m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
900 ldr r2, =(Pico+0x22200)
901 add r0, r0, #0x0c0000
908 m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
911 ldr r2, =(Pico+0x22200)
912 add r0, r0, #0x0e0000
919 m_m68k_write8_system_io:
920 bic r2, r0, #0xfe0000
933 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
939 bic r0, r0, #0xff0000
945 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
952 m_m68k_write16_prgbank:
953 ldr r2, =(Pico+0x22200)
957 orr r3, r12, #0x002200
960 tst r3, #0x00020000 @ have bus?
962 and r12,r12,#0xc0000000 @ r3 & 0xC0
963 add r2, r2, r12, lsr #12
968 m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
969 m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
970 ldr r2, =(Pico+0x22200)
971 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
978 m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
979 ldr r2, =(Pico+0x22200)
980 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
987 m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
988 ldr r2, =(Pico+0x22200)
989 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
996 m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
997 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1000 ldr r1, =(Pico+0x22200)
1001 add r0, r0, #0x0c0000
1008 m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1011 ldr r1, =(Pico+0x22200)
1012 add r0, r0, #0x0e0000
1019 m_m68k_write16_system_io:
1021 bic r2, r0, #0xfe0000
1026 m_m68k_write16_m68k_regs:
1029 stmfd sp!,{r2,r3,lr}
1032 ldmfd sp!,{r0,r1,lr}
1046 bic r0, r0, #0xff0000
1052 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1055 m_m68k_write32_bios:
1059 m_m68k_write32_prgbank:
1060 ldr r2, =(Pico+0x22200)
1064 orr r3, r12, #0x002200
1067 tst r3, #0x00020000 @ have bus?
1069 and r12,r12,#0xc0000000 @ r3 & 0xC0
1070 add r2, r2, r12, lsr #12
1075 m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1076 m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1077 ldr r2, =(Pico+0x22200)
1078 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1085 m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1086 ldr r2, =(Pico+0x22200)
1087 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1094 m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1095 ldr r2, =(Pico+0x22200)
1096 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1103 m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1105 bne m_m68k_write32_wordram1_1M_b0_unal
1108 ldr r2, =(Pico+0x22200)
1109 add r0, r0, #0x0c0000
1115 m_m68k_write32_wordram1_1M_b0_unal:
1116 @ hopefully this doesn't happen too often
1120 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1124 b m_m68k_write16_wordram1_1M_b0
1127 m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1129 bne m_m68k_write32_wordram1_1M_b1_unal
1132 ldr r2, =(Pico+0x22200)
1133 add r0, r0, #0x0e0000
1139 m_m68k_write32_wordram1_1M_b1_unal:
1143 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1147 b m_m68k_write16_wordram1_1M_b1
1150 @ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1151 m_m68k_write32_system_io:
1152 bic r2, r0, #0xfe0000
1155 bne m_m68k_write32_misc
1158 blt m_m68k_write32_regs
1161 @ Handle the 0x10-0x1f range
1162 ldr r0, =(Pico+0x22200)
1165 orr r3, r3, r3, lsl #16
1166 add r0, r0, #0x110000
1167 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1168 and r1, r3, r1, ror #24
1169 orr r1, r1, r12,lsl #8 @ end of byteswap
1172 movne r1, r1, lsr #16
1176 m_m68k_write32_regs:
1178 stmfd sp!,{r0,r1,lr}
1191 ldmfd sp!,{r0,r1,lr}
1195 m_m68k_write32_misc:
1197 stmfd sp!,{r0,r1,lr}
1200 ldmfd sp!,{r0,r1,lr}
1209 stmfd sp!,{r0,r1,lr}
1212 ldmfd sp!,{r0,r1,lr}
1219 bic r0, r0, #0xff0000
1227 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1229 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1232 .macro m_s68k_read8_ram map_addr
1233 ldr r1, =(Pico+0x22200)
1237 add r0, r0, #\map_addr @ map to our address
1243 .macro m_s68k_read8_wordram_2M_decode map_addr
1244 ldr r2, =(Pico+0x22200)
1247 movs r0, r0, lsr #1 @ +4-6 <<16
1248 add r2, r2, #\map_addr @ map to our address
1250 movcc r0, r0, lsr #4
1256 m_s68k_read8_prg: @ 0x000000 - 0x07ffff
1257 m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
1258 m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1259 m_s68k_read8_ram 0x020000
1262 m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1263 m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2
1266 m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1267 m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2
1270 m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1274 m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1275 @ must not trash r3 and r12
1276 ldr r1, =(Pico+0x22200)
1279 bic r0, r0, #0xff0000
1280 bic r0, r0, #0x00e000
1281 add r1, r1, #0x110000
1282 add r1, r1, #0x000200
1288 @ must not trash r3 and r12
1289 ldr r1, =(Pico+0x22200)
1290 bic r0, r0, #0xff0000
1291 @ bic r0, r0, #0x008000
1294 orr r2, r2, #0x002200
1296 bge m_s68k_read8_pcm_ram
1300 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1303 ldr r1, [r1, r2, lsl #2]
1305 moveq r0, r1, lsr #PCM_STEP_SHIFT
1306 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1310 m_s68k_read8_pcm_ram:
1313 add r1, r1, #0x100000 @ pcm_ram
1314 and r2, r2, #0x0f000000 @ bank
1315 add r1, r1, r2, lsr #12
1316 bic r0, r0, #0x00e000
1323 bic r0, r0, #0xff0000
1324 bic r0, r0, #0x008000
1330 ldrlo r2, =gfx_cd_read
1331 ldrhs r2, =s68k_reg_read16
1338 moveq r0, r0, lsr #8
1343 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1346 .macro m_s68k_read16_ram map_addr
1347 ldr r1, =(Pico+0x22200)
1351 add r0, r0, #\map_addr @ map to our address
1357 .macro m_s68k_read16_wordram_2M_decode map_addr
1358 ldr r2, =(Pico+0x22200)
1361 mov r0, r0, lsr #1 @ +4-6 <<16
1362 add r2, r2, #\map_addr @ map to our address
1364 orr r0, r0, r0, lsl #4
1370 m_s68k_read16_prg: @ 0x000000 - 0x07ffff
1371 m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
1372 m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1373 m_s68k_read16_ram 0x020000
1376 m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1377 m_s68k_read16_wordram_2M_decode 0x080000
1380 m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1381 m_s68k_read16_wordram_2M_decode 0x0a0000
1384 m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1388 @ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1389 @ bram is not meant to be accessed by words, does any game do this?
1390 .equiv m_s68k_read16_backup, m_s68k_read8_backup
1393 @ m_s68k_read16_pcm:
1394 @ pcm is on 8-bit bus, would this be same as byte access?
1395 .equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1399 bic r0, r0, #0xff0000
1400 bic r0, r0, #0x008000
1401 bic r0, r0, #0x000001
1411 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1414 .macro m_s68k_read32_ram map_addr
1415 ldr r1, =(Pico+0x22200)
1419 add r0, r0, #\map_addr @ map to our address
1425 .macro m_s68k_read32_wordram_2M_decode map_addr
1426 ldr r2, =(Pico+0x22200)
1429 mov r0, r0, lsr #1 @ +4-6 <<16
1430 add r2, r2, #\map_addr @ map to our address
1433 ldrneb r0, [r2, #-1]
1435 orr r1, r1, r1, lsl #4
1437 orr r0, r0, r0, lsl #4
1439 orr r0, r0, r1, lsl #16
1444 m_s68k_read32_prg: @ 0x000000 - 0x07ffff
1445 m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
1446 m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1447 m_s68k_read32_ram 0x020000
1450 m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1451 m_s68k_read32_wordram_2M_decode 0x080000
1454 m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1455 m_s68k_read32_wordram_2M_decode 0x0a0000
1458 m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1462 m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1463 @ bram is not meant to be accessed by words, does any game do this?
1466 bl m_s68k_read8_backup @ must preserve r3 and r12
1470 bl m_s68k_read8_backup
1471 orr r0, r0, r3, lsl #16
1478 bl m_s68k_read8_pcm @ must preserve r3 and r12
1483 orr r0, r0, r3, lsl #16
1488 bic r0, r0, #0xff0000
1489 bic r0, r0, #0x008000
1490 bic r0, r0, #0x000001
1497 blo m_s68k_read32_regs_gfx
1503 orr r0, r0, r1, lsl #16
1507 m_s68k_read32_regs_gfx:
1513 orr r0, r0, r1, lsl #16
1518 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1521 .macro m_s68k_write8_ram map_addr
1522 ldr r2, =(Pico+0x22200)
1526 add r0, r0, #\map_addr @ map to our address
1533 m_s68k_write8_prg: @ 0x000000 - 0x07ffff
1534 m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
1535 m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1536 m_s68k_write8_ram 0x020000
1539 m_s68k_write8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1540 m_s68k_write8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1544 m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1548 m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1549 @ must not trash r3 and r12
1550 ldr r2, =(Pico+0x22200)
1553 bic r0, r0, #0xff0000
1554 bic r0, r0, #0x00e000
1555 add r2, r2, #0x110000
1556 add r2, r2, #0x000200
1560 str r0, [r1, #0x0e] @ SRam.changed = 1
1565 bic r0, r0, #0xff0000
1567 movlt r0, r0, lsr #1
1573 m_s68k_write8_pcm_ram:
1574 ldr r3, =(Pico+0x22200)
1575 bic r0, r0, #0x00e000
1578 add r2, r3, #0x110000
1579 add r2, r2, #0x002200
1580 add r2, r2, #0x000040
1582 add r3, r3, #0x100000 @ pcm_ram
1583 and r2, r2, #0x0f000000 @ bank
1584 add r3, r3, r2, lsr #12
1590 bic r0, r0, #0xff0000
1591 bic r0, r0, #0x008000
1599 orr r1, r1, r1, lsl #8
1603 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1606 .macro m_s68k_write16_ram map_addr
1607 ldr r2, =(Pico+0x22200)
1611 add r0, r0, #\map_addr @ map to our address
1618 m_s68k_write16_prg: @ 0x000000 - 0x07ffff
1619 m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
1620 m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1621 m_s68k_write16_ram 0x020000
1624 m_s68k_write16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1625 m_s68k_write16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1629 m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1630 m_s68k_write16_ram 0
1633 @ m_s68k_write16_backup:
1634 .equiv m_s68k_write16_backup, m_s68k_write8_backup
1637 @ m_s68k_write16_pcm:
1638 .equiv m_s68k_write16_pcm, m_s68k_write8_pcm
1641 m_s68k_write16_regs:
1642 bic r0, r0, #0xff0000
1643 bic r0, r0, #0x008000
1649 beq m_s68k_write16_regs_spec
1655 stmfd sp!,{r2,r3,lr}
1658 ldmfd sp!,{r0,r1,lr}
1661 m_s68k_write16_regs_spec: @ special case
1662 ldr r2, =(Pico+0x22200)
1665 add r0, r0, #0x00000f
1666 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
1670 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1673 .macro m_s68k_write32_ram map_addr
1674 ldr r2, =(Pico+0x22200)
1678 add r0, r0, #\map_addr @ map to our address
1685 m_s68k_write32_prg: @ 0x000000 - 0x07ffff
1686 m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
1687 m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1688 m_s68k_write32_ram 0x020000
1691 m_s68k_write32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
1692 m_s68k_write32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1696 m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1697 m_s68k_write32_ram 0
1700 m_s68k_write32_backup:
1705 bl m_s68k_write8_backup @ must preserve r3 and r12
1709 b m_s68k_write8_backup
1713 bic r0, r0, #0xff0000
1715 blt m_s68k_write32_pcm_reg
1720 m_s68k_write32_pcm_ram:
1721 ldr r3, =(Pico+0x22200)
1722 bic r0, r0, #0x00e000
1725 add r2, r3, #0x110000
1726 add r2, r2, #0x002200
1727 add r2, r2, #0x000040
1729 add r3, r3, #0x100000 @ pcm_ram
1730 and r2, r2, #0x0f000000 @ bank
1731 add r3, r3, r2, lsr #12
1738 m_s68k_write32_pcm_reg:
1742 stmfd sp!,{r2,r3,lr}
1745 ldmfd sp!,{r0,r1,lr}
1749 m_s68k_write32_regs:
1750 bic r0, r0, #0xff0000
1751 bic r0, r0, #0x008000
1758 blo m_s68k_write32_regs_gfx
1760 stmfd sp!,{r0,r1,lr}
1773 ldmfd sp!,{r0,r1,lr}
1777 m_s68k_write32_regs_gfx:
1780 stmfd sp!,{r2,r3,lr}
1783 ldmfd sp!,{r0,r1,lr}