3 // (c) Copyright 2004 Dave, All rights reserved.
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4 // (c) Copyright 2006-2008 notaz, All rights reserved.
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5 // Free for non-commercial use.
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7 // For commercial use, separate licencing terms must be obtained.
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10 #include "PicoInt.h"
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11 #include "sound/ym2612.h"
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16 int PicoSkipFrame = 0; // skip rendering frame?
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17 int emustatus = 0; // rapid_ym2612, multi_ym_updates
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18 int PicoPad[2]; // Joypads, format is SACB RLDU
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19 int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active
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20 int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe
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21 int PicoAutoRgnOrder = 0;
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22 struct PicoSRAM SRam = {0,};
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24 void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware
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25 void (*PicoResetHook)(void) = NULL;
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26 void (*PicoLineHook)(int count) = NULL;
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28 // to be called once on emu init
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31 // Blank space for state:
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32 memset(&Pico,0,sizeof(Pico));
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33 memset(&PicoPad,0,sizeof(PicoPad));
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37 z80_init(); // init even if we aren't going to use it
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45 // to be called once on emu exit
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48 if (PicoAHW & PAHW_MCD)
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52 if (SRam.data) free(SRam.data); SRam.data=0;
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55 void PicoPower(void)
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57 unsigned char sram_reg=Pico.m.sram_reg; // must be preserved
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59 Pico.m.frame_count = 0;
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61 // clear all memory of the emulated machine
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62 memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);
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64 memset(&Pico.video,0,sizeof(Pico.video));
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65 memset(&Pico.m,0,sizeof(Pico.m));
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67 Pico.video.pending_ints=0;
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70 // default VDP register values (based on Fusion)
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71 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;
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72 Pico.video.reg[0xc] = 0x81;
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73 Pico.video.reg[0xf] = 0x02;
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75 if (PicoAHW & PAHW_MCD)
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78 Pico.m.sram_reg=sram_reg;
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82 PICO_INTERNAL void PicoDetectRegion(void)
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84 int support=0, hw=0, i;
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85 unsigned char pal=0;
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87 if (PicoRegionOverride)
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89 support = PicoRegionOverride;
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93 // Read cartridge region data:
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94 int region=PicoRead32(0x1f0);
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100 c=region>>(i<<3); c&=0xff;
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101 if (c<=' ') continue;
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103 if (c=='J') support|=1;
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104 else if (c=='U') support|=4;
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105 else if (c=='E') support|=8;
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106 else if (c=='j') {support|=1; break; }
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107 else if (c=='u') {support|=4; break; }
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108 else if (c=='e') {support|=8; break; }
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114 support|=strtol(s,NULL,16);
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119 // auto detection order override
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120 if (PicoAutoRgnOrder) {
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121 if (((PicoAutoRgnOrder>>0)&0xf) & support) support = (PicoAutoRgnOrder>>0)&0xf;
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122 else if (((PicoAutoRgnOrder>>4)&0xf) & support) support = (PicoAutoRgnOrder>>4)&0xf;
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123 else if (((PicoAutoRgnOrder>>8)&0xf) & support) support = (PicoAutoRgnOrder>>8)&0xf;
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126 // Try to pick the best hardware value for English/50hz:
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127 if (support&8) { hw=0xc0; pal=1; } // Europe
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128 else if (support&4) hw=0x80; // USA
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129 else if (support&2) { hw=0x40; pal=1; } // Japan PAL
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130 else if (support&1) hw=0x00; // Japan NTSC
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131 else hw=0x80; // USA
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133 Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached
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137 int PicoReset(void)
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139 unsigned char sram_reg=Pico.m.sram_reg; // must be preserved
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141 if (Pico.romsize<=0) return 1;
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143 /* must call now, so that banking is reset, and correct vectors get fetched */
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144 if (PicoResetHook) PicoResetHook();
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148 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).
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149 SekSetRealTAS(PicoAHW & PAHW_MCD);
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152 if (PicoAHW & PAHW_MCD)
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153 // needed for MCD to reset properly, probably some bug hides behind this..
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154 memset(Pico.ioports,0,sizeof(Pico.ioports));
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157 Pico.m.dirtyPal = 1;
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159 Pico.m.z80_bank68k = 0;
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160 memset(Pico.zram, 0, sizeof(Pico.zram)); // ??
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162 PicoDetectRegion();
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163 Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal
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165 PsndReset(); // pal must be known here
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167 // create an empty "dma" to cause 68k exec start at random frame location
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168 if (Pico.m.dma_xfers == 0 && !(PicoOpt&POPT_DIS_VDP_FIFO))
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169 Pico.m.dma_xfers = rand() & 0x1fff;
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171 if (PicoAHW & PAHW_MCD) {
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176 // reinit, so that checksum checks pass
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177 SekFinishIdleDet();
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178 if (!(PicoOpt & POPT_DIS_IDLE_DET))
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182 // reset sram state; enable sram access by default if it doesn't overlap with ROM
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183 Pico.m.sram_reg=sram_reg&0x14;
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184 if (!(Pico.m.sram_reg&4) && Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;
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186 elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",
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187 (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);
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193 // dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)
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194 // same for Outrunners (92-121, when active is set to 24)
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196 static const int dma_timings[] = {
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197 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy
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198 102, 205, 204, 102, // vblank: 40cell:
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199 16, 16, 15, 8, // active: 32cell:
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200 24, 18, 17, 9 // ...
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203 static const int dma_bsycles[] = {
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204 (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,
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205 (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,
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206 (488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,
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207 (488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9
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210 PICO_INTERNAL int CheckDMA(void)
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212 int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes
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213 int xfers = Pico.m.dma_xfers;
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216 if(!(dma_op&2)) dma_op = (Pico.video.type==1) ? 0 : 1; // setting dma_timings offset here according to Gens
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218 if(Pico.video.reg[12] & 1) dma_op |= 4; // 40 cell mode?
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219 if(!(Pico.video.status&8)&&(Pico.video.reg[1]&0x40)) dma_op|=8; // active display?
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220 xfers_can = dma_timings[dma_op];
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221 if(xfers <= xfers_can)
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223 if(dma_op&2) Pico.video.status&=~2; // dma no longer busy
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225 burn = xfers * dma_bsycles[dma_op] >> 8; // have to be approximate because can't afford division..
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227 Pico.m.dma_xfers = 0;
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229 if(!(dma_op&2)) burn = 488;
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230 Pico.m.dma_xfers -= xfers_can;
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233 elprintf(EL_VDPDMA, "~Dma %i op=%i can=%i burn=%i [%i]", Pico.m.dma_xfers, dma_op1, xfers_can, burn, SekCyclesDone());
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234 //dprintf("~aim: %i, cnt: %i", SekCycleAim, SekCycleCnt);
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238 static __inline void SekRunM68k(int cyc)
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242 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
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243 #if defined(EMU_CORE_DEBUG)
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244 // this means we do run-compare
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245 SekCycleCnt+=CM_compareRun(cyc_do, 0);
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246 #elif defined(EMU_C68K)
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247 PicoCpuCM68k.cycles=cyc_do;
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248 CycloneRun(&PicoCpuCM68k);
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249 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
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250 #elif defined(EMU_M68K)
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251 SekCycleCnt+=m68k_execute(cyc_do);
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252 #elif defined(EMU_F68K)
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253 SekCycleCnt+=fm68k_emulate(cyc_do+1, 0);
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258 // to be called on 224 or line_sample scanlines only
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259 static __inline void getSamples(int y)
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261 #if SIMPLE_WRITE_SOUND
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262 if (y != 224) return;
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263 PsndRender(0, PsndLen);
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264 if (PicoWriteSound) PicoWriteSound(PsndLen);
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267 static int curr_pos = 0;
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271 curr_pos += PsndRender(curr_pos, PsndLen-PsndLen/2);
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272 else curr_pos = PsndRender(0, PsndLen);
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273 if (emustatus&1) emustatus|=2; else emustatus&=~2;
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274 if (PicoWriteSound) PicoWriteSound(curr_pos);
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275 // clear sound buffer
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278 else if(emustatus & 3) {
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281 curr_pos = PsndRender(0, PsndLen/2);
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287 #include "PicoFrameHints.c"
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291 int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */
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294 int z80_scanline_cycles; /* cycles done until z80_scanline */
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296 /* sync z80 to 68k */
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297 PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)
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300 z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);
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301 cnt = z80_cycle_aim - z80_cycle_cnt;
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303 elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,
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304 z80_cycle_aim, z80_cycle_aim / 228);
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307 z80_cycle_cnt += z80_run(cnt);
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311 // TODO: rm from asm too
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312 int idle_hit_counter = 0;
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314 void PicoFrame(void)
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317 if ((Pico.m.frame_count&0x3f) == 0) {
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318 elprintf(EL_STATUS, "ihits: %i", idle_hit_counter);
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319 idle_hit_counter = 0;
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323 Pico.m.frame_count++;
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325 if (PicoAHW & PAHW_MCD) {
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330 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode
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332 if (!(PicoOpt&POPT_ALT_RENDERER))
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338 void PicoFrameDrawOnly(void)
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341 PicoDrawSync(223, 0);
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344 void PicoGetInternal(pint_t which, pint_ret_t *r)
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348 case PI_ROM: r->vptr = Pico.rom; break;
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349 case PI_ISPAL: r->vint = Pico.m.pal; break;
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350 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;
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351 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;
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355 // callback to output message from emu
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356 void (*PicoMessage)(const char *msg)=NULL;
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358 #if 1 // defined(__DEBUG_PRINT)
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359 #define bit(r, x) ((r>>x)&1)
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360 void z80_debug(char *dstr);
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361 char *debugString(void)
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364 static char dstr[1024];
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365 struct PicoVideo *pv=&Pico.video;
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366 unsigned char *reg=pv->reg, r;
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367 extern int HighPreSpr[];
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368 int i, sprites_lo, sprites_hi;
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371 sprites_lo = sprites_hi = 0;
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372 for (i = 0; HighPreSpr[i] != 0; i+=2)
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373 if (HighPreSpr[i+1] & 0x8000)
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378 sprintf(dstrp, "mode set 1: %02x spr lo: %2i, spr hi: %2i\n", (r=reg[0]), sprites_lo, sprites_hi);
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379 dstrp+=strlen(dstrp);
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380 sprintf(dstrp, "display_disable: %i, M3: %i, palette: %i, ?, hints: %i\n", bit(r,0), bit(r,1), bit(r,2), bit(r,4));
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381 dstrp+=strlen(dstrp);
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382 sprintf(dstrp, "mode set 2: %02x\n", (r=reg[1])); dstrp+=strlen(dstrp);
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383 sprintf(dstrp, "SMS/gen: %i, pal: %i, dma: %i, vints: %i, disp: %i, TMS: %i\n", bit(r,2), bit(r,3), bit(r,4),
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384 bit(r,5), bit(r,6), bit(r,7)); dstrp+=strlen(dstrp);
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385 sprintf(dstrp, "mode set 3: %02x\n", (r=reg[0xB])); dstrp+=strlen(dstrp);
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386 sprintf(dstrp, "LSCR: %i, HSCR: %i, 2cell vscroll: %i, IE2: %i\n", bit(r,0), bit(r,1), bit(r,2), bit(r,3)); dstrp+=strlen(dstrp);
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387 sprintf(dstrp, "mode set 4: %02x\n", (r=reg[0xC])); dstrp+=strlen(dstrp);
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388 sprintf(dstrp, "interlace: %i%i, cells: %i, shadow: %i\n", bit(r,2), bit(r,1), (r&0x80) ? 40 : 32, bit(r,3));
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389 dstrp+=strlen(dstrp);
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390 sprintf(dstrp, "scroll size: w: %i, h: %i SRAM: %i; eeprom: %i (%i)\n", reg[0x10]&3, (reg[0x10]&0x30)>>4,
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391 bit(Pico.m.sram_reg, 4), bit(Pico.m.sram_reg, 2), SRam.eeprom_type); dstrp+=strlen(dstrp);
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392 sprintf(dstrp, "sram range: %06x-%06x, reg: %02x\n", SRam.start, SRam.end, Pico.m.sram_reg); dstrp+=strlen(dstrp);
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393 sprintf(dstrp, "pend int: v:%i, h:%i, vdp status: %04x\n", bit(pv->pending_ints,5), bit(pv->pending_ints,4), pv->status);
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394 dstrp+=strlen(dstrp);
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395 #if defined(EMU_C68K)
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396 sprintf(dstrp, "M68k: PC: %06x, st_flg: %x, cycles: %u\n", SekPc, PicoCpuCM68k.state_flags, SekCyclesDoneT());
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397 dstrp+=strlen(dstrp);
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398 sprintf(dstrp, "d0=%08x, a0=%08x, osp=%08x, irql=%i\n", PicoCpuCM68k.d[0], PicoCpuCM68k.a[0], PicoCpuCM68k.osp, PicoCpuCM68k.irq); dstrp+=strlen(dstrp);
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399 sprintf(dstrp, "d1=%08x, a1=%08x, sr=%04x\n", PicoCpuCM68k.d[1], PicoCpuCM68k.a[1], CycloneGetSr(&PicoCpuCM68k)); dstrp+=strlen(dstrp);
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400 for(r=2; r < 8; r++) {
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401 sprintf(dstrp, "d%i=%08x, a%i=%08x\n", r, PicoCpuCM68k.d[r], r, PicoCpuCM68k.a[r]); dstrp+=strlen(dstrp);
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403 #elif defined(EMU_M68K)
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404 sprintf(dstrp, "M68k: PC: %06x, cycles: %u, irql: %i\n", SekPc, SekCyclesDoneT(), PicoCpuMM68k.int_level>>8); dstrp+=strlen(dstrp);
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405 #elif defined(EMU_F68K)
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406 sprintf(dstrp, "M68k: PC: %06x, cycles: %u, irql: %i\n", SekPc, SekCyclesDoneT(), PicoCpuFM68k.interrupts[0]); dstrp+=strlen(dstrp);
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408 sprintf(dstrp, "z80Run: %i, pal: %i, frame#: %i\n", Pico.m.z80Run, Pico.m.pal, Pico.m.frame_count); dstrp+=strlen(dstrp);
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409 z80_debug(dstrp); dstrp+=strlen(dstrp);
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410 if (strlen(dstr) > sizeof(dstr))
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411 printf("warning: debug buffer overflow (%i/%i)\n", strlen(dstr), sizeof(dstr));
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414 struct PicoVideo *pvid=&Pico.video;
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417 static char dstr[1024*8];
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420 table=pvid->reg[5]&0x7f;
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421 if (pvid->reg[12]&1) table&=0x7e; // Lowest bit 0 in 40-cell mode
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422 table<<=8; // Get sprite table address/2
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424 for (i=u=n=0; u < 80 && n < 20; u++)
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426 unsigned int *sprite;
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427 int code, code2, sx, sy, height;
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429 sprite=(unsigned int *)(Pico.vram+((table+(link<<2))&0x7ffc)); // Find sprite
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434 // check if it is on this line
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435 sy = (code&0x1ff);//-0x80;
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436 height = ((code>>24)&3)+1;
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440 sx = (code2>>16)&0x1ff;
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442 printf("#%02i x: %03i y: %03i %ix%i\n", u, sx, sy, ((code>>26)&3)+1, height);
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444 link=(code>>16)&0x7f;
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445 if(!link) break; // End of sprites
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