1 // Pico Library - Internal Header File
\r
3 // (c) Copyright 2004 Dave, All rights reserved.
\r
4 // (c) Copyright 2006,2007 Grazvydas "notaz" Ignotas, all rights reserved.
\r
5 // Free for non-commercial use.
\r
7 // For commercial use, separate licencing terms must be obtained.
\r
9 #ifndef PICO_INTERNAL_INCLUDED
\r
10 #define PICO_INTERNAL_INCLUDED
\r
18 #define USE_POLL_DETECT
\r
20 #ifndef PICO_INTERNAL
\r
21 #define PICO_INTERNAL
\r
23 #ifndef PICO_INTERNAL_ASM
\r
24 #define PICO_INTERNAL_ASM
\r
27 // to select core, define EMU_C68K, EMU_M68K or EMU_A68K in your makefile or project
\r
34 // ----------------------- 68000 CPU -----------------------
\r
36 #include "../cpu/Cyclone/Cyclone.h"
\r
37 extern struct Cyclone PicoCpu, PicoCpuS68k;
\r
38 #define SekCyclesLeftNoMCD PicoCpu.cycles // cycles left for this run
\r
39 #define SekCyclesLeft \
\r
40 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
\r
41 #define SekCyclesLeftS68k \
\r
42 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuS68k.cycles)
\r
43 #define SekSetCyclesLeftNoMCD(c) PicoCpu.cycles=c
\r
44 #define SekSetCyclesLeft(c) { \
\r
45 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \
\r
47 #define SekPc (PicoCpu.pc-PicoCpu.membase)
\r
48 #define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)
\r
49 #define SekSetStop(x) { PicoCpu.state_flags&=~1; if (x) { PicoCpu.state_flags|=1; PicoCpu.cycles=0; } }
\r
50 #define SekSetStopS68k(x) { PicoCpuS68k.state_flags&=~1; if (x) { PicoCpuS68k.state_flags|=1; PicoCpuS68k.cycles=0; } }
\r
54 void __cdecl M68000_RUN();
\r
55 // The format of the data in a68k.asm (at the _M68000_regs location)
\r
58 unsigned int d[8],a[8];
\r
59 unsigned int isp,srh,ccr,xc,pc,irq,sr;
\r
60 int (*IrqCallback) (int nIrq);
\r
62 void *pResetCallback;
\r
63 unsigned int sfc,dfc,usp,vbr;
\r
64 unsigned int AsmBank,CpuVersion;
\r
66 struct A68KContext M68000_regs;
\r
67 extern int m68k_ICount;
\r
68 #define SekCyclesLeft m68k_ICount
\r
69 #define SekSetCyclesLeft(c) m68k_ICount=c
\r
70 #define SekPc M68000_regs.pc
\r
74 #include "../cpu/musashi/m68kcpu.h"
\r
75 extern m68ki_cpu_core PicoM68kCPU; // MD's CPU
\r
76 extern m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU
\r
77 #ifndef SekCyclesLeft
\r
78 #define SekCyclesLeftNoMCD PicoM68kCPU.cyc_remaining_cycles
\r
79 #define SekCyclesLeft \
\r
80 (((PicoMCD&1) && (PicoOpt & 0x2000)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
\r
81 #define SekCyclesLeftS68k \
\r
82 ((PicoOpt & 0x2000) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoS68kCPU.cyc_remaining_cycles)
\r
83 #define SekSetCyclesLeftNoMCD(c) SET_CYCLES(c)
\r
84 #define SekSetCyclesLeft(c) { \
\r
85 if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SET_CYCLES(c); \
\r
87 #define SekPc m68k_get_reg(&PicoM68kCPU, M68K_REG_PC)
\r
88 #define SekPcS68k m68k_get_reg(&PicoS68kCPU, M68K_REG_PC)
\r
89 #define SekSetStop(x) { \
\r
90 if(x) { SET_CYCLES(0); PicoM68kCPU.stopped=STOP_LEVEL_STOP; } \
\r
91 else PicoM68kCPU.stopped=0; \
\r
93 #define SekSetStopS68k(x) { \
\r
94 if(x) { SET_CYCLES(0); PicoS68kCPU.stopped=STOP_LEVEL_STOP; } \
\r
95 else PicoS68kCPU.stopped=0; \
\r
100 extern int SekCycleCnt; // cycles done in this frame
\r
101 extern int SekCycleAim; // cycle aim
\r
102 extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
\r
104 #define SekCyclesReset() {SekCycleCntT+=SekCycleCnt;SekCycleCnt=SekCycleAim=0;}
\r
105 #define SekCyclesBurn(c) SekCycleCnt+=c
\r
106 #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // nuber of cycles done in this frame (can be checked anywhere)
\r
107 #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom
\r
109 #define SekEndRun(after) { \
\r
110 SekCycleCnt -= SekCyclesLeft - after; \
\r
111 if(SekCycleCnt < 0) SekCycleCnt = 0; \
\r
112 SekSetCyclesLeft(after); \
\r
115 extern int SekCycleCntS68k;
\r
116 extern int SekCycleAimS68k;
\r
118 #define SekCyclesResetS68k() {SekCycleCntS68k=SekCycleAimS68k=0;}
\r
119 #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)
\r
122 #if defined(EMU_C68K) && defined(EMU_M68K)
\r
123 #undef SekSetCyclesLeftNoMCD
\r
124 #undef SekSetCyclesLeft
\r
125 #undef SekCyclesBurn
\r
127 #define SekSetCyclesLeftNoMCD(c)
\r
128 #define SekSetCyclesLeft(c)
\r
129 #define SekCyclesBurn(c) c
\r
130 #define SekEndRun(c)
\r
133 extern int PicoMCD;
\r
135 // ---------------------------------------------------------
\r
137 // main oscillator clock which controls timing
\r
138 #define OSC_NTSC 53693100
\r
139 #define OSC_PAL 53203424 // not accurate
\r
143 unsigned char reg[0x20];
\r
144 unsigned int command; // 32-bit Command
\r
145 unsigned char pending; // 1 if waiting for second half of 32-bit command
\r
146 unsigned char type; // Command type (v/c/vsram read/write)
\r
147 unsigned short addr; // Read/Write address
\r
148 int status; // Status bits
\r
149 unsigned char pending_ints; // pending interrupts: ??VH????
\r
150 unsigned char pad[0x13];
\r
155 unsigned char rotate;
\r
156 unsigned char z80Run;
\r
157 unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches
\r
158 short scanline; // 04 0 to 261||311; -1 in fast mode
\r
159 char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)
\r
160 unsigned char hardware; // 07 Hardware value for country
\r
161 unsigned char pal; // 08 1=PAL 0=NTSC
\r
162 unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)
\r
163 unsigned short z80_bank68k; // 0a
\r
164 unsigned short z80_lastaddr; // this is for Z80 faking
\r
165 unsigned char z80_fakeval;
\r
166 unsigned char pad0;
\r
167 unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
\r
168 unsigned short sram_addr; // EEPROM address register
\r
169 unsigned char sram_cycle; // EEPROM SRAM cycle number
\r
170 unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs
\r
171 unsigned char prot_bytes[2]; // simple protection faking
\r
172 unsigned short dma_bytes; //
\r
173 unsigned char pad[2];
\r
174 unsigned int frame_count; // mainly for movies
\r
177 // some assembly stuff depend on these, do not touch!
\r
180 unsigned char ram[0x10000]; // 0x00000 scratch ram
\r
181 unsigned short vram[0x8000]; // 0x10000
\r
182 unsigned char zram[0x2000]; // 0x20000 Z80 ram
\r
183 unsigned char ioports[0x10];
\r
184 unsigned int pad[0x3c]; // unused
\r
185 unsigned short cram[0x40]; // 0x22100
\r
186 unsigned short vsram[0x40]; // 0x22180
\r
188 unsigned char *rom; // 0x22200
\r
189 unsigned int romsize; // 0x22204
\r
192 struct PicoVideo video;
\r
198 unsigned char *data; // actual data
\r
199 unsigned int start; // start address in 68k address space
\r
201 unsigned char resize; // 0c: 1=SRAM size changed and needs to be reallocated on PicoReset
\r
202 unsigned char reg_back; // copy of Pico.m.sram_reg to set after reset
\r
203 unsigned char changed;
\r
208 #include "cd/cd_sys.h"
\r
209 #include "cd/LC89510.h"
\r
210 #include "cd/gfx_cd.h"
\r
214 unsigned char control; // reg7
\r
215 unsigned char enabled; // reg8
\r
216 unsigned char cur_ch;
\r
217 unsigned char bank;
\r
220 struct pcm_chan // 08, size 0x10
\r
222 unsigned char regs[8];
\r
223 unsigned int addr; // .08: played sample address
\r
230 unsigned short hint_vector;
\r
231 unsigned char busreq;
\r
232 unsigned char s68k_pend_ints;
\r
233 unsigned int state_flags; // 04: emu state: reset_pending, dmna_pending
\r
234 unsigned int counter75hz;
\r
235 unsigned short audio_offset; // 0c: for savestates: play pointer offset (0-1023)
\r
236 unsigned char audio_track; // playing audio track # (zero based)
\r
238 int timer_int3; // 10
\r
239 unsigned int timer_stopwatch;
\r
240 unsigned char bcram_reg; // 18: battery-backed RAM cart register
\r
241 unsigned char pad2;
\r
242 unsigned short pad3;
\r
248 unsigned char bios[0x20000]; // 000000: 128K
\r
249 union { // 020000: 512K
\r
250 unsigned char prg_ram[0x80000];
\r
251 unsigned char prg_ram_b[4][0x20000];
\r
253 union { // 0a0000: 256K
\r
255 unsigned char word_ram2M[0x40000];
\r
256 unsigned char unused[0x20000];
\r
259 unsigned char unused[0x20000];
\r
260 unsigned char word_ram1M[2][0x20000];
\r
263 union { // 100000: 64K
\r
264 unsigned char pcm_ram[0x10000];
\r
265 unsigned char pcm_ram_b[0x10][0x1000];
\r
267 unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
\r
268 unsigned char bram[0x2000]; // 110200: 8K
\r
269 struct mcd_misc m; // 112200: misc
\r
270 struct mcd_pcm pcm; // 112240:
\r
271 _scd_toc TOC; // not to be saved
\r
278 #define Pico_mcd ((mcd_state *)Pico.rom)
\r
281 PICO_INTERNAL int PicoAreaPackCpu(unsigned char *cpu, int is_sub);
\r
282 PICO_INTERNAL int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub);
\r
285 PICO_INTERNAL int PicoCdSaveState(void *file);
\r
286 PICO_INTERNAL int PicoCdLoadState(void *file);
\r
289 PICO_INTERNAL int PicoLine(int scan);
\r
290 PICO_INTERNAL void PicoFrameStart(void);
\r
293 PICO_INTERNAL void PicoFrameFull();
\r
296 PICO_INTERNAL int PicoInitPc(unsigned int pc);
\r
297 PICO_INTERNAL_ASM unsigned int CPU_CALL PicoRead32(unsigned int a);
\r
298 PICO_INTERNAL void PicoMemSetup(void);
\r
299 PICO_INTERNAL_ASM void PicoMemReset(void);
\r
300 PICO_INTERNAL int PadRead(int i);
\r
301 PICO_INTERNAL unsigned char z80_read(unsigned short a);
\r
302 PICO_INTERNAL unsigned short z80_read16(unsigned short a);
\r
303 PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a);
\r
304 PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a);
\r
307 PICO_INTERNAL void PicoMemSetupCD(void);
\r
308 PICO_INTERNAL_ASM void PicoMemResetCD(int r3);
\r
309 PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);
\r
312 extern struct Pico Pico;
\r
313 extern struct PicoSRAM SRam;
\r
314 extern int emustatus;
\r
315 extern int z80startCycle, z80stopCycle; // in 68k cycles
\r
316 PICO_INTERNAL int CheckDMA(void);
\r
319 PICO_INTERNAL int PicoInitMCD(void);
\r
320 PICO_INTERNAL void PicoExitMCD(void);
\r
321 PICO_INTERNAL int PicoResetMCD(int hard);
\r
322 PICO_INTERNAL int PicoFrameMCD(void);
\r
325 PICO_INTERNAL int SekInit(void);
\r
326 PICO_INTERNAL int SekReset(void);
\r
327 PICO_INTERNAL int SekInterrupt(int irq);
\r
328 PICO_INTERNAL void SekState(unsigned char *data);
\r
329 PICO_INTERNAL void SekSetRealTAS(int use_real);
\r
332 PICO_INTERNAL int SekInitS68k(void);
\r
333 PICO_INTERNAL int SekResetS68k(void);
\r
334 PICO_INTERNAL int SekInterruptS68k(int irq);
\r
337 extern int PsndLen_exc_cnt;
\r
338 extern int PsndLen_exc_add;
\r
341 PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);
\r
342 PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);
\r
345 PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);
\r
346 PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d);
\r
347 PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void);
\r
348 PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count);
\r
349 PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);
\r
350 PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count
\r
351 PICO_INTERNAL_ASM void memset32(int *dest, int c, int count);
\r
354 PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);
\r
355 PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);
\r
358 PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba);
\r
361 PICO_INTERNAL void sound_reset(void);
\r
362 PICO_INTERNAL void sound_timers_and_dac(int raster);
\r
363 PICO_INTERNAL int sound_render(int offset, int length);
\r
364 PICO_INTERNAL void sound_clear(void);
\r
365 // z80 functionality wrappers
\r
366 PICO_INTERNAL void z80_init(void);
\r
367 PICO_INTERNAL void z80_resetCycles(void);
\r
368 PICO_INTERNAL void z80_int(void);
\r
369 PICO_INTERNAL int z80_run(int cycles);
\r
370 PICO_INTERNAL void z80_pack(unsigned char *data);
\r
371 PICO_INTERNAL void z80_unpack(unsigned char *data);
\r
372 PICO_INTERNAL void z80_reset(void);
\r
373 PICO_INTERNAL void z80_exit(void);
\r
377 } // End of extern "C"
\r
380 #endif // PICO_INTERNAL_INCLUDED
\r