1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "../gte_arm.h"
26 #include "../gte_neon.h"
28 #include "arm_features.h"
30 #define unused __attribute__((unused))
33 #pragma GCC diagnostic ignored "-Wunused-function"
34 #pragma GCC diagnostic ignored "-Wunused-variable"
35 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
38 void indirect_jump_indexed();
51 void jump_vaddr_r10();
52 void jump_vaddr_r12();
54 void * const jump_vaddr_reg[16] = {
73 void invalidate_addr_r0();
74 void invalidate_addr_r1();
75 void invalidate_addr_r2();
76 void invalidate_addr_r3();
77 void invalidate_addr_r4();
78 void invalidate_addr_r5();
79 void invalidate_addr_r6();
80 void invalidate_addr_r7();
81 void invalidate_addr_r8();
82 void invalidate_addr_r9();
83 void invalidate_addr_r10();
84 void invalidate_addr_r12();
86 const u_int invalidate_addr_reg[16] = {
87 (int)invalidate_addr_r0,
88 (int)invalidate_addr_r1,
89 (int)invalidate_addr_r2,
90 (int)invalidate_addr_r3,
91 (int)invalidate_addr_r4,
92 (int)invalidate_addr_r5,
93 (int)invalidate_addr_r6,
94 (int)invalidate_addr_r7,
95 (int)invalidate_addr_r8,
96 (int)invalidate_addr_r9,
97 (int)invalidate_addr_r10,
99 (int)invalidate_addr_r12,
104 static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
108 static void set_jump_target(void *addr, void *target_)
110 u_int target = (u_int)target_;
112 u_int *ptr2=(u_int *)ptr;
114 assert((target-(u_int)ptr2-8)<1024);
115 assert(((uintptr_t)addr&3)==0);
116 assert((target&3)==0);
117 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
118 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
120 else if(ptr[3]==0x72) {
121 // generated by emit_jno_unlikely
122 if((target-(u_int)ptr2-8)<1024) {
123 assert(((uintptr_t)addr&3)==0);
124 assert((target&3)==0);
125 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
127 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
128 assert(((uintptr_t)addr&3)==0);
129 assert((target&3)==0);
130 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
132 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
135 assert((ptr[3]&0x0e)==0xa);
136 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
140 // This optionally copies the instruction from the target of the branch into
141 // the space before the branch. Works, but the difference in speed is
142 // usually insignificant.
144 static void set_jump_target_fillslot(int addr,u_int target,int copy)
146 u_char *ptr=(u_char *)addr;
147 u_int *ptr2=(u_int *)ptr;
148 assert(!copy||ptr2[-1]==0xe28dd000);
151 assert((target-(u_int)ptr2-8)<4096);
152 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
155 assert((ptr[3]&0x0e)==0xa);
156 u_int target_insn=*(u_int *)target;
157 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
160 if((target_insn&0x0c100000)==0x04100000) { // Load
163 if(target_insn&0x08000000) {
167 ptr2[-1]=target_insn;
170 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
176 static void add_literal(int addr,int val)
178 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
179 literals[literalcount][0]=addr;
180 literals[literalcount][1]=val;
184 // from a pointer to external jump stub (which was produced by emit_extjump2)
185 // find where the jumping insn is
186 static void *find_extjump_insn(void *stub)
188 int *ptr=(int *)(stub+4);
189 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
190 u_int offset=*ptr&0xfff;
191 void **l_ptr=(void *)ptr+offset+8;
195 // find where external branch is liked to using addr of it's stub:
196 // get address that insn one after stub loads (dyna_linker arg1),
197 // treat it as a pointer to branch insn,
198 // return addr where that branch jumps to
199 static void *get_pointer(void *stub)
201 //printf("get_pointer(%x)\n",(int)stub);
202 int *i_ptr=find_extjump_insn(stub);
203 assert((*i_ptr&0x0f000000)==0x0a000000); // b
204 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
207 // Find the "clean" entry point from a "dirty" entry point
208 // by skipping past the call to verify_code
209 static void *get_clean_addr(void *addr)
211 signed int *ptr = addr;
217 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
218 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
220 if((*ptr&0xFF000000)==0xea000000) {
221 return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
226 static int verify_dirty(const u_int *ptr)
230 // get from literal pool
231 assert((*ptr&0xFFFF0000)==0xe59f0000);
233 u_int source=*(u_int*)((void *)ptr+offset+8);
235 assert((*ptr&0xFFFF0000)==0xe59f0000);
237 u_int copy=*(u_int*)((void *)ptr+offset+8);
239 assert((*ptr&0xFFFF0000)==0xe59f0000);
241 u_int len=*(u_int*)((void *)ptr+offset+8);
246 assert((*ptr&0xFFF00000)==0xe3000000);
247 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
248 u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
249 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
252 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
253 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
254 //printf("verify_dirty: %x %x %x\n",source,copy,len);
255 return !memcmp((void *)source,(void *)copy,len);
258 // This doesn't necessarily find all clean entry points, just
259 // guarantees that it's not dirty
260 static int isclean(void *addr)
263 u_int *ptr=((u_int *)addr)+4;
265 u_int *ptr=((u_int *)addr)+6;
267 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
268 if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
269 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
270 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
274 // get source that block at addr was compiled from (host pointers)
275 static void get_bounds(void *addr, u_char **start, u_char **end)
280 // get from literal pool
281 assert((*ptr&0xFFFF0000)==0xe59f0000);
283 u_int source=*(u_int*)((void *)ptr+offset+8);
285 //assert((*ptr&0xFFFF0000)==0xe59f0000);
287 //u_int copy=*(u_int*)((void *)ptr+offset+8);
289 assert((*ptr&0xFFFF0000)==0xe59f0000);
291 u_int len=*(u_int*)((void *)ptr+offset+8);
296 assert((*ptr&0xFFF00000)==0xe3000000);
297 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
298 //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
299 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
302 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
303 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
304 *start=(u_char *)source;
305 *end=(u_char *)source+len;
308 // Allocate a specific ARM register.
309 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
314 // see if it's already allocated (and dealloc it)
315 for(n=0;n<HOST_REGS;n++)
317 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
318 dirty=(cur->dirty>>n)&1;
324 cur->dirty&=~(1<<hr);
325 cur->dirty|=dirty<<hr;
326 cur->isconst&=~(1<<hr);
329 // Alloc cycle count into dedicated register
330 static void alloc_cc(struct regstat *cur,int i)
332 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
337 static unused char regname[16][4] = {
355 static void output_w32(u_int word)
357 *((u_int *)out)=word;
361 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
366 return((rn<<16)|(rd<<12)|rm);
369 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
374 assert((shift&1)==0);
375 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
378 static u_int genimm(u_int imm,u_int *encoded)
386 *encoded=((i&30)<<7)|imm;
389 imm=(imm>>2)|(imm<<30);i-=2;
394 static void genimm_checked(u_int imm,u_int *encoded)
396 u_int ret=genimm(imm,encoded);
401 static u_int genjmp(u_int addr)
403 if (addr < 3) return 0; // a branch that will be patched later
404 int offset = addr-(int)out-8;
405 if (offset < -33554432 || offset >= 33554432) {
406 SysPrintf("genjmp: out of range: %08x\n", offset);
410 return ((u_int)offset>>2)&0xffffff;
413 static unused void emit_breakpoint(void)
415 assem_debug("bkpt #0\n");
416 //output_w32(0xe1200070);
417 output_w32(0xe7f001f0);
420 static void emit_mov(int rs,int rt)
422 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
423 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
426 static void emit_movs(int rs,int rt)
428 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
429 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
432 static void emit_add(int rs1,int rs2,int rt)
434 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
435 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
438 static void emit_adds(int rs1,int rs2,int rt)
440 assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
441 output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
443 #define emit_adds_ptr emit_adds
445 static void emit_adcs(int rs1,int rs2,int rt)
447 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
448 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
451 static void emit_neg(int rs, int rt)
453 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
454 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
457 static void emit_sub(int rs1,int rs2,int rt)
459 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
460 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
463 static void emit_zeroreg(int rt)
465 assem_debug("mov %s,#0\n",regname[rt]);
466 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
469 static void emit_loadlp(u_int imm,u_int rt)
471 add_literal((int)out,imm);
472 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
473 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
477 static void emit_movw(u_int imm,u_int rt)
480 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
481 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
484 static void emit_movt(u_int imm,u_int rt)
486 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
487 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
491 static void emit_movimm(u_int imm,u_int rt)
494 if(genimm(imm,&armval)) {
495 assem_debug("mov %s,#%d\n",regname[rt],imm);
496 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
497 }else if(genimm(~imm,&armval)) {
498 assem_debug("mvn %s,#%d\n",regname[rt],imm);
499 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
500 }else if(imm<65536) {
502 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
503 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
504 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
505 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
513 emit_movw(imm&0x0000FFFF,rt);
514 emit_movt(imm&0xFFFF0000,rt);
519 static void emit_pcreladdr(u_int rt)
521 assem_debug("add %s,pc,#?\n",regname[rt]);
522 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
525 static void emit_loadreg(int r, int hr)
528 SysPrintf("64bit load in 32bit mode!\n");
537 //case HIREG: addr = &hi; break;
538 //case LOREG: addr = &lo; break;
539 case CCREG: addr = &cycle_count; break;
540 case CSREG: addr = &Status; break;
541 case INVCP: addr = &invc_ptr; break;
542 case ROREG: addr = &ram_offset; break;
545 addr = &psxRegs.GPR.r[r];
548 u_int offset = (u_char *)addr - (u_char *)&dynarec_local;
550 assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
551 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
555 static void emit_storereg(int r, int hr)
558 SysPrintf("64bit store in 32bit mode!\n");
562 int addr = (int)&psxRegs.GPR.r[r];
564 //case HIREG: addr = &hi; break;
565 //case LOREG: addr = &lo; break;
566 case CCREG: addr = (int)&cycle_count; break;
567 default: assert(r < 34); break;
569 u_int offset = addr-(u_int)&dynarec_local;
571 assem_debug("str %s,fp+%d\n",regname[hr],offset);
572 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
575 static void emit_test(int rs, int rt)
577 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
578 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
581 static void emit_testimm(int rs,int imm)
584 assem_debug("tst %s,#%d\n",regname[rs],imm);
585 genimm_checked(imm,&armval);
586 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
589 static void emit_testeqimm(int rs,int imm)
592 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
593 genimm_checked(imm,&armval);
594 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
597 static void emit_not(int rs,int rt)
599 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
600 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
603 static void emit_and(u_int rs1,u_int rs2,u_int rt)
605 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
606 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
609 static void emit_or(u_int rs1,u_int rs2,u_int rt)
611 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
612 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
615 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
620 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
621 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
624 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
629 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
630 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
633 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
635 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
636 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
639 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
641 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
642 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
645 static void emit_addimm(u_int rs,int imm,u_int rt)
651 if(genimm(imm,&armval)) {
652 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
653 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
654 }else if(genimm(-imm,&armval)) {
655 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
656 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
658 }else if(rt!=rs&&(u_int)imm<65536) {
659 emit_movw(imm&0x0000ffff,rt);
661 }else if(rt!=rs&&(u_int)-imm<65536) {
662 emit_movw(-imm&0x0000ffff,rt);
665 }else if((u_int)-imm<65536) {
666 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
667 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
668 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
669 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
672 int shift = (ffs(imm) - 1) & ~1;
673 int imm8 = imm & (0xff << shift);
674 genimm_checked(imm8,&armval);
675 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
676 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
683 else if(rs!=rt) emit_mov(rs,rt);
686 static void emit_addimm_and_set_flags(int imm,int rt)
688 assert(imm>-65536&&imm<65536);
690 if(genimm(imm,&armval)) {
691 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
692 output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
693 }else if(genimm(-imm,&armval)) {
694 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
695 output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
697 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
698 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
699 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
700 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
702 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
703 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
704 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
705 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
709 static void emit_addnop(u_int r)
712 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
713 output_w32(0xe2800000|rd_rn_rm(r,r,0));
716 static void emit_andimm(int rs,int imm,int rt)
721 }else if(genimm(imm,&armval)) {
722 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
723 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
724 }else if(genimm(~imm,&armval)) {
725 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
726 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
727 }else if(imm==65535) {
729 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
730 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
731 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
732 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
734 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
735 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
738 assert(imm>0&&imm<65535);
740 assem_debug("mov r14,#%d\n",imm&0xFF00);
741 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
742 assem_debug("add r14,r14,#%d\n",imm&0xFF);
743 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
745 emit_movw(imm,HOST_TEMPREG);
747 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
748 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
752 static void emit_orimm(int rs,int imm,int rt)
756 if(rs!=rt) emit_mov(rs,rt);
757 }else if(genimm(imm,&armval)) {
758 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
759 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
761 assert(imm>0&&imm<65536);
762 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
763 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
764 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
765 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
769 static void emit_xorimm(int rs,int imm,int rt)
773 if(rs!=rt) emit_mov(rs,rt);
774 }else if(genimm(imm,&armval)) {
775 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
776 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
778 assert(imm>0&&imm<65536);
779 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
780 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
781 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
782 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
786 static void emit_shlimm(int rs,u_int imm,int rt)
791 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
792 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
795 static void emit_lsls_imm(int rs,int imm,int rt)
799 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
800 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
803 static unused void emit_lslpls_imm(int rs,int imm,int rt)
807 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
808 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
811 static void emit_shrimm(int rs,u_int imm,int rt)
815 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
816 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
819 static void emit_sarimm(int rs,u_int imm,int rt)
823 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
824 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
827 static void emit_rorimm(int rs,u_int imm,int rt)
831 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
832 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
835 static void emit_signextend16(int rs,int rt)
838 emit_shlimm(rs,16,rt);
839 emit_sarimm(rt,16,rt);
841 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
842 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
846 static void emit_signextend8(int rs,int rt)
849 emit_shlimm(rs,24,rt);
850 emit_sarimm(rt,24,rt);
852 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
853 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
857 static void emit_shl(u_int rs,u_int shift,u_int rt)
863 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
864 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
867 static void emit_shr(u_int rs,u_int shift,u_int rt)
872 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
873 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
876 static void emit_sar(u_int rs,u_int shift,u_int rt)
881 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
882 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
885 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
890 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
891 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
894 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
899 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
900 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
903 static void emit_cmpimm(int rs,int imm)
906 if(genimm(imm,&armval)) {
907 assem_debug("cmp %s,#%d\n",regname[rs],imm);
908 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
909 }else if(genimm(-imm,&armval)) {
910 assem_debug("cmn %s,#%d\n",regname[rs],imm);
911 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
914 emit_movimm(imm,HOST_TEMPREG);
915 assem_debug("cmp %s,r14\n",regname[rs]);
916 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
919 emit_movimm(-imm,HOST_TEMPREG);
920 assem_debug("cmn %s,r14\n",regname[rs]);
921 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
925 static void emit_cmovne_imm(int imm,int rt)
927 assem_debug("movne %s,#%d\n",regname[rt],imm);
929 genimm_checked(imm,&armval);
930 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
933 static void emit_cmovl_imm(int imm,int rt)
935 assem_debug("movlt %s,#%d\n",regname[rt],imm);
937 genimm_checked(imm,&armval);
938 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
941 static void emit_cmovb_imm(int imm,int rt)
943 assem_debug("movcc %s,#%d\n",regname[rt],imm);
945 genimm_checked(imm,&armval);
946 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
949 static void emit_cmovae_imm(int imm,int rt)
951 assem_debug("movcs %s,#%d\n",regname[rt],imm);
953 genimm_checked(imm,&armval);
954 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
957 static void emit_cmovs_imm(int imm,int rt)
959 assem_debug("movmi %s,#%d\n",regname[rt],imm);
961 genimm_checked(imm,&armval);
962 output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
965 static void emit_cmovne_reg(int rs,int rt)
967 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
968 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
971 static void emit_cmovl_reg(int rs,int rt)
973 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
974 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
977 static void emit_cmovb_reg(int rs,int rt)
979 assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
980 output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
983 static void emit_cmovs_reg(int rs,int rt)
985 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
986 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
989 static void emit_slti32(int rs,int imm,int rt)
991 if(rs!=rt) emit_zeroreg(rt);
993 if(rs==rt) emit_movimm(0,rt);
994 emit_cmovl_imm(1,rt);
997 static void emit_sltiu32(int rs,int imm,int rt)
999 if(rs!=rt) emit_zeroreg(rt);
1000 emit_cmpimm(rs,imm);
1001 if(rs==rt) emit_movimm(0,rt);
1002 emit_cmovb_imm(1,rt);
1005 static void emit_cmp(int rs,int rt)
1007 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
1008 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
1011 static void emit_set_gz32(int rs, int rt)
1013 //assem_debug("set_gz32\n");
1016 emit_cmovl_imm(0,rt);
1019 static void emit_set_nz32(int rs, int rt)
1021 //assem_debug("set_nz32\n");
1022 if(rs!=rt) emit_movs(rs,rt);
1023 else emit_test(rs,rs);
1024 emit_cmovne_imm(1,rt);
1027 static void emit_set_if_less32(int rs1, int rs2, int rt)
1029 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1030 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1032 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1033 emit_cmovl_imm(1,rt);
1036 static void emit_set_if_carry32(int rs1, int rs2, int rt)
1038 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1039 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1041 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1042 emit_cmovb_imm(1,rt);
1045 static int can_jump_or_call(const void *a)
1047 intptr_t offset = (u_char *)a - out - 8;
1048 return (-33554432 <= offset && offset < 33554432);
1051 static void emit_call(const void *a_)
1054 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1055 u_int offset=genjmp(a);
1056 output_w32(0xeb000000|offset);
1059 static void emit_jmp(const void *a_)
1062 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1063 u_int offset=genjmp(a);
1064 output_w32(0xea000000|offset);
1067 static void emit_jne(const void *a_)
1070 assem_debug("bne %x\n",a);
1071 u_int offset=genjmp(a);
1072 output_w32(0x1a000000|offset);
1075 static void emit_jeq(const void *a_)
1078 assem_debug("beq %x\n",a);
1079 u_int offset=genjmp(a);
1080 output_w32(0x0a000000|offset);
1083 static void emit_js(const void *a_)
1086 assem_debug("bmi %x\n",a);
1087 u_int offset=genjmp(a);
1088 output_w32(0x4a000000|offset);
1091 static void emit_jns(const void *a_)
1094 assem_debug("bpl %x\n",a);
1095 u_int offset=genjmp(a);
1096 output_w32(0x5a000000|offset);
1099 static void emit_jl(const void *a_)
1102 assem_debug("blt %x\n",a);
1103 u_int offset=genjmp(a);
1104 output_w32(0xba000000|offset);
1107 static void emit_jge(const void *a_)
1110 assem_debug("bge %x\n",a);
1111 u_int offset=genjmp(a);
1112 output_w32(0xaa000000|offset);
1115 static void emit_jno(const void *a_)
1118 assem_debug("bvc %x\n",a);
1119 u_int offset=genjmp(a);
1120 output_w32(0x7a000000|offset);
1123 static void emit_jc(const void *a_)
1126 assem_debug("bcs %x\n",a);
1127 u_int offset=genjmp(a);
1128 output_w32(0x2a000000|offset);
1131 static void emit_jcc(const void *a_)
1134 assem_debug("bcc %x\n",a);
1135 u_int offset=genjmp(a);
1136 output_w32(0x3a000000|offset);
1139 static unused void emit_callreg(u_int r)
1142 assem_debug("blx %s\n",regname[r]);
1143 output_w32(0xe12fff30|r);
1146 static void emit_jmpreg(u_int r)
1148 assem_debug("mov pc,%s\n",regname[r]);
1149 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1152 static void emit_ret(void)
1157 static void emit_readword_indexed(int offset, int rs, int rt)
1159 assert(offset>-4096&&offset<4096);
1160 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1162 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1164 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1168 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1170 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1171 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1173 #define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
1175 static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
1177 assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1178 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
1181 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1183 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1184 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1187 static void emit_ldrb_dualindexed(int rs1, int rs2, int rt)
1189 assem_debug("ldrb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1190 output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2));
1193 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1195 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1196 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1199 static void emit_ldrsb_dualindexed(int rs1, int rs2, int rt)
1201 assem_debug("ldrsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1202 output_w32(0xe19000d0|rd_rn_rm(rt,rs1,rs2));
1205 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1207 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1208 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1211 static void emit_ldrh_dualindexed(int rs1, int rs2, int rt)
1213 assem_debug("ldrh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1214 output_w32(0xe19000b0|rd_rn_rm(rt,rs1,rs2));
1217 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1219 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1220 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1223 static void emit_ldrsh_dualindexed(int rs1, int rs2, int rt)
1225 assem_debug("ldrsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1226 output_w32(0xe19000f0|rd_rn_rm(rt,rs1,rs2));
1229 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1231 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1232 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1235 static void emit_str_dualindexed(int rs1, int rs2, int rt)
1237 assem_debug("str %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1238 output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2));
1241 static void emit_strb_dualindexed(int rs1, int rs2, int rt)
1243 assem_debug("strb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1244 output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2));
1247 static void emit_strh_dualindexed(int rs1, int rs2, int rt)
1249 assem_debug("strh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1250 output_w32(0xe18000b0|rd_rn_rm(rt,rs1,rs2));
1253 static void emit_movsbl_indexed(int offset, int rs, int rt)
1255 assert(offset>-256&&offset<256);
1256 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1258 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1260 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1264 static void emit_movswl_indexed(int offset, int rs, int rt)
1266 assert(offset>-256&&offset<256);
1267 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1269 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1271 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1275 static void emit_movzbl_indexed(int offset, int rs, int rt)
1277 assert(offset>-4096&&offset<4096);
1278 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1280 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1282 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1286 static void emit_movzwl_indexed(int offset, int rs, int rt)
1288 assert(offset>-256&&offset<256);
1289 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1291 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1293 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1297 static void emit_ldrd(int offset, int rs, int rt)
1299 assert(offset>-256&&offset<256);
1300 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1302 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1304 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1308 static void emit_readword(void *addr, int rt)
1310 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1311 assert(offset<4096);
1312 assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
1313 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1315 #define emit_readptr emit_readword
1317 static void emit_writeword_indexed(int rt, int offset, int rs)
1319 assert(offset>-4096&&offset<4096);
1320 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1322 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1324 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1328 static void emit_writehword_indexed(int rt, int offset, int rs)
1330 assert(offset>-256&&offset<256);
1331 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1333 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1335 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1339 static void emit_writebyte_indexed(int rt, int offset, int rs)
1341 assert(offset>-4096&&offset<4096);
1342 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1344 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1346 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1350 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1352 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1353 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1356 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1358 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1359 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1362 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1364 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1365 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1368 static void emit_writeword(int rt, void *addr)
1370 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1371 assert(offset<4096);
1372 assem_debug("str %s,fp+%d\n",regname[rt],offset);
1373 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1376 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1378 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1383 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1386 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1388 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1393 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1396 static void emit_clz(int rs,int rt)
1398 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1399 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1402 static void emit_subcs(int rs1,int rs2,int rt)
1404 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1405 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1408 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1412 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1413 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1416 static void emit_shrne_imm(int rs,u_int imm,int rt)
1420 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1421 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1424 static void emit_negmi(int rs, int rt)
1426 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1427 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1430 static void emit_negsmi(int rs, int rt)
1432 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1433 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1436 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1438 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1439 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1442 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1444 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1445 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1448 static void emit_teq(int rs, int rt)
1450 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1451 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1454 static unused void emit_rsbimm(int rs, int imm, int rt)
1457 genimm_checked(imm,&armval);
1458 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1459 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1462 // Conditionally select one of two immediates, optimizing for small code size
1463 // This will only be called if HAVE_CMOV_IMM is defined
1464 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1467 if(genimm(imm2-imm1,&armval)) {
1468 emit_movimm(imm1,rt);
1469 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1470 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1471 }else if(genimm(imm1-imm2,&armval)) {
1472 emit_movimm(imm1,rt);
1473 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1474 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1478 emit_movimm(imm1,rt);
1479 add_literal((int)out,imm2);
1480 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1481 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1483 emit_movw(imm1&0x0000FFFF,rt);
1484 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1485 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1486 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1488 emit_movt(imm1&0xFFFF0000,rt);
1489 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1490 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1491 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1497 // special case for checking invalid_code
1498 static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
1500 assert(imm<128&&imm>=0);
1502 assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
1503 output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
1504 emit_cmpimm(HOST_TEMPREG,imm);
1507 static void emit_callne(int a)
1509 assem_debug("blne %x\n",a);
1510 u_int offset=genjmp(a);
1511 output_w32(0x1b000000|offset);
1514 // Used to preload hash table entries
1515 static unused void emit_prefetchreg(int r)
1517 assem_debug("pld %s\n",regname[r]);
1518 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1521 // Special case for mini_ht
1522 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1524 assert(offset<4096);
1525 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1526 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1529 static void emit_orrne_imm(int rs,int imm,int rt)
1532 genimm_checked(imm,&armval);
1533 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1534 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1537 static unused void emit_addpl_imm(int rs,int imm,int rt)
1540 genimm_checked(imm,&armval);
1541 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1542 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1545 static void emit_jno_unlikely(int a)
1548 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1549 output_w32(0x72800000|rd_rn_rm(15,15,0));
1552 static void save_regs_all(u_int reglist)
1555 if(!reglist) return;
1556 assem_debug("stmia fp,{");
1559 assem_debug("r%d,",i);
1561 output_w32(0xe88b0000|reglist);
1564 static void restore_regs_all(u_int reglist)
1567 if(!reglist) return;
1568 assem_debug("ldmia fp,{");
1571 assem_debug("r%d,",i);
1573 output_w32(0xe89b0000|reglist);
1576 // Save registers before function call
1577 static void save_regs(u_int reglist)
1579 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1580 save_regs_all(reglist);
1583 // Restore registers after function call
1584 static void restore_regs(u_int reglist)
1586 reglist&=CALLER_SAVE_REGS;
1587 restore_regs_all(reglist);
1590 /* Stubs/epilogue */
1592 static void literal_pool(int n)
1594 if(!literalcount) return;
1596 if((int)out-literals[0][0]<4096-n) return;
1600 for(i=0;i<literalcount;i++)
1602 u_int l_addr=(u_int)out;
1605 if(literals[j][1]==literals[i][1]) {
1606 //printf("dup %08x\n",literals[i][1]);
1607 l_addr=literals[j][0];
1611 ptr=(u_int *)literals[i][0];
1612 u_int offset=l_addr-(u_int)ptr-8;
1613 assert(offset<4096);
1614 assert(!(offset&3));
1616 if(l_addr==(u_int)out) {
1617 literals[i][0]=l_addr; // remember for dupes
1618 output_w32(literals[i][1]);
1624 static void literal_pool_jumpover(int n)
1626 if(!literalcount) return;
1628 if((int)out-literals[0][0]<4096-n) return;
1633 set_jump_target(jaddr, out);
1636 // parsed by get_pointer, find_extjump_insn
1637 static void emit_extjump2(u_char *addr, u_int target, void *linker)
1639 u_char *ptr=(u_char *)addr;
1640 assert((ptr[3]&0x0e)==0xa);
1643 emit_loadlp(target,0);
1644 emit_loadlp((u_int)addr,1);
1645 assert(addr>=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<<TARGET_SIZE_2)));
1646 //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
1648 #ifdef DEBUG_CYCLE_COUNT
1649 emit_readword(&last_count,ECX);
1650 emit_add(HOST_CCREG,ECX,HOST_CCREG);
1651 emit_readword(&next_interupt,ECX);
1652 emit_writeword(HOST_CCREG,&Count);
1653 emit_sub(HOST_CCREG,ECX,HOST_CCREG);
1654 emit_writeword(ECX,&last_count);
1657 emit_far_jump(linker);
1660 static void check_extjump2(void *src)
1663 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1667 // put rt_val into rt, potentially making use of rs with value rs_val
1668 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1672 if(genimm(rt_val,&armval)) {
1673 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1674 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1677 if(genimm(~rt_val,&armval)) {
1678 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1679 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1683 if(genimm(diff,&armval)) {
1684 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1685 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1687 }else if(genimm(-diff,&armval)) {
1688 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1689 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1692 emit_movimm(rt_val,rt);
1695 // return 1 if above function can do it's job cheaply
1696 static int is_similar_value(u_int v1,u_int v2)
1700 if(v1==v2) return 1;
1702 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1704 if(xs<0x100) return 1;
1705 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1707 if(xs<0x100) return 1;
1711 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1714 case LOADB_STUB: emit_signextend8(rs,rt); break;
1715 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1716 case LOADH_STUB: emit_signextend16(rs,rt); break;
1717 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1718 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1723 #include "pcsxmem.h"
1724 #include "pcsxmem_inline.c"
1726 static void do_readstub(int n)
1728 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1730 set_jump_target(stubs[n].addr, out);
1731 enum stub_type type=stubs[n].type;
1734 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1735 u_int reglist=stubs[n].e;
1736 const signed char *i_regmap=i_regs->regmap;
1738 if(dops[i].itype==C1LS||dops[i].itype==C2LS||dops[i].itype==LOADLR) {
1739 rt=get_reg(i_regmap,FTEMP);
1741 rt=get_reg(i_regmap,dops[i].rt1);
1744 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1745 void *restore_jump = NULL;
1747 for(r=0;r<=12;r++) {
1748 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1752 if(rt>=0&&dops[i].rt1!=0)
1759 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1761 emit_readword(&mem_rtab,temp);
1762 emit_shrimm(rs,12,temp2);
1763 emit_readword_dualindexedx4(temp,temp2,temp2);
1764 emit_lsls_imm(temp2,1,temp2);
1765 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1767 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1768 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1769 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1770 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1771 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1777 emit_jcc(0); // jump to reg restore
1780 emit_jcc(stubs[n].retaddr); // return address
1785 if(type==LOADB_STUB||type==LOADBU_STUB)
1786 handler=jump_handler_read8;
1787 if(type==LOADH_STUB||type==LOADHU_STUB)
1788 handler=jump_handler_read16;
1789 if(type==LOADW_STUB)
1790 handler=jump_handler_read32;
1792 pass_args(rs,temp2);
1793 int cc=get_reg(i_regmap,CCREG);
1795 emit_loadreg(CCREG,2);
1796 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1797 emit_far_call(handler);
1798 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1799 mov_loadtype_adj(type,0,rt);
1802 set_jump_target(restore_jump, out);
1803 restore_regs(reglist);
1804 emit_jmp(stubs[n].retaddr); // return address
1807 static void inline_readstub(enum stub_type type, int i, u_int addr,
1808 const signed char regmap[], int target, int adj, u_int reglist)
1810 int rs=get_reg(regmap,target);
1811 int rt=get_reg(regmap,target);
1812 if(rs<0) rs=get_reg(regmap,-1);
1815 uintptr_t host_addr = 0;
1817 int cc=get_reg(regmap,CCREG);
1818 if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
1820 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1821 if (handler == NULL) {
1822 if(rt<0||dops[i].rt1==0)
1825 emit_movimm_from(addr,rs,host_addr,rs);
1827 case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
1828 case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
1829 case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
1830 case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
1831 case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
1836 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1838 if(type==LOADB_STUB||type==LOADBU_STUB)
1839 handler=jump_handler_read8;
1840 if(type==LOADH_STUB||type==LOADHU_STUB)
1841 handler=jump_handler_read16;
1842 if(type==LOADW_STUB)
1843 handler=jump_handler_read32;
1846 // call a memhandler
1847 if(rt>=0&&dops[i].rt1!=0)
1851 emit_movimm(addr,0);
1855 emit_loadreg(CCREG,2);
1857 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1858 emit_addimm(cc<0?2:cc,adj,2);
1861 emit_readword(&last_count,3);
1862 emit_addimm(cc<0?2:cc,adj,2);
1864 emit_writeword(2,&Count);
1867 emit_far_call(handler);
1869 if(rt>=0&&dops[i].rt1!=0) {
1871 case LOADB_STUB: emit_signextend8(0,rt); break;
1872 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1873 case LOADH_STUB: emit_signextend16(0,rt); break;
1874 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1875 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1879 restore_regs(reglist);
1882 static void do_writestub(int n)
1884 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1886 set_jump_target(stubs[n].addr, out);
1887 enum stub_type type=stubs[n].type;
1890 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1891 u_int reglist=stubs[n].e;
1892 const signed char *i_regmap=i_regs->regmap;
1894 if(dops[i].itype==C1LS||dops[i].itype==C2LS) {
1895 rt=get_reg(i_regmap,r=FTEMP);
1897 rt=get_reg(i_regmap,r=dops[i].rs2);
1901 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1902 void *restore_jump = NULL;
1903 int reglist2=reglist|(1<<rs)|(1<<rt);
1904 for(rtmp=0;rtmp<=12;rtmp++) {
1905 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1912 for(rtmp=0;rtmp<=3;rtmp++)
1913 if(rtmp!=rs&&rtmp!=rt)
1916 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1918 emit_readword(&mem_wtab,temp);
1919 emit_shrimm(rs,12,temp2);
1920 emit_readword_dualindexedx4(temp,temp2,temp2);
1921 emit_lsls_imm(temp2,1,temp2);
1923 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1924 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1925 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1930 emit_jcc(0); // jump to reg restore
1933 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1939 case STOREB_STUB: handler=jump_handler_write8; break;
1940 case STOREH_STUB: handler=jump_handler_write16; break;
1941 case STOREW_STUB: handler=jump_handler_write32; break;
1948 int cc=get_reg(i_regmap,CCREG);
1950 emit_loadreg(CCREG,2);
1951 emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
1952 // returns new cycle_count
1953 emit_far_call(handler);
1954 emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
1956 emit_storereg(CCREG,2);
1958 set_jump_target(restore_jump, out);
1959 restore_regs(reglist);
1960 emit_jmp(stubs[n].retaddr);
1963 static void inline_writestub(enum stub_type type, int i, u_int addr,
1964 const signed char regmap[], int target, int adj, u_int reglist)
1966 int rs=get_reg(regmap,-1);
1967 int rt=get_reg(regmap,target);
1970 uintptr_t host_addr = 0;
1971 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1972 if (handler == NULL) {
1974 emit_movimm_from(addr,rs,host_addr,rs);
1976 case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
1977 case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
1978 case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
1984 // call a memhandler
1987 int cc=get_reg(regmap,CCREG);
1989 emit_loadreg(CCREG,2);
1990 emit_addimm(cc<0?2:cc,adj,2);
1991 emit_movimm((u_int)handler,3);
1992 // returns new cycle_count
1993 emit_far_call(jump_handler_write_h);
1994 emit_addimm(0,-adj,cc<0?2:cc);
1996 emit_storereg(CCREG,2);
1997 restore_regs(reglist);
2000 // this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
2001 static void do_dirty_stub_emit_args(u_int arg0, u_int source_len)
2004 emit_loadlp((int)source, 1);
2005 emit_loadlp((int)copy, 2);
2006 emit_loadlp(source_len, 3);
2008 emit_movw(((u_int)source)&0x0000FFFF, 1);
2009 emit_movw(((u_int)copy)&0x0000FFFF, 2);
2010 emit_movt(((u_int)source)&0xFFFF0000, 1);
2011 emit_movt(((u_int)copy)&0xFFFF0000, 2);
2012 emit_movw(source_len, 3);
2014 emit_movimm(arg0, 0);
2017 static void *do_dirty_stub(int i, u_int source_len)
2019 assem_debug("do_dirty_stub %x\n",start+i*4);
2020 do_dirty_stub_emit_args(start + i*4, source_len);
2021 emit_far_call(verify_code);
2025 entry = instr_addr[i];
2026 emit_jmp(instr_addr[i]);
2030 static void do_dirty_stub_ds(u_int source_len)
2032 do_dirty_stub_emit_args(start + 1, source_len);
2033 emit_far_call(verify_code_ds);
2038 static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
2040 save_regs_all(reglist);
2041 cop2_do_stall_check(op, i, i_regs, 0);
2044 emit_far_call(pcnt_gte_start);
2046 emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
2049 static void c2op_epilogue(u_int op,u_int reglist)
2053 emit_far_call(pcnt_gte_end);
2055 restore_regs_all(reglist);
2058 static void c2op_call_MACtoIR(int lm,int need_flags)
2061 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
2063 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
2066 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
2068 emit_far_call(func);
2069 // func is C code and trashes r0
2070 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2071 if(need_flags||need_ir)
2072 c2op_call_MACtoIR(lm,need_flags);
2073 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
2076 static void c2op_assemble(int i, const struct regstat *i_regs)
2078 u_int c2op = source[i] & 0x3f;
2079 u_int reglist_full = get_host_reglist(i_regs->regmap);
2080 u_int reglist = reglist_full & CALLER_SAVE_REGS;
2081 int need_flags, need_ir;
2083 if (gte_handlers[c2op]!=NULL) {
2084 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
2085 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
2086 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
2087 source[i],gte_unneeded[i+1],need_flags,need_ir);
2088 if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
2090 int shift = (source[i] >> 19) & 1;
2091 int lm = (source[i] >> 10) & 1;
2096 int v = (source[i] >> 15) & 3;
2097 int cv = (source[i] >> 13) & 3;
2098 int mx = (source[i] >> 17) & 3;
2099 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
2100 c2op_prologue(c2op,i,i_regs,reglist);
2101 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
2105 emit_movzwl_indexed(9*4,0,4); // gteIR
2106 emit_movzwl_indexed(10*4,0,6);
2107 emit_movzwl_indexed(11*4,0,5);
2108 emit_orrshl_imm(6,16,4);
2111 emit_addimm(0,32*4+mx*8*4,6);
2113 emit_readword(&zeromem_ptr,6);
2115 emit_addimm(0,32*4+(cv*8+5)*4,7);
2117 emit_readword(&zeromem_ptr,7);
2119 emit_movimm(source[i],1); // opcode
2120 emit_far_call(gteMVMVA_part_neon);
2123 emit_far_call(gteMACtoIR_flags_neon);
2127 emit_far_call(gteMVMVA_part_cv3sh12_arm);
2129 emit_movimm(shift,1);
2130 emit_far_call(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm);
2132 if(need_flags||need_ir)
2133 c2op_call_MACtoIR(lm,need_flags);
2135 #else /* if not HAVE_ARMV5 */
2136 c2op_prologue(c2op,i,i_regs,reglist);
2137 emit_movimm(source[i],1); // opcode
2138 emit_writeword(1,&psxRegs.code);
2139 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2144 c2op_prologue(c2op,i,i_regs,reglist);
2145 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
2146 if(need_flags||need_ir) {
2147 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2148 c2op_call_MACtoIR(lm,need_flags);
2152 c2op_prologue(c2op,i,i_regs,reglist);
2153 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2156 c2op_prologue(c2op,i,i_regs,reglist);
2157 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2160 c2op_prologue(c2op,i,i_regs,reglist);
2161 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2162 if(need_flags||need_ir) {
2163 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2164 c2op_call_MACtoIR(lm,need_flags);
2168 c2op_prologue(c2op,i,i_regs,reglist);
2169 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2172 c2op_prologue(c2op,i,i_regs,reglist);
2173 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2176 c2op_prologue(c2op,i,i_regs,reglist);
2177 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2181 c2op_prologue(c2op,i,i_regs,reglist);
2183 emit_movimm(source[i],1); // opcode
2184 emit_writeword(1,&psxRegs.code);
2186 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2189 c2op_epilogue(c2op,reglist);
2193 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2195 //value = value & 0x7ffff000;
2196 //if (value & 0x7f87e000) value |= 0x80000000;
2197 emit_shrimm(sl,12,temp);
2198 emit_shlimm(temp,12,temp);
2199 emit_testimm(temp,0x7f000000);
2200 emit_testeqimm(temp,0x00870000);
2201 emit_testeqimm(temp,0x0000e000);
2202 emit_orrne_imm(temp,0x80000000,temp);
2205 static void do_mfc2_31_one(u_int copr,signed char temp)
2207 emit_readword(®_cop2d[copr],temp);
2208 emit_lsls_imm(temp,16,temp);
2209 emit_cmovs_imm(0,temp);
2210 emit_cmpimm(temp,0xf80<<16);
2211 emit_andimm(temp,0xf80<<16,temp);
2212 emit_cmovae_imm(0xf80<<16,temp);
2215 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2218 host_tempreg_acquire();
2219 temp = HOST_TEMPREG;
2221 do_mfc2_31_one(9,temp);
2222 emit_shrimm(temp,7+16,tl);
2223 do_mfc2_31_one(10,temp);
2224 emit_orrshr_imm(temp,2+16,tl);
2225 do_mfc2_31_one(11,temp);
2226 emit_orrshr_imm(temp,-3+16,tl);
2227 emit_writeword(tl,®_cop2d[29]);
2228 if (temp == HOST_TEMPREG)
2229 host_tempreg_release();
2232 static void multdiv_assemble_arm(int i, const struct regstat *i_regs)
2239 // case 0x1D: DMULTU
2242 if(dops[i].rs1&&dops[i].rs2)
2244 if((dops[i].opcode2&4)==0) // 32-bit
2246 if(dops[i].opcode2==0x18) // MULT
2248 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2249 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2250 signed char hi=get_reg(i_regs->regmap,HIREG);
2251 signed char lo=get_reg(i_regs->regmap,LOREG);
2256 emit_smull(m1,m2,hi,lo);
2258 if(dops[i].opcode2==0x19) // MULTU
2260 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2261 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2262 signed char hi=get_reg(i_regs->regmap,HIREG);
2263 signed char lo=get_reg(i_regs->regmap,LOREG);
2268 emit_umull(m1,m2,hi,lo);
2270 if(dops[i].opcode2==0x1A) // DIV
2272 signed char d1=get_reg(i_regs->regmap,dops[i].rs1);
2273 signed char d2=get_reg(i_regs->regmap,dops[i].rs2);
2276 signed char quotient=get_reg(i_regs->regmap,LOREG);
2277 signed char remainder=get_reg(i_regs->regmap,HIREG);
2278 assert(quotient>=0);
2279 assert(remainder>=0);
2280 emit_movs(d1,remainder);
2281 emit_movimm(0xffffffff,quotient);
2282 emit_negmi(quotient,quotient); // .. quotient and ..
2283 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2284 emit_movs(d2,HOST_TEMPREG);
2285 emit_jeq(out+52); // Division by zero
2286 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2288 emit_clz(HOST_TEMPREG,quotient);
2289 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
2291 emit_movimm(0,quotient);
2292 emit_addpl_imm(quotient,1,quotient);
2293 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2296 emit_orimm(quotient,1<<31,quotient);
2297 emit_shr(quotient,quotient,quotient);
2298 emit_cmp(remainder,HOST_TEMPREG);
2299 emit_subcs(remainder,HOST_TEMPREG,remainder);
2300 emit_adcs(quotient,quotient,quotient);
2301 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2302 emit_jcc(out-16); // -4
2304 emit_negmi(quotient,quotient);
2306 emit_negmi(remainder,remainder);
2308 if(dops[i].opcode2==0x1B) // DIVU
2310 signed char d1=get_reg(i_regs->regmap,dops[i].rs1); // dividend
2311 signed char d2=get_reg(i_regs->regmap,dops[i].rs2); // divisor
2314 signed char quotient=get_reg(i_regs->regmap,LOREG);
2315 signed char remainder=get_reg(i_regs->regmap,HIREG);
2316 assert(quotient>=0);
2317 assert(remainder>=0);
2318 emit_mov(d1,remainder);
2319 emit_movimm(0xffffffff,quotient); // div0 case
2321 emit_jeq(out+40); // Division by zero
2323 emit_clz(d2,HOST_TEMPREG);
2324 emit_movimm(1<<31,quotient);
2325 emit_shl(d2,HOST_TEMPREG,d2);
2327 emit_movimm(0,HOST_TEMPREG);
2328 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2329 emit_lslpls_imm(d2,1,d2);
2331 emit_movimm(1<<31,quotient);
2333 emit_shr(quotient,HOST_TEMPREG,quotient);
2334 emit_cmp(remainder,d2);
2335 emit_subcs(remainder,d2,remainder);
2336 emit_adcs(quotient,quotient,quotient);
2337 emit_shrcc_imm(d2,1,d2);
2338 emit_jcc(out-16); // -4
2346 // Multiply by zero is zero.
2347 // MIPS does not have a divide by zero exception.
2348 // The result is undefined, we return zero.
2349 signed char hr=get_reg(i_regs->regmap,HIREG);
2350 signed char lr=get_reg(i_regs->regmap,LOREG);
2351 if(hr>=0) emit_zeroreg(hr);
2352 if(lr>=0) emit_zeroreg(lr);
2355 #define multdiv_assemble multdiv_assemble_arm
2357 static void do_jump_vaddr(int rs)
2359 emit_far_jump(jump_vaddr_reg[rs]);
2362 static void do_preload_rhash(int r) {
2363 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2364 // register. On ARM the hash can be done with a single instruction (below)
2367 static void do_preload_rhtbl(int ht) {
2368 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2371 static void do_rhash(int rs,int rh) {
2372 emit_andimm(rs,0xf8,rh);
2375 static void do_miniht_load(int ht,int rh) {
2376 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2377 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2380 static void do_miniht_jump(int rs,int rh,int ht) {
2382 emit_ldreq_indexed(ht,4,15);
2383 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2391 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2393 emit_movimm(return_address,rt); // PC into link register
2394 add_to_linker(out,return_address,1);
2395 emit_pcreladdr(temp);
2396 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2397 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2399 emit_movw(return_address&0x0000FFFF,rt);
2400 add_to_linker(out,return_address,1);
2401 emit_pcreladdr(temp);
2402 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2403 emit_movt(return_address&0xFFFF0000,rt);
2404 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2408 // CPU-architecture-specific initialization
2409 static void arch_init(void)
2411 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2412 struct tramp_insns *ops = ndrc->tramp.ops;
2414 assert(!(diff & 3));
2415 assert(diff < 0x1000);
2416 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2417 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2418 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2419 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2422 // vim:shiftwidth=2:expandtab