4 static void CheckPc(int reg)
\r
6 #if USE_CHECKPC_CALLBACK
\r
7 ot(";@ Check Memory Base+pc (r4)\n");
\r
9 ot(" mov r0,r%i\n", reg);
\r
11 ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");
\r
15 ot(" mov r4,r%i\n", reg);
\r
20 // Push 32-bit value in r1 - trashes r0-r3,r12,lr
\r
23 ot(";@ Push r1 onto stack\n");
\r
24 ot(" ldr r0,[r7,#0x3c]\n");
\r
25 ot(" sub r0,r0,#4 ;@ Predecrement A7\n");
\r
26 ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
\r
31 // Push SR - trashes r0-r3,r12,lr
\r
32 void OpPushSr(int high)
\r
34 ot(";@ Push SR:\n");
\r
36 ot(" ldr r0,[r7,#0x3c]\n");
\r
37 ot(" sub r0,r0,#2 ;@ Predecrement A7\n");
\r
38 ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
\r
43 // Pop SR - trashes r0-r3
\r
44 static void PopSr(int high)
\r
47 ot(" ldr r0,[r7,#0x3c]\n");
\r
48 ot(" add r1,r0,#2 ;@ Postincrement A7\n");
\r
49 ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
\r
55 // Pop PC - assumes r10=Memory Base - trashes r0-r3
\r
59 ot(" ldr r0,[r7,#0x3c]\n");
\r
60 ot(" add r1,r0,#4 ;@ Postincrement A7\n");
\r
61 ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
\r
63 ot(" add r0,r0,r10 ;@ Memory Base+PC\n");
\r
73 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
76 ot(" and r0,r8,#0xf ;@ Get trap number\n");
\r
77 ot(" orr r0,r0,#0x20\n");
\r
78 ot(" mov r0,r0,asl #2\n");
\r
79 ot(" bl Exception\n");
\r
82 Cycles=38; OpEnd(0x10);
\r
87 // --------------------- Opcodes 0x4e50+ ---------------------
\r
95 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
101 EaCalc(10, 7, 8, 2, 1);
\r
102 EaRead(10, 1, 8, 2, 7, 1);
\r
105 ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");
\r
106 ot(" sub r0,r0,#4 ;@ A7-=4\n");
\r
107 ot(" mov r11,r0\n");
\r
108 if(reg==7) ot(" mov r1,r0\n");
\r
111 ot(";@ Write An to Stack\n");
\r
114 ot(";@ Save to An\n");
\r
116 EaWrite(10,11, 8, 2, 7, 1);
\r
118 ot(";@ Get offset:\n");
\r
119 EaCalc(0,0,0x3c,1);
\r
120 EaRead(0,0,0x3c,1,0);
\r
122 ot(" add r11,r11,r0 ;@ Add offset to A7\n");
\r
123 ot(" str r11,[r7,#0x3c]\n");
\r
131 // --------------------- Opcodes 0x4e58+ ---------------------
\r
137 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
142 EaCalc(10, 7, 8, 2, 1);
\r
143 EaRead(10, 0, 8, 2, 7, 1);
\r
145 ot(" add r11,r0,#4 ;@ A7+=4\n");
\r
147 ot(";@ Pop An from stack:\n");
\r
150 ot(" str r11,[r7,#0x3c] ;@ Save A7\n");
\r
152 ot(";@ An = value from stack:\n");
\r
153 EaWrite(10, 0, 8, 2, 7, 1);
\r
160 // --------------------- Opcodes 0x4e70+ ---------------------
\r
165 type=op&7; // 01001110 01110ttt, reset/nop/stop/rte/rtd/rts/trapv/rtr
\r
176 OpStart(op,0x10); Cycles=20;
\r
179 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
182 CheckInterrupt(op);
\r
188 OpStart(op,0x10); Cycles=16;
\r
189 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
195 OpStart(op,0x10); Cycles=4;
\r
196 ot(" tst r9,#0x10000000\n");
\r
197 ot(" subne r5,r5,#%i\n",30);
\r
198 ot(" movne r0,#0x1c ;@ TRAPV exception\n");
\r
199 ot(" blne Exception\n");
\r
204 OpStart(op,0x10); Cycles=20;
\r
206 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
216 // --------------------- Opcodes 0x4e80+ ---------------------
\r
217 // Emit a Jsr/Jmp opcode, 01001110 1meeeeee
\r
225 // See if we can do this opcode:
\r
226 if (EaCanRead(sea,-1)==0) return 1;
\r
229 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
231 OpStart(op,(op&0x40)?0:0x10);
\r
233 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
235 EaCalc(11,0x003f,sea,0);
\r
237 ot(";@ Jump - Get new PC from r0\n");
\r
240 // Jmp - Get new PC from r0
\r
241 ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");
\r
246 ot(";@ Jsr - Push old PC first\n");
\r
247 ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");
\r
248 ot(" mov r1,r1,lsl #8\n");
\r
249 ot(" ldr r0,[r7,#0x3c]\n");
\r
250 ot(" mov r1,r1,asr #8\n");
\r
251 ot(";@ Push r1 onto stack\n");
\r
252 ot(" sub r0,r0,#4 ;@ Predecrement A7\n");
\r
253 ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
\r
255 ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");
\r
261 Cycles=(op&0x40) ? 4 : 12;
\r
262 Cycles+=Ea_add_ns((op&0x40) ? g_jmp_cycle_table : g_jsr_cycle_table, sea);
\r
264 OpEnd((op&0x40)?0:0x10);
\r
269 // --------------------- Opcodes 0x50c8+ ---------------------
\r
271 // ARM version of 68000 condition codes:
\r
272 static char *Cond[16]=
\r
274 "", "", "hi","ls","cc","cs","ne","eq",
\r
275 "vc","vs","pl","mi","ge","lt","gt","le"
\r
278 // Emit a Dbra opcode, 0101cccc 11001nnn vv
\r
284 use=op&~7; // Use same handler
\r
287 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
292 ot(";@ Is the condition true?\n");
\r
293 if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
\r
294 ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
\r
295 if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n");
\r
296 ot(";@ If so, don't dbra\n");
\r
297 ot(" b%s DbraTrue%.4x\n",Cond[cc],op);
\r
301 ot(";@ Decrement Dn.w\n");
\r
302 ot(" and r1,r8,#0x0007\n");
\r
303 ot(" mov r1,r1,lsl #2\n");
\r
304 ot(" ldrsh r0,[r7,r1]\n");
\r
305 ot(" sub r0,r0,#1\n");
\r
306 ot(" strh r0,[r7,r1]\n");
\r
309 ot(";@ Check if Dn.w is -1\n");
\r
310 ot(" cmps r0,#-1\n");
\r
311 ot(" beq DbraMin1%.4x\n",op);
\r
314 ot(";@ Get Branch offset:\n");
\r
315 ot(" ldrsh r0,[r4]\n");
\r
316 ot(" add r4,r4,r0 ;@ r4 = New PC\n");
\r
321 ot(";@ Dn.w is -1:\n");
\r
322 ot("DbraMin1%.4x%s\n", op, ms?"":":");
\r
323 ot(" add r4,r4,#2 ;@ Skip branch offset\n");
\r
328 ot(";@ condition true:\n");
\r
329 ot("DbraTrue%.4x%s\n", op, ms?"":":");
\r
330 ot(" add r4,r4,#2 ;@ Skip branch offset\n");
\r
338 // --------------------- Opcodes 0x6000+ ---------------------
\r
339 // Emit a Branch opcode 0110cccc nn (cccc=condition)
\r
340 int OpBranch(int op)
\r
346 offset=(char)(op&0xff);
\r
349 // Special offsets:
\r
350 if (offset==0) size=1;
\r
351 if (offset==-1) size=2;
\r
353 if (size) use=op; // 16-bit or 32-bit
\r
354 else use=(op&0xff00)+1; // Use same opcode for all 8-bit branches
\r
356 if (op!=use) { OpUse(op,use); return 0; } // Use existing handler
\r
357 OpStart(op,size?0x10:0);
\r
359 ot(";@ Get Branch offset:\n");
\r
362 EaCalc(0,0,0x3c,size);
\r
363 EaRead(0,0,0x3c,size,0);
\r
366 ot(" mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");
\r
368 // above code messes cycles
\r
369 Cycles=10; // Assume branch taken
\r
371 if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
\r
375 ot(";@ Is the condition true?\n");
\r
376 if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
\r
377 ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
\r
378 if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n");
\r
380 ot(" b%s DontBranch%.4x\n",Cond[cc^1],op);
\r
384 if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");
\r
386 ot(";@ Branch taken - Add on r0 to PC\n");
\r
390 ot(";@ Bsr - remember old PC\n");
\r
391 ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");
\r
392 ot(" mov r1,r1, lsl #8\n");
\r
393 ot(" mov r1,r1, asr #8\n");
\r
395 if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
\r
396 ot(" ldr r2,[r7,#0x3c]\n");
\r
397 ot(" add r4,r4,r0 ;@ r4 = New PC\n");
\r
398 ot(";@ Push r1 onto stack\n");
\r
399 ot(" sub r0,r2,#4 ;@ Predecrement A7\n");
\r
400 ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
\r
403 Cycles=18; // always 18
\r
404 if (offset==0 || offset==-1)
\r
406 ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
\r
412 if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);
\r
413 if (offset==0 || offset==-1)
\r
415 ot(" add r0,r4,r0 ;@ r4 = New PC\n");
\r
416 ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");
\r
421 ot(" add r4,r4,r0 ;@ r4 = New PC\n");
\r
427 OpEnd(size?0x10:0);
\r
431 ot("DontBranch%.4x%s\n", op, ms?"":":");
\r
432 Cycles+=(size==1)? 2 : -2; // Branch not taken
\r
433 OpEnd(size?0x10:0);
\r