2 * note about silly things like emith_eor_r_r_r:
3 * these are here because the compiler was designed
4 * for ARM as it's primary target.
8 enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
10 #define CONTEXT_REG xBP
28 // unified conditions (we just use rel8 jump instructions for x86)
29 #define DCOND_EQ IOP_JE
30 #define DCOND_NE IOP_JNE
31 #define DCOND_MI IOP_JS // MInus
32 #define DCOND_PL IOP_JNS // PLus or zero
33 #define DCOND_HI IOP_JA // higher (unsigned)
34 #define DCOND_HS IOP_JAE // higher || same (unsigned)
35 #define DCOND_LO IOP_JB // lower (unsigned)
36 #define DCOND_LS IOP_JBE // lower || same (unsigned)
37 #define DCOND_GE IOP_JGE // greater || equal (signed)
38 #define DCOND_GT IOP_JG // greater (signed)
39 #define DCOND_LE IOP_JLE // less || equal (signed)
40 #define DCOND_LT IOP_JL // less (signed)
41 #define DCOND_VS IOP_JO // oVerflow Set
42 #define DCOND_VC IOP_JNO // oVerflow Clear
44 #define EMIT_PTR(ptr, val, type) \
47 #define EMIT(val, type) { \
48 EMIT_PTR(tcache_ptr, val, type); \
49 tcache_ptr += sizeof(type); \
52 #define EMIT_OP(op) { \
57 #define EMIT_MODRM(mod,r,rm) \
58 EMIT(((mod)<<6) | ((r)<<3) | (rm), u8)
60 #define EMIT_SIB(scale,index,base) \
61 EMIT(((scale)<<6) | ((index)<<3) | (base), u8)
63 #define EMIT_OP_MODRM(op,mod,r,rm) { \
65 EMIT_MODRM(mod, r, rm); \
68 #define JMP8_POS(ptr) \
72 #define JMP8_EMIT(op, ptr) \
73 EMIT_PTR(ptr, op, u8); \
74 EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8)
77 #define emith_move_r_r(dst, src) \
78 EMIT_OP_MODRM(0x8b, 3, dst, src)
80 #define emith_add_r_r(d, s) \
81 EMIT_OP_MODRM(0x01, 3, s, d)
83 #define emith_sub_r_r(d, s) \
84 EMIT_OP_MODRM(0x29, 3, s, d)
86 #define emith_adc_r_r(d, s) \
87 EMIT_OP_MODRM(0x11, 3, s, d)
89 #define emith_sbc_r_r(d, s) \
90 EMIT_OP_MODRM(0x19, 3, s, d) /* SBB */
92 #define emith_or_r_r(d, s) \
93 EMIT_OP_MODRM(0x09, 3, s, d)
95 #define emith_and_r_r(d, s) \
96 EMIT_OP_MODRM(0x21, 3, s, d)
98 #define emith_eor_r_r(d, s) \
99 EMIT_OP_MODRM(0x31, 3, s, d) /* XOR */
101 #define emith_tst_r_r(d, s) \
102 EMIT_OP_MODRM(0x85, 3, s, d) /* TEST */
104 #define emith_cmp_r_r(d, s) \
105 EMIT_OP_MODRM(0x39, 3, s, d)
107 // fake teq - test equivalence - get_flags(d ^ s)
108 #define emith_teq_r_r(d, s) { \
110 emith_eor_r_r(d, s); \
114 #define emith_mvn_r_r(d, s) { \
116 emith_move_r_r(d, s); \
117 EMIT_OP_MODRM(0xf7, 3, 2, d); /* NOT d */ \
120 #define emith_negc_r_r(d, s) { \
121 int tmp_ = rcache_get_tmp(); \
122 emith_move_r_imm(tmp_, 0); \
123 emith_sbc_r_r(tmp_, s); \
124 emith_move_r_r(d, tmp_); \
125 rcache_free_tmp(tmp_); \
128 #define emith_neg_r_r(d, s) { \
130 emith_move_r_r(d, s); \
131 EMIT_OP_MODRM(0xf7, 3, 3, d); /* NEG d */ \
135 #define emith_eor_r_r_r(d, s1, s2) { \
137 emith_eor_r_r(d, s2); \
138 } else if (d == s2) { \
139 emith_eor_r_r(d, s1); \
141 emith_move_r_r(d, s1); \
142 emith_eor_r_r(d, s2); \
147 #define emith_or_r_r_lsl(d, s, lslimm) { \
148 int tmp_ = rcache_get_tmp(); \
149 emith_lsl(tmp_, s, lslimm); \
150 emith_or_r_r(d, tmp_); \
151 rcache_free_tmp(tmp_); \
155 #define emith_eor_r_r_lsr(d, s, lsrimm) { \
157 emith_lsr(s, s, lsrimm); \
158 emith_eor_r_r(d, s); \
163 #define emith_move_r_imm(r, imm) { \
164 EMIT_OP(0xb8 + (r)); \
168 #define emith_move_r_imm_s8(r, imm) \
169 emith_move_r_imm(r, (u32)(signed int)(signed char)(imm))
171 #define emith_arith_r_imm(op, r, imm) { \
172 EMIT_OP_MODRM(0x81, 3, op, r); \
177 #define emith_add_r_imm(r, imm) \
178 emith_arith_r_imm(0, r, imm)
180 #define emith_or_r_imm(r, imm) \
181 emith_arith_r_imm(1, r, imm)
183 #define emith_and_r_imm(r, imm) \
184 emith_arith_r_imm(4, r, imm)
186 #define emith_sub_r_imm(r, imm) \
187 emith_arith_r_imm(5, r, imm)
189 #define emith_eor_r_imm(r, imm) \
190 emith_arith_r_imm(6, r, imm)
192 #define emith_cmp_r_imm(r, imm) \
193 emith_arith_r_imm(7, r, imm)
195 #define emith_tst_r_imm(r, imm) { \
196 EMIT_OP_MODRM(0xf7, 3, 0, r); \
201 #define emith_bic_r_imm(r, imm) \
202 emith_arith_r_imm(4, r, ~(imm))
204 // fake conditionals (using SJMP instead)
205 #define emith_add_r_imm_c(cond, r, imm) { \
207 emith_add_r_imm(r, imm); \
210 #define emith_or_r_imm_c(cond, r, imm) { \
212 emith_or_r_imm(r, imm); \
215 #define emith_eor_r_imm_c(cond, r, imm) { \
217 emith_eor_r_imm(r, imm); \
220 #define emith_sub_r_imm_c(cond, r, imm) { \
222 emith_sub_r_imm(r, imm); \
225 #define emith_bic_r_imm_c(cond, r, imm) { \
227 emith_bic_r_imm(r, imm); \
231 #define emith_and_r_r_imm(d, s, imm) { \
233 emith_move_r_r(d, s); \
234 emith_and_r_imm(d, imm) \
238 #define emith_shift(op, d, s, cnt) { \
240 emith_move_r_r(d, s); \
241 EMIT_OP_MODRM(0xc1, 3, op, d); \
245 #define emith_lsl(d, s, cnt) \
246 emith_shift(4, d, s, cnt)
248 #define emith_lsr(d, s, cnt) \
249 emith_shift(5, d, s, cnt)
251 #define emith_asr(d, s, cnt) \
252 emith_shift(7, d, s, cnt)
254 #define emith_rol(d, s, cnt) \
255 emith_shift(0, d, s, cnt)
257 #define emith_ror(d, s, cnt) \
258 emith_shift(1, d, s, cnt)
260 #define emith_rolc(r) \
261 EMIT_OP_MODRM(0xd1, 3, 2, r)
263 #define emith_rorc(r) \
264 EMIT_OP_MODRM(0xd1, 3, 3, r)
267 #define emith_push(r) \
270 #define emith_pop(r) \
273 #define emith_neg_r(r) \
274 EMIT_OP_MODRM(0xf7, 3, 3, r)
276 #define emith_clear_msb(d, s, count) { \
280 emith_move_r_r(d, s); \
281 emith_and_r_imm(d, t); \
284 #define emith_clear_msb_c(cond, d, s, count) { \
286 emith_clear_msb(d, s, count); \
289 #define emith_sext(d, s, bits) { \
290 emith_lsl(d, s, 32 - (bits)); \
291 emith_asr(d, d, 32 - (bits)); \
294 #define emith_setc(r) { \
297 EMIT_MODRM(3, 0, r); /* SETC r */ \
300 // put bit0 of r0 to carry
301 #define emith_set_carry(r0) { \
302 emith_tst_r_imm(r0, 1); /* clears C */ \
303 EMITH_SJMP_START(DCOND_EQ); \
304 EMIT_OP(0xf9); /* STC */ \
305 EMITH_SJMP_END(DCOND_EQ); \
308 // put bit0 of r0 to carry (for subtraction)
309 #define emith_set_carry_sub emith_set_carry
312 #define emith_mul_(op, dlo, dhi, s1, s2) { \
314 if (dlo != xAX && dhi != xAX) \
316 if (dlo != xDX && dhi != xDX) \
320 else if ((s2) == xAX) \
323 emith_move_r_r(xAX, s1); \
326 EMIT_OP_MODRM(0xf7, 3, op, rmr); /* xMUL rmr */ \
327 /* XXX: using push/pop for the case of edx->eax; eax->edx */ \
328 if (dhi != xDX && dhi != -1) \
331 emith_move_r_r(dlo, xAX); \
332 if (dhi != xDX && dhi != -1) \
334 if (dlo != xDX && dhi != xDX) \
336 if (dlo != xAX && dhi != xAX) \
340 #define emith_mul_u64(dlo, dhi, s1, s2) \
341 emith_mul_(4, dlo, dhi, s1, s2) /* MUL */
343 #define emith_mul_s64(dlo, dhi, s1, s2) \
344 emith_mul_(5, dlo, dhi, s1, s2) /* IMUL */
346 #define emith_mul(d, s1, s2) \
347 emith_mul_(4, d, -1, s1, s2)
349 // (dlo,dhi) += signed(s1) * signed(s2)
350 #define emith_mula_s64(dlo, dhi, s1, s2) { \
353 emith_mul_(5, dlo, dhi, s1, s2); \
354 EMIT_OP_MODRM(0x03, 0, dlo, 4); \
355 EMIT_SIB(0, 4, 4); /* add dlo, [esp] */ \
356 EMIT_OP_MODRM(0x13, 1, dhi, 4); \
358 EMIT(4, u8); /* adc dhi, [esp+4] */ \
359 emith_add_r_imm(xSP, 4*2); \
362 // "flag" instructions are the same
363 #define emith_subf_r_imm emith_sub_r_imm
364 #define emith_addf_r_r emith_add_r_r
365 #define emith_subf_r_r emith_sub_r_r
366 #define emith_adcf_r_r emith_adc_r_r
367 #define emith_sbcf_r_r emith_sbc_r_r
368 #define emith_negcf_r_r emith_negc_r_r
370 #define emith_lslf emith_lsl
371 #define emith_lsrf emith_lsr
372 #define emith_asrf emith_asr
373 #define emith_rolf emith_rol
374 #define emith_rorf emith_ror
375 #define emith_rolcf emith_rolc
376 #define emith_rorcf emith_rorc
378 // XXX: offs is 8bit only
379 #define emith_ctx_read(r, offs) { \
380 EMIT_OP_MODRM(0x8b, 1, r, xBP); \
381 EMIT(offs, u8); /* mov tmp, [ebp+#offs] */ \
384 #define emith_ctx_write(r, offs) { \
385 EMIT_OP_MODRM(0x89, 1, r, xBP); \
386 EMIT(offs, u8); /* mov [ebp+#offs], tmp */ \
389 #define emith_jump(ptr) { \
390 u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \
395 #define emith_call(ptr) { \
396 u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \
401 #define emith_call_cond(cond, ptr) \
404 // "simple" or "short" jump
405 #define EMITH_SJMP_START(cond) { \
409 #define EMITH_SJMP_END(cond) \
410 JMP8_EMIT(cond, cond_ptr); \
413 #define host_arg2reg(rd, arg) \
415 case 0: rd = xAX; break; \
416 case 1: rd = xDX; break; \
417 case 2: rd = xCX; break; \
420 #define emith_pass_arg_r(arg, reg) { \
422 host_arg2reg(rd, arg); \
423 emith_move_r_r(rd, reg); \
426 #define emith_pass_arg_imm(arg, imm) { \
428 host_arg2reg(rd, arg); \
429 emith_move_r_imm(rd, imm); \
432 /* SH2 drc specific */
433 #define emith_sh2_test_t() { \
434 int t = rcache_get_reg(SHR_SR, RC_GR_READ); \
435 EMIT_OP_MODRM(0xf6, 3, 0, t); \
436 EMIT(0x01, u8); /* test <reg>, byte 1 */ \
439 #define emith_sh2_dtbf_loop() { \
440 u8 *jmp0; /* negative cycles check */ \
441 u8 *jmp1; /* unsinged overflow check */ \
443 int tmp_ = rcache_get_tmp(); \
444 cr = rcache_get_reg(SHR_SR, RC_GR_RMW); \
445 rn = rcache_get_reg((op >> 8) & 0x0f, RC_GR_RMW);\
446 emith_sub_r_imm(rn, 1); \
447 emith_sub_r_imm(cr, (cycles+1) << 12); \
449 emith_asr(tmp_, cr, 2+12); \
450 JMP8_POS(jmp0); /* no negative cycles */ \
451 emith_move_r_imm(tmp_, 0); \
452 JMP8_EMIT(IOP_JNS, jmp0); \
453 emith_and_r_imm(cr, 0xffe); \
454 emith_subf_r_r(rn, tmp_); \
455 JMP8_POS(jmp1); /* no overflow */ \
456 emith_neg_r(rn); /* count left */ \
457 emith_lsl(rn, rn, 2+12); \
458 emith_or_r_r(cr, rn); \
459 emith_or_r_imm(cr, 1); \
460 emith_move_r_imm(rn, 0); \
461 JMP8_EMIT(IOP_JA, jmp1); \
462 rcache_free_tmp(tmp_); \
465 #define emith_write_sr(srcr) { \
466 int tmp_ = rcache_get_tmp(); \
467 int srr = rcache_get_reg(SHR_SR, RC_GR_RMW); \
468 emith_clear_msb(tmp_, srcr, 20); \
469 emith_bic_r_imm(srr, 0xfff); \
470 emith_or_r_r(srr, tmp_); \
471 rcache_free_tmp(tmp_); \
474 #define emith_carry_to_t(srr, is_sub) { \
475 int tmp_ = rcache_get_tmp(); \
477 emith_bic_r_imm(srr, 1); \
478 EMIT_OP_MODRM(0x08, 3, tmp_, srr); /* OR srrl, tmpl */ \
479 rcache_free_tmp(tmp_); \
484 * t = carry(Rn += Rm)
486 * t = carry(Rn -= Rm)
489 #define emith_sh2_div1_step(rn, rm, sr) { \
491 int tmp_ = rcache_get_tmp(); \
492 emith_tst_r_imm(sr, Q); /* if (Q ^ M) */ \
493 JMP8_POS(jmp0); /* je do_sub */ \
494 emith_add_r_r(rn, rm); \
495 JMP8_POS(jmp1); /* jmp done */ \
496 JMP8_EMIT(IOP_JE, jmp0); /* do_sub: */ \
497 emith_sub_r_r(rn, rm); \
498 JMP8_EMIT(IOP_JMP, jmp1);/* done: */ \
500 EMIT_OP_MODRM(0x30, 3, tmp_, sr); /* T = Q1 ^ Q2 (byte) */ \
501 rcache_free_tmp(tmp_); \