2 * vim:shiftwidth=2:expandtab
10 #include "../drc/cmn.h"
17 #include "mame/sh2dasm.h"
18 #include <platform/linux/host_dasm.h>
19 static int insns_compiled, hash_collisions, host_insn_count;
22 static void *tcache_dsm_ptr = tcache;
23 static char sh2dasm_buff[64];
26 #define BLOCK_CYCLE_LIMIT 100
28 static void *tcache_ptr;
30 #include "../drc/emit_x86.c"
33 SHR_R0 = 0, SHR_R15 = 15,
34 SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
35 SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
38 typedef struct block_desc_ {
39 u32 addr; // SH2 PC address
40 void *tcache_ptr; // translated block for above PC
41 struct block_desc_ *next; // next block with the same PC hash
44 #define MAX_BLOCK_COUNT (4*1024)
45 static block_desc *block_table;
46 static int block_count;
48 #define MAX_HASH_ENTRIES 1024
49 #define HASH_MASK (MAX_HASH_ENTRIES - 1)
51 extern void sh2_drc_entry(SH2 *sh2, void *block);
52 extern void sh2_drc_exit(void);
55 extern void __attribute__((regparm(2))) sh2_do_op(SH2 *sh2, int opcode);
56 static void __attribute__((regparm(1))) sh2_test_irq(SH2 *sh2);
58 static void *dr_find_block(block_desc *tab, u32 addr)
60 for (tab = tab->next; tab != NULL; tab = tab->next)
61 if (tab->addr == addr)
65 return tab->tcache_ptr;
67 printf("block miss for %08x\n", addr);
71 static block_desc *dr_add_block(u32 addr, void *tcache_ptr)
75 if (block_count == MAX_BLOCK_COUNT) {
76 // FIXME: flush cache instead
77 printf("block descriptor overflow\n");
81 bd = &block_table[block_count];
83 bd->tcache_ptr = tcache_ptr;
89 #define HASH_FUNC(hash_tab, addr) \
90 ((block_desc **)(hash_tab))[(addr) & HASH_MASK]
92 // ---------------------------------------------------------------
94 static void emit_move_r_imm32(sh2_reg_e dst, u32 imm)
96 int host_dst = reg_map_g2h[dst];
101 emith_move_r_imm(tmp, imm);
103 emith_ctx_write(tmp, dst * 4);
106 static void emit_move_r_r(sh2_reg_e dst, sh2_reg_e src)
108 int host_dst = reg_map_g2h[dst], host_src = reg_map_g2h[src];
111 if (host_dst != -1 && host_src != -1) {
112 emith_move_r_r(host_dst, host_src);
122 emith_ctx_read(tmp, src * 4);
124 emith_ctx_write(tmp, dst * 4);
127 static void emit_braf(sh2_reg_e reg, u32 pc)
129 int host_reg = reg_map_g2h[reg];
130 if (host_reg == -1) {
131 emith_ctx_read(0, reg * 4);
133 emith_move_r_r(0, host_reg);
134 emith_add_r_imm(0, pc);
136 emith_ctx_write(0, SHR_PPC * 4);
140 static int sh2_translate_op4(int op)
146 emith_pass_arg(2, sh2, op);
147 emith_call(sh2_do_op);
158 #define CHECK_UNHANDLED_BITS(mask) { \
159 if ((op & (mask)) != 0) \
163 static void *sh2_translate(SH2 *sh2, block_desc *other_block)
165 void *block_entry = tcache_ptr;
166 block_desc *this_block;
167 unsigned int pc = sh2->pc;
168 int op, delayed_op = 0, test_irq = 0;
172 this_block = dr_add_block(pc, block_entry);
173 if (other_block != NULL)
174 this_block->next = other_block;
176 HASH_FUNC(sh2->pc_hashtab, pc) = this_block;
179 printf("== %csh2 block #%d %08x -> %p\n", sh2->is_slave ? 's' : 'm',
180 block_count, pc, block_entry);
181 if (other_block != NULL) {
182 printf(" hash collision with %08x\n", other_block->addr);
187 while (cycles < BLOCK_CYCLE_LIMIT || delayed_op)
192 op = p32x_sh2_read16(pc, sh2->is_slave);
197 DasmSH2(sh2dasm_buff, pc, op);
198 printf("%08x %04x %s\n", pc, op, sh2dasm_buff);
205 switch ((op >> 12) & 0x0f)
210 CHECK_UNHANDLED_BITS(0xd0);
211 // BRAF Rm 0000mmmm00100011
212 // BSRF Rm 0000mmmm00000011
215 emit_move_r_imm32(SHR_PR, pc + 2);
216 emit_braf((op >> 8) & 0x0f, pc + 2);
220 CHECK_UNHANDLED_BITS(0xf0);
221 // NOP 0000000000001001
224 CHECK_UNHANDLED_BITS(0xd0);
227 // RTS 0000000000001011
228 emit_move_r_r(SHR_PPC, SHR_PR);
231 // RTE 0000000000101011
232 //emit_move_r_r(SHR_PC, SHR_PR);
233 emit_move_r_imm32(SHR_PC, pc - 2);
234 emith_pass_arg(2, sh2, op);
235 emith_call(sh2_do_op);
236 emit_move_r_r(SHR_PPC, SHR_PC);
247 if ((op & 0xf0) != 0)
249 // LDC.L @Rm+,SR 0100mmmm00000111
253 if ((op & 0xd0) != 0)
255 // JMP @Rm 0100mmmm00101011
256 // JSR @Rm 0100mmmm00001011
259 emit_move_r_imm32(SHR_PR, pc + 2);
260 emit_move_r_r(SHR_PPC, (op >> 8) & 0x0f);
264 if ((op & 0xf0) != 0)
266 // LDC Rm,SR 0100mmmm00001110
273 switch (op & 0x0f00) {
274 // BT/S label 10001101dddddddd
276 // BF/S label 10001111dddddddd
281 // BT label 10001001dddddddd
283 // BF label 10001011dddddddd
285 tmp = ((signed int)(op << 24) >> 23);
286 tmp2 = delayed_op ? SHR_PPC : SHR_PC;
287 emit_move_r_imm32(tmp2, pc + (delayed_op ? 2 : 0));
289 EMIT_CONDITIONAL(emit_move_r_imm32(tmp2, pc + tmp + 2), (op & 0x0200) ? 1 : 0);
298 // BRA label 1010dddddddddddd
301 tmp = ((signed int)(op << 20) >> 19);
302 emit_move_r_imm32(SHR_PPC, pc + tmp + 2);
307 // BSR label 1011dddddddddddd
309 emit_move_r_imm32(SHR_PR, pc + 2);
314 emit_move_r_imm32(SHR_PC, pc - 2);
315 emith_pass_arg(2, sh2, op);
316 emith_call(sh2_do_op);
321 if (delayed_op == 1) {
322 emit_move_r_r(SHR_PC, SHR_PPC);
325 if (test_irq && delayed_op != 2) {
326 emith_pass_arg(1, sh2);
327 emith_call(sh2_test_irq);
332 host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
333 tcache_dsm_ptr = tcache_ptr;
338 if ((char *)tcache_ptr - (char *)tcache > DRC_TCACHE_SIZE) {
339 printf("tcache overflow!\n");
344 if (reg_map_g2h[SHR_SR] == -1) {
345 emith_ctx_sub(cycles << 12, SHR_SR * 4);
347 emith_sub_r_imm(reg_map_g2h[SHR_SR], cycles << 12);
348 emith_jump(sh2_drc_exit);
351 host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
352 tcache_dsm_ptr = tcache_ptr;
355 printf(" tcache %d/%d, hash collisions %d/%d, insns %d -> %d %.3f\n",
356 (char *)tcache_ptr - (char *)tcache, DRC_TCACHE_SIZE,
357 hash_collisions, block_count, insns_compiled, host_insn_count,
358 (double)host_insn_count / insns_compiled);
365 host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
366 tcache_dsm_ptr = tcache_ptr;
371 void __attribute__((noinline)) sh2_drc_dispatcher(SH2 *sh2)
373 while (((signed int)sh2->sr >> 12) > 0)
375 block_desc *bd = HASH_FUNC(sh2->pc_hashtab, sh2->pc);
379 if (bd->addr == sh2->pc)
380 block = bd->tcache_ptr;
382 block = dr_find_block(bd, sh2->pc);
386 block = sh2_translate(sh2, bd);
389 printf("= %csh2 enter %08x %p\n", sh2->is_slave ? 's' : 'm', sh2->pc, block);
391 sh2_drc_entry(sh2, block);
395 void sh2_execute(SH2 *sh2, int cycles)
397 sh2->cycles_aim += cycles;
398 cycles = sh2->cycles_aim - sh2->cycles_done;
400 // cycles are kept in SHR_SR unused bits (upper 20)
402 sh2->sr |= cycles << 12;
403 sh2_drc_dispatcher(sh2);
405 sh2->cycles_done += cycles - ((signed int)sh2->sr >> 12);
408 static void __attribute__((regparm(1))) sh2_test_irq(SH2 *sh2)
410 if (sh2->pending_irl > sh2->pending_int_irq)
411 sh2_irl_irq(sh2, sh2->pending_irl);
413 sh2_internal_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
416 int sh2_drc_init(SH2 *sh2)
418 if (block_table == NULL) {
420 block_table = calloc(MAX_BLOCK_COUNT, sizeof(*block_table));
421 if (block_table == NULL)
430 //assert(sh2->pc_hashtab == NULL);
431 sh2->pc_hashtab = calloc(sizeof(sh2->pc_hashtab[0]), MAX_HASH_ENTRIES);
432 if (sh2->pc_hashtab == NULL)
438 void sh2_drc_finish(SH2 *sh2)
440 if (block_table != NULL) {
445 free(sh2->pc_hashtab);
446 sh2->pc_hashtab = NULL;