8 extern int pending_exception;
10 //#define evprintf printf
13 u32 event_cycles[PSXINT_COUNT];
15 void schedule_timeslice(void)
17 u32 i, c = psxRegs.cycle;
18 u32 irqs = psxRegs.interrupt;
22 for (i = 0; irqs != 0; i++, irqs >>= 1) {
25 dif = event_cycles[i] - c;
26 //evprintf(" ev %d\n", dif);
27 if (0 < dif && dif < min)
30 next_interupt = c + min;
33 typedef void (irq_func)();
35 static irq_func * const irq_funcs[] = {
36 [PSXINT_SIO] = sioInterrupt,
37 [PSXINT_CDR] = cdrInterrupt,
38 [PSXINT_CDREAD] = cdrPlayReadInterrupt,
39 [PSXINT_GPUDMA] = gpuInterrupt,
40 [PSXINT_MDECOUTDMA] = mdec1Interrupt,
41 [PSXINT_SPUDMA] = spuInterrupt,
42 [PSXINT_MDECINDMA] = mdec0Interrupt,
43 [PSXINT_GPUOTCDMA] = gpuotcInterrupt,
44 [PSXINT_CDRDMA] = cdrDmaInterrupt,
45 [PSXINT_CDRLID] = cdrLidSeekInterrupt,
46 [PSXINT_IRQ10] = irq10Interrupt,
47 [PSXINT_SPU_UPDATE] = spuUpdate,
48 [PSXINT_RCNT] = psxRcntUpdate,
51 /* local dupe of psxBranchTest, using event_cycles */
52 static void irq_test(psxCP0Regs *cp0)
54 u32 cycle = psxRegs.cycle;
57 for (irq = 0, irq_bits = psxRegs.interrupt; irq_bits != 0; irq++, irq_bits >>= 1) {
60 if ((s32)(cycle - event_cycles[irq]) >= 0) {
61 // note: irq_funcs() also modify psxRegs.interrupt
62 psxRegs.interrupt &= ~(1u << irq);
67 cp0->n.Cause &= ~0x400;
68 if (psxHu32(0x1070) & psxHu32(0x1074))
69 cp0->n.Cause |= 0x400;
70 if (((cp0->n.Cause | 1) & cp0->n.SR & 0x401) == 0x401) {
71 psxException(0, 0, cp0);
72 pending_exception = 1;
76 void gen_interupt(psxCP0Regs *cp0)
78 evprintf(" +ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
79 next_interupt, next_interupt - psxRegs.cycle);
82 //pending_exception = 1;
86 evprintf(" -ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
87 next_interupt, next_interupt - psxRegs.cycle);