1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2013 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
23 #include "new_dynarec_config.h"
24 #include "linkage_offsets.h"
28 #define dynarec_local ESYM(dynarec_local)
29 #define ndrc_add_jump_out ESYM(ndrc_add_jump_out)
30 #define ndrc_try_restore_block ESYM(ndrc_try_restore_block)
31 #define ndrc_get_addr_ht ESYM(ndrc_get_addr_ht)
32 #define ndrc_get_addr_ht_param ESYM(ndrc_get_addr_ht_param)
33 #define ndrc_write_invalidate_one ESYM(ndrc_write_invalidate_one)
34 #define gen_interupt ESYM(gen_interupt)
35 #define gteCheckStallRaw ESYM(gteCheckStallRaw)
36 #define psxException ESYM(psxException)
42 .type dynarec_local, %object
43 .size dynarec_local, LO_dynarec_local_size
45 .space LO_dynarec_local_size
47 #define DRC_VAR_(name, vname, size_) \
48 vname = dynarec_local + LO_##name; \
50 .type vname, %object; \
53 #define DRC_VAR(name, size_) \
54 DRC_VAR_(name, ESYM(name), size_)
56 DRC_VAR(next_interupt, 4)
57 DRC_VAR(cycle_count, 4)
58 DRC_VAR(last_count, 4)
59 DRC_VAR(pending_exception, 4)
61 DRC_VAR(branch_target, 4)
64 DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
70 DRC_VAR(reg_cop0, 128)
71 DRC_VAR(reg_cop2d, 128)
72 DRC_VAR(reg_cop2c, 128)
76 @DRC_VAR(interrupt, 4)
77 @DRC_VAR(intCycle, 256)
80 DRC_VAR(inv_code_start, 4)
81 DRC_VAR(inv_code_end, 4)
85 DRC_VAR(zeromem_ptr, 4)
87 DRC_VAR(scratch_buf_ptr, 4)
88 DRC_VAR(ram_offset, 4)
103 .macro load_varadr reg var
104 #if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
105 movw \reg, #:lower16:(\var-(1678f+8))
106 movt \reg, #:upper16:(\var-(1678f+8))
109 #elif defined(HAVE_ARMV7) && !defined(__PIC__)
110 movw \reg, #:lower16:\var
111 movt \reg, #:upper16:\var
117 .macro load_varadr_ext reg var
118 #if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
119 movw \reg, #:lower16:(ptr_\var-(1678f+8))
120 movt \reg, #:upper16:(ptr_\var-(1678f+8))
124 load_varadr \reg \var
128 .macro mov_16 reg imm
132 mov \reg, #(\imm & 0x00ff)
133 orr \reg, #(\imm & 0xff00)
137 .macro mov_24 reg imm
139 movw \reg, #(\imm & 0xffff)
140 movt \reg, #(\imm >> 16)
142 mov \reg, #(\imm & 0x0000ff)
143 orr \reg, #(\imm & 0x00ff00)
144 orr \reg, #(\imm & 0xff0000)
148 FUNCTION(dyna_linker):
149 /* r0 = virtual target address */
150 /* r1 = pointer to an instruction to patch */
151 #ifndef NO_WRITE_EXEC
157 /* must not compile - that might expire the caller block */
159 bl ndrc_get_addr_ht_param
163 add r6, r5, r6, asr #6 /* old target */
165 moveq pc, r0 /* Stale i-cache */
171 and r1, r7, #0xff000000
174 add r1, r1, r2, lsr #8
180 /* XXX: should be able to do better than this... */
184 .size dyna_linker, .-dyna_linker
187 FUNCTION(jump_vaddr_r1):
190 .size jump_vaddr_r1, .-jump_vaddr_r1
191 FUNCTION(jump_vaddr_r2):
194 .size jump_vaddr_r2, .-jump_vaddr_r2
195 FUNCTION(jump_vaddr_r3):
198 .size jump_vaddr_r3, .-jump_vaddr_r3
199 FUNCTION(jump_vaddr_r4):
202 .size jump_vaddr_r4, .-jump_vaddr_r4
203 FUNCTION(jump_vaddr_r5):
206 .size jump_vaddr_r5, .-jump_vaddr_r5
207 FUNCTION(jump_vaddr_r6):
210 .size jump_vaddr_r6, .-jump_vaddr_r6
211 FUNCTION(jump_vaddr_r8):
214 .size jump_vaddr_r8, .-jump_vaddr_r8
215 FUNCTION(jump_vaddr_r9):
218 .size jump_vaddr_r9, .-jump_vaddr_r9
219 FUNCTION(jump_vaddr_r10):
222 .size jump_vaddr_r10, .-jump_vaddr_r10
223 FUNCTION(jump_vaddr_r12):
226 .size jump_vaddr_r12, .-jump_vaddr_r12
227 FUNCTION(jump_vaddr_r7):
229 .size jump_vaddr_r7, .-jump_vaddr_r7
230 FUNCTION(jump_vaddr_r0):
233 .size jump_vaddr_r0, .-jump_vaddr_r0
236 FUNCTION(cc_interrupt):
237 ldr r0, [fp, #LO_last_count]
240 str r1, [fp, #LO_pending_exception]
241 str r10, [fp, #LO_cycle] /* PCSX cycles */
244 add r0, fp, #LO_reg_cop0 /* CP0 */
247 ldr r10, [fp, #LO_cycle]
248 ldr r0, [fp, #LO_next_interupt]
249 ldr r1, [fp, #LO_pending_exception]
250 ldr r2, [fp, #LO_stop]
251 str r0, [fp, #LO_last_count]
254 ldmfdne sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
257 ldr r0, [fp, #LO_pcaddr]
260 .size cc_interrupt, .-cc_interrupt
263 FUNCTION(jump_addrerror_ds): /* R3000E_AdEL / R3000E_AdES in r0 */
264 str r1, [fp, #(LO_psxRegs + (34+8)*4)] /* BadVaddr */
267 FUNCTION(jump_addrerror):
268 str r1, [fp, #(LO_psxRegs + (34+8)*4)] /* BadVaddr */
271 FUNCTION(jump_overflow_ds):
272 mov r0, #(12<<2) /* R3000E_Ov */
275 FUNCTION(jump_overflow):
279 FUNCTION(jump_break_ds):
280 mov r0, #(9<<2) /* R3000E_Bp */
283 FUNCTION(jump_break):
287 FUNCTION(jump_syscall_ds):
288 mov r0, #(8<<2) /* R3000E_Syscall */
291 FUNCTION(jump_syscall):
296 ldr r3, [fp, #LO_last_count]
297 str r2, [fp, #LO_pcaddr]
299 str r10, [fp, #LO_cycle] /* PCSX cycles */
300 add r2, fp, #LO_reg_cop0 /* CP0 */
303 /* note: psxException might do recursive recompiler call from it's HLE code,
304 * so be ready for this */
305 FUNCTION(jump_to_new_pc):
306 ldr r1, [fp, #LO_next_interupt]
307 ldr r10, [fp, #LO_cycle]
308 ldr r0, [fp, #LO_pcaddr]
310 str r1, [fp, #LO_last_count]
313 .size jump_to_new_pc, .-jump_to_new_pc
316 FUNCTION(new_dyna_leave):
317 ldr r0, [fp, #LO_last_count]
320 str r10, [fp, #LO_cycle]
321 ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
322 .size new_dyna_leave, .-new_dyna_leave
325 FUNCTION(invalidate_addr_r0):
326 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
327 b invalidate_addr_call
328 .size invalidate_addr_r0, .-invalidate_addr_r0
330 FUNCTION(invalidate_addr_r1):
331 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
333 b invalidate_addr_call
334 .size invalidate_addr_r1, .-invalidate_addr_r1
336 FUNCTION(invalidate_addr_r2):
337 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
339 b invalidate_addr_call
340 .size invalidate_addr_r2, .-invalidate_addr_r2
342 FUNCTION(invalidate_addr_r3):
343 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
345 b invalidate_addr_call
346 .size invalidate_addr_r3, .-invalidate_addr_r3
348 FUNCTION(invalidate_addr_r4):
349 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
351 b invalidate_addr_call
352 .size invalidate_addr_r4, .-invalidate_addr_r4
354 FUNCTION(invalidate_addr_r5):
355 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
357 b invalidate_addr_call
358 .size invalidate_addr_r5, .-invalidate_addr_r5
360 FUNCTION(invalidate_addr_r6):
361 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
363 b invalidate_addr_call
364 .size invalidate_addr_r6, .-invalidate_addr_r6
366 FUNCTION(invalidate_addr_r7):
367 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
369 b invalidate_addr_call
370 .size invalidate_addr_r7, .-invalidate_addr_r7
372 FUNCTION(invalidate_addr_r8):
373 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
375 b invalidate_addr_call
376 .size invalidate_addr_r8, .-invalidate_addr_r8
378 FUNCTION(invalidate_addr_r9):
379 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
381 b invalidate_addr_call
382 .size invalidate_addr_r9, .-invalidate_addr_r9
384 FUNCTION(invalidate_addr_r10):
385 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
387 b invalidate_addr_call
388 .size invalidate_addr_r10, .-invalidate_addr_r10
390 FUNCTION(invalidate_addr_r12):
391 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
393 .size invalidate_addr_r12, .-invalidate_addr_r12
395 invalidate_addr_call:
396 ldr r12, [fp, #LO_inv_code_start]
397 ldr lr, [fp, #LO_inv_code_end]
400 blcc ndrc_write_invalidate_one
401 ldmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, pc}
402 .size invalidate_addr_call, .-invalidate_addr_call
405 FUNCTION(new_dyna_start):
406 /* ip is stored to conform EABI alignment */
407 stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
408 mov fp, r0 /* dynarec_local */
409 ldr r0, [fp, #LO_pcaddr]
411 ldr r1, [fp, #LO_next_interupt]
412 ldr r10, [fp, #LO_cycle]
413 str r1, [fp, #LO_last_count]
416 .size new_dyna_start, .-new_dyna_start
418 /* --------------------------------------- */
422 .macro pcsx_read_mem readop tab_shift
423 /* r0 = address, r1 = handler_tab, r2 = cycles */
425 lsr r3, #(20+\tab_shift)
426 ldr r12, [fp, #LO_last_count]
427 ldr r1, [r1, r3, lsl #2]
434 \readop r0, [r1, r3, lsl #\tab_shift]
437 str r2, [fp, #LO_cycle]
441 FUNCTION(jump_handler_read8):
442 add r1, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
443 pcsx_read_mem ldrbcc, 0
445 FUNCTION(jump_handler_read16):
446 add r1, #0x1000/4*4 @ shift to r16 part
447 pcsx_read_mem ldrhcc, 1
449 FUNCTION(jump_handler_read32):
450 pcsx_read_mem ldrcc, 2
453 .macro memhandler_post
454 ldr r0, [fp, #LO_next_interupt]
455 ldr r2, [fp, #LO_cycle] @ memhandlers can modify cc, like dma
456 str r0, [fp, #LO_last_count]
460 .macro pcsx_write_mem wrtop tab_shift
461 /* r0 = address, r1 = data, r2 = cycles, r3 = handler_tab */
463 lsr r12, #(20+\tab_shift)
464 ldr r3, [r3, r12, lsl #2]
465 str r0, [fp, #LO_address] @ some handlers still need it..
467 mov r0, r2 @ cycle return in case of direct store
472 \wrtop r1, [r3, r12, lsl #\tab_shift]
475 ldr r12, [fp, #LO_last_count]
478 str r2, [fp, #LO_cycle]
480 str lr, [fp, #LO_saved_lr]
482 ldr lr, [fp, #LO_saved_lr]
488 FUNCTION(jump_handler_write8):
489 add r3, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
490 pcsx_write_mem strbcc, 0
492 FUNCTION(jump_handler_write16):
493 add r3, #0x1000/4*4 @ shift to r16 part
494 pcsx_write_mem strhcc, 1
496 FUNCTION(jump_handler_write32):
497 pcsx_write_mem strcc, 2
499 FUNCTION(jump_handler_write_h):
500 /* r0 = address, r1 = data, r2 = cycles, r3 = handler */
501 ldr r12, [fp, #LO_last_count]
502 str r0, [fp, #LO_address] @ some handlers still need it..
505 str r2, [fp, #LO_cycle]
507 str lr, [fp, #LO_saved_lr]
509 ldr lr, [fp, #LO_saved_lr]
514 FUNCTION(jump_handle_swl):
515 /* r0 = address, r1 = data, r2 = cycles */
516 ldr r3, [fp, #LO_mem_wtab]
518 ldr r3, [r3, r12, lsl #2]
520 bcs jump_handle_swx_interp
539 lsreq r12, r1, #24 @ 0
544 FUNCTION(jump_handle_swr):
545 /* r0 = address, r1 = data, r2 = cycles */
546 ldr r3, [fp, #LO_mem_wtab]
548 ldr r3, [r3, r12, lsl #2]
550 bcs jump_handle_swx_interp
565 jump_handle_swx_interp: /* almost never happens */
566 ldr r3, [fp, #LO_last_count]
567 add r0, fp, #LO_psxRegs
569 str r2, [fp, #LO_cycle] /* PCSX cycles */
573 .macro rcntx_read_mode0 num
574 /* r0 = address, r2 = cycles */
575 ldr r3, [fp, #LO_rcnts+6*4+7*4*\num] @ cycleStart
577 sub r0, r0, r3, lsl #16
582 FUNCTION(rcnt0_read_count_m0):
585 FUNCTION(rcnt1_read_count_m0):
588 FUNCTION(rcnt2_read_count_m0):
591 FUNCTION(rcnt0_read_count_m1):
592 /* r0 = address, r2 = cycles */
593 ldr r3, [fp, #LO_rcnts+6*4+7*4*0] @ cycleStart
596 mul r0, r1, r2 @ /= 5
600 FUNCTION(rcnt1_read_count_m1):
601 /* r0 = address, r2 = cycles */
602 ldr r3, [fp, #LO_rcnts+6*4+7*4*1]
605 umull r3, r0, r1, r2 @ ~ /= hsync_cycles, max ~0x1e6cdd
608 FUNCTION(rcnt2_read_count_m1):
609 /* r0 = address, r2 = cycles */
610 ldr r3, [fp, #LO_rcnts+6*4+7*4*2]
611 mov r0, r2, lsl #16-3
612 sub r0, r0, r3, lsl #16-3
616 FUNCTION(call_gteStall):
617 /* r0 = op_cycles, r1 = cycles */
618 ldr r2, [fp, #LO_last_count]
619 str lr, [fp, #LO_saved_lr]
621 str r1, [fp, #LO_cycle]
622 add r1, fp, #LO_psxRegs
624 ldr lr, [fp, #LO_saved_lr]
634 orr r1, r1, r1, lsl #8
636 orr r1, r1, r1, lsl #16 @ searched char in every byte
637 ldrb r0, [r0, #12] @ last byte
645 orr r3, r3, #0xff000000 @ EXCLUDE_REG
646 uadd8 r0, r12, r1 @ add and set GE bits when not 0 (match)
648 sel r0, r12, r1 @ 0 if no match, else ff in some byte
654 clz r0, r0 @ 0, 8, 16, 24 or 32
657 sub r0, r12, r0, lsr #3 @ 3, 2, 1, 0 or -1
658 sub r2, r12, r2, lsr #3
659 sub r3, r12, r3, lsr #3
666 #endif /* HAVE_ARMV6 */
668 @ vim:filetype=armasm