1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2013 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
23 #include "new_dynarec_config.h"
24 #include "linkage_offsets.h"
28 #define dynarec_local ESYM(dynarec_local)
29 #define add_jump_out ESYM(add_jump_out)
30 #define new_recompile_block ESYM(new_recompile_block)
31 #define get_addr ESYM(get_addr)
32 #define get_addr_ht ESYM(get_addr_ht)
33 #define clean_blocks ESYM(clean_blocks)
34 #define gen_interupt ESYM(gen_interupt)
35 #define invalidate_addr ESYM(invalidate_addr)
36 #define gteCheckStallRaw ESYM(gteCheckStallRaw)
37 #define psxException ESYM(psxException)
43 .type dynarec_local, %object
44 .size dynarec_local, LO_dynarec_local_size
46 .space LO_dynarec_local_size
48 #define DRC_VAR_(name, vname, size_) \
49 vname = dynarec_local + LO_##name; \
51 .type vname, %object; \
54 #define DRC_VAR(name, size_) \
55 DRC_VAR_(name, ESYM(name), size_)
57 DRC_VAR(next_interupt, 4)
58 DRC_VAR(cycle_count, 4)
59 DRC_VAR(last_count, 4)
60 DRC_VAR(pending_exception, 4)
62 DRC_VAR(branch_target, 4)
65 DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
71 DRC_VAR(reg_cop0, 128)
72 DRC_VAR(reg_cop2d, 128)
73 DRC_VAR(reg_cop2c, 128)
77 @DRC_VAR(interrupt, 4)
78 @DRC_VAR(intCycle, 256)
81 DRC_VAR(inv_code_start, 4)
82 DRC_VAR(inv_code_end, 4)
86 DRC_VAR(zeromem_ptr, 4)
88 DRC_VAR(scratch_buf_ptr, 4)
89 DRC_VAR(ram_offset, 4)
91 DRC_VAR(restore_candidate, 512)
94 #ifdef TEXRELS_FORBIDDEN
100 .word ESYM(jump_dirty)
102 .word ESYM(hash_table)
117 .macro load_varadr reg var
118 #if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
119 movw \reg, #:lower16:(\var-(1678f+8))
120 movt \reg, #:upper16:(\var-(1678f+8))
123 #elif defined(HAVE_ARMV7) && !defined(__PIC__)
124 movw \reg, #:lower16:\var
125 movt \reg, #:upper16:\var
131 .macro load_varadr_ext reg var
132 #if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
133 movw \reg, #:lower16:(ptr_\var-(1678f+8))
134 movt \reg, #:upper16:(ptr_\var-(1678f+8))
138 load_varadr \reg \var
142 .macro mov_16 reg imm
146 mov \reg, #(\imm & 0x00ff)
147 orr \reg, #(\imm & 0xff00)
151 .macro mov_24 reg imm
153 movw \reg, #(\imm & 0xffff)
154 movt \reg, #(\imm >> 16)
156 mov \reg, #(\imm & 0x0000ff)
157 orr \reg, #(\imm & 0x00ff00)
158 orr \reg, #(\imm & 0xff0000)
162 /* r0 = virtual target address */
163 /* r1 = instruction to patch */
164 .macro dyna_linker_main
165 #ifndef NO_WRITE_EXEC
166 load_varadr_ext r3, jump_in
179 ldr r5, [r3, r2, lsl #2]
181 add r6, r1, r12, asr #6 /* old target */
187 ldr r3, [r5] /* ll_entry .vaddr */
188 ldrd r4, r5, [r4, #8] /* ll_entry .next, .addr */
192 moveq pc, r4 /* Stale i-cache */
194 b 1b /* jump_in may have dupes, continue search */
197 beq 3f /* r0 not in jump_in */
203 and r1, r7, #0xff000000
206 add r1, r1, r2, lsr #8
210 /* hash_table lookup */
212 load_varadr_ext r3, jump_dirty
213 eor r4, r0, r0, lsl #16
215 load_varadr_ext r6, hash_table
219 ldr r5, [r3, r2, lsl #2]
226 /* jump_dirty lookup */
236 /* hash_table insert */
246 /* XXX: should be able to do better than this... */
253 FUNCTION(dyna_linker):
254 /* r0 = virtual target address */
255 /* r1 = instruction to patch */
260 bl new_recompile_block
267 mov r2, #(4<<2) /* Address error (fetch) */
268 .size dyna_linker, .-dyna_linker
270 FUNCTION(exec_pagefault):
271 /* r0 = instruction pointer */
272 /* r1 = fault address */
274 ldr r3, [fp, #LO_reg_cop0+48] /* Status */
275 str r0, [fp, #LO_reg_cop0+56] /* EPC */
277 str r1, [fp, #LO_reg_cop0+32] /* BadVAddr */
278 str r3, [fp, #LO_reg_cop0+48] /* Status */
279 str r2, [fp, #LO_reg_cop0+52] /* Cause */
284 .size exec_pagefault, .-exec_pagefault
286 /* Special dynamic linker for the case where a page fault
287 may occur in a branch delay slot */
288 FUNCTION(dyna_linker_ds):
289 /* r0 = virtual target address */
290 /* r1 = instruction to patch */
297 bl new_recompile_block
304 mov r2, #0x80000008 /* High bit set indicates pagefault in delay slot */
307 .size dyna_linker_ds, .-dyna_linker_ds
311 FUNCTION(jump_vaddr_r0):
312 eor r2, r0, r0, lsl #16
314 .size jump_vaddr_r0, .-jump_vaddr_r0
315 FUNCTION(jump_vaddr_r1):
316 eor r2, r1, r1, lsl #16
319 .size jump_vaddr_r1, .-jump_vaddr_r1
320 FUNCTION(jump_vaddr_r2):
322 eor r2, r2, r2, lsl #16
324 .size jump_vaddr_r2, .-jump_vaddr_r2
325 FUNCTION(jump_vaddr_r3):
326 eor r2, r3, r3, lsl #16
329 .size jump_vaddr_r3, .-jump_vaddr_r3
330 FUNCTION(jump_vaddr_r4):
331 eor r2, r4, r4, lsl #16
334 .size jump_vaddr_r4, .-jump_vaddr_r4
335 FUNCTION(jump_vaddr_r5):
336 eor r2, r5, r5, lsl #16
339 .size jump_vaddr_r5, .-jump_vaddr_r5
340 FUNCTION(jump_vaddr_r6):
341 eor r2, r6, r6, lsl #16
344 .size jump_vaddr_r6, .-jump_vaddr_r6
345 FUNCTION(jump_vaddr_r8):
346 eor r2, r8, r8, lsl #16
349 .size jump_vaddr_r8, .-jump_vaddr_r8
350 FUNCTION(jump_vaddr_r9):
351 eor r2, r9, r9, lsl #16
354 .size jump_vaddr_r9, .-jump_vaddr_r9
355 FUNCTION(jump_vaddr_r10):
356 eor r2, r10, r10, lsl #16
359 .size jump_vaddr_r10, .-jump_vaddr_r10
360 FUNCTION(jump_vaddr_r12):
361 eor r2, r12, r12, lsl #16
364 .size jump_vaddr_r12, .-jump_vaddr_r12
365 FUNCTION(jump_vaddr_r7):
366 eor r2, r7, r7, lsl #16
368 .size jump_vaddr_r7, .-jump_vaddr_r7
369 FUNCTION(jump_vaddr):
370 load_varadr_ext r1, hash_table
372 and r2, r3, r2, lsr #12
379 str r10, [fp, #LO_cycle_count]
381 ldr r10, [fp, #LO_cycle_count]
383 .size jump_vaddr, .-jump_vaddr
387 FUNCTION(verify_code_ds):
388 str r8, [fp, #LO_branch_target] @ preserve HOST_BTREG?
389 FUNCTION(verify_code):
417 ldr r8, [fp, #LO_branch_target]
422 .size verify_code, .-verify_code
423 .size verify_code_ds, .-verify_code_ds
426 FUNCTION(cc_interrupt):
427 ldr r0, [fp, #LO_last_count]
431 str r1, [fp, #LO_pending_exception]
432 and r2, r2, r10, lsr #17
433 add r3, fp, #LO_restore_candidate
434 str r10, [fp, #LO_cycle] /* PCSX cycles */
435 @@ str r10, [fp, #LO_reg_cop0+36] /* Count - not on PSX */
443 ldr r10, [fp, #LO_cycle]
444 ldr r0, [fp, #LO_next_interupt]
445 ldr r1, [fp, #LO_pending_exception]
446 ldr r2, [fp, #LO_stop]
447 str r0, [fp, #LO_last_count]
450 ldmfdne sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
454 ldr r0, [fp, #LO_pcaddr]
458 /* Move 'dirty' blocks to the 'clean' list */
469 .size cc_interrupt, .-cc_interrupt
472 FUNCTION(fp_exception):
475 ldr r1, [fp, #LO_reg_cop0+48] /* Status */
477 str r0, [fp, #LO_reg_cop0+56] /* EPC */
480 str r1, [fp, #LO_reg_cop0+48] /* Status */
481 str r2, [fp, #LO_reg_cop0+52] /* Cause */
485 .size fp_exception, .-fp_exception
487 FUNCTION(fp_exception_ds):
488 mov r2, #0x90000000 /* Set high bit if delay slot */
490 .size fp_exception_ds, .-fp_exception_ds
493 FUNCTION(jump_break_ds):
497 FUNCTION(jump_break):
501 FUNCTION(jump_syscall_ds):
505 FUNCTION(jump_syscall):
510 ldr r3, [fp, #LO_last_count]
511 str r2, [fp, #LO_pcaddr]
513 str r10, [fp, #LO_cycle] /* PCSX cycles */
516 /* note: psxException might do recursive recompiler call from it's HLE code,
517 * so be ready for this */
518 FUNCTION(jump_to_new_pc):
519 ldr r1, [fp, #LO_next_interupt]
520 ldr r10, [fp, #LO_cycle]
521 ldr r0, [fp, #LO_pcaddr]
523 str r1, [fp, #LO_last_count]
526 .size jump_to_new_pc, .-jump_to_new_pc
529 FUNCTION(new_dyna_leave):
530 ldr r0, [fp, #LO_last_count]
533 str r10, [fp, #LO_cycle]
534 ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
535 .size new_dyna_leave, .-new_dyna_leave
538 FUNCTION(invalidate_addr_r0):
539 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
540 b invalidate_addr_call
541 .size invalidate_addr_r0, .-invalidate_addr_r0
543 FUNCTION(invalidate_addr_r1):
544 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
546 b invalidate_addr_call
547 .size invalidate_addr_r1, .-invalidate_addr_r1
549 FUNCTION(invalidate_addr_r2):
550 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
552 b invalidate_addr_call
553 .size invalidate_addr_r2, .-invalidate_addr_r2
555 FUNCTION(invalidate_addr_r3):
556 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
558 b invalidate_addr_call
559 .size invalidate_addr_r3, .-invalidate_addr_r3
561 FUNCTION(invalidate_addr_r4):
562 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
564 b invalidate_addr_call
565 .size invalidate_addr_r4, .-invalidate_addr_r4
567 FUNCTION(invalidate_addr_r5):
568 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
570 b invalidate_addr_call
571 .size invalidate_addr_r5, .-invalidate_addr_r5
573 FUNCTION(invalidate_addr_r6):
574 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
576 b invalidate_addr_call
577 .size invalidate_addr_r6, .-invalidate_addr_r6
579 FUNCTION(invalidate_addr_r7):
580 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
582 b invalidate_addr_call
583 .size invalidate_addr_r7, .-invalidate_addr_r7
585 FUNCTION(invalidate_addr_r8):
586 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
588 b invalidate_addr_call
589 .size invalidate_addr_r8, .-invalidate_addr_r8
591 FUNCTION(invalidate_addr_r9):
592 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
594 b invalidate_addr_call
595 .size invalidate_addr_r9, .-invalidate_addr_r9
597 FUNCTION(invalidate_addr_r10):
598 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
600 b invalidate_addr_call
601 .size invalidate_addr_r10, .-invalidate_addr_r10
603 FUNCTION(invalidate_addr_r12):
604 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
606 .size invalidate_addr_r12, .-invalidate_addr_r12
608 invalidate_addr_call:
609 ldr r12, [fp, #LO_inv_code_start]
610 ldr lr, [fp, #LO_inv_code_end]
614 ldmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, pc}
615 .size invalidate_addr_call, .-invalidate_addr_call
618 FUNCTION(new_dyna_start):
619 /* ip is stored to conform EABI alignment */
620 stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
621 mov fp, r0 /* dynarec_local */
622 ldr r0, [fp, #LO_pcaddr]
624 ldr r1, [fp, #LO_next_interupt]
625 ldr r10, [fp, #LO_cycle]
626 str r1, [fp, #LO_last_count]
629 .size new_dyna_start, .-new_dyna_start
631 /* --------------------------------------- */
635 .macro pcsx_read_mem readop tab_shift
636 /* r0 = address, r1 = handler_tab, r2 = cycles */
638 lsr r3, #(20+\tab_shift)
639 ldr r12, [fp, #LO_last_count]
640 ldr r1, [r1, r3, lsl #2]
647 \readop r0, [r1, r3, lsl #\tab_shift]
650 str r2, [fp, #LO_cycle]
654 FUNCTION(jump_handler_read8):
655 add r1, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
656 pcsx_read_mem ldrbcc, 0
658 FUNCTION(jump_handler_read16):
659 add r1, #0x1000/4*4 @ shift to r16 part
660 pcsx_read_mem ldrhcc, 1
662 FUNCTION(jump_handler_read32):
663 pcsx_read_mem ldrcc, 2
666 .macro memhandler_post
667 ldr r0, [fp, #LO_next_interupt]
668 ldr r2, [fp, #LO_cycle] @ memhandlers can modify cc, like dma
669 str r0, [fp, #LO_last_count]
673 .macro pcsx_write_mem wrtop tab_shift
674 /* r0 = address, r1 = data, r2 = cycles, r3 = handler_tab */
676 lsr r12, #(20+\tab_shift)
677 ldr r3, [r3, r12, lsl #2]
678 str r0, [fp, #LO_address] @ some handlers still need it..
680 mov r0, r2 @ cycle return in case of direct store
685 \wrtop r1, [r3, r12, lsl #\tab_shift]
688 ldr r12, [fp, #LO_last_count]
691 str r2, [fp, #LO_cycle]
693 str lr, [fp, #LO_saved_lr]
695 ldr lr, [fp, #LO_saved_lr]
701 FUNCTION(jump_handler_write8):
702 add r3, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
703 pcsx_write_mem strbcc, 0
705 FUNCTION(jump_handler_write16):
706 add r3, #0x1000/4*4 @ shift to r16 part
707 pcsx_write_mem strhcc, 1
709 FUNCTION(jump_handler_write32):
710 pcsx_write_mem strcc, 2
712 FUNCTION(jump_handler_write_h):
713 /* r0 = address, r1 = data, r2 = cycles, r3 = handler */
714 ldr r12, [fp, #LO_last_count]
715 str r0, [fp, #LO_address] @ some handlers still need it..
718 str r2, [fp, #LO_cycle]
720 str lr, [fp, #LO_saved_lr]
722 ldr lr, [fp, #LO_saved_lr]
727 FUNCTION(jump_handle_swl):
728 /* r0 = address, r1 = data, r2 = cycles */
729 ldr r3, [fp, #LO_mem_wtab]
731 ldr r3, [r3, r12, lsl #2]
752 lsreq r12, r1, #24 @ 0
762 FUNCTION(jump_handle_swr):
763 /* r0 = address, r1 = data, r2 = cycles */
764 ldr r3, [fp, #LO_mem_wtab]
766 ldr r3, [r3, r12, lsl #2]
788 .macro rcntx_read_mode0 num
789 /* r0 = address, r2 = cycles */
790 ldr r3, [fp, #LO_rcnts+6*4+7*4*\num] @ cycleStart
792 sub r0, r0, r3, lsl #16
797 FUNCTION(rcnt0_read_count_m0):
800 FUNCTION(rcnt1_read_count_m0):
803 FUNCTION(rcnt2_read_count_m0):
806 FUNCTION(rcnt0_read_count_m1):
807 /* r0 = address, r2 = cycles */
808 ldr r3, [fp, #LO_rcnts+6*4+7*4*0] @ cycleStart
811 mul r0, r1, r2 @ /= 5
815 FUNCTION(rcnt1_read_count_m1):
816 /* r0 = address, r2 = cycles */
817 ldr r3, [fp, #LO_rcnts+6*4+7*4*1]
820 umull r3, r0, r1, r2 @ ~ /= hsync_cycles, max ~0x1e6cdd
823 FUNCTION(rcnt2_read_count_m1):
824 /* r0 = address, r2 = cycles */
825 ldr r3, [fp, #LO_rcnts+6*4+7*4*2]
826 mov r0, r2, lsl #16-3
827 sub r0, r0, r3, lsl #16-3
831 FUNCTION(call_gteStall):
832 /* r0 = op_cycles, r1 = cycles */
833 ldr r2, [fp, #LO_last_count]
834 str lr, [fp, #LO_saved_lr]
836 str r1, [fp, #LO_cycle]
837 add r1, fp, #LO_psxRegs
839 ldr lr, [fp, #LO_saved_lr]
849 orr r1, r1, r1, lsl #8
851 orr r1, r1, r1, lsl #16 @ searched char in every byte
852 ldrb r0, [r0, #12] @ last byte
860 orr r3, r3, #0xff000000 @ EXCLUDE_REG
861 uadd8 r0, r12, r1 @ add and set GE bits when not 0 (match)
863 sel r0, r12, r1 @ 0 if no match, else ff in some byte
869 clz r0, r0 @ 0, 8, 16, 24 or 32
872 sub r0, r12, r0, lsr #3 @ 3, 2, 1, 0 or -1
873 sub r2, r12, r2, lsr #3
874 sub r3, r12, r3, lsr #3
881 #endif /* HAVE_ARMV6 */
883 @ vim:filetype=armasm