1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * linkage_arm.s for PCSX *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2013 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
22 #include "arm_features.h"
23 #include "new_dynarec_config.h"
24 #include "linkage_offsets.h"
28 #define dynarec_local ESYM(dynarec_local)
29 #define add_jump_out ESYM(add_jump_out)
30 #define new_recompile_block ESYM(new_recompile_block)
31 #define ndrc_try_restore_block ESYM(ndrc_try_restore_block)
32 #define get_addr ESYM(get_addr)
33 #define get_addr_ht ESYM(get_addr_ht)
34 #define gen_interupt ESYM(gen_interupt)
35 #define invalidate_addr ESYM(invalidate_addr)
36 #define gteCheckStallRaw ESYM(gteCheckStallRaw)
37 #define psxException ESYM(psxException)
43 .type dynarec_local, %object
44 .size dynarec_local, LO_dynarec_local_size
46 .space LO_dynarec_local_size
48 #define DRC_VAR_(name, vname, size_) \
49 vname = dynarec_local + LO_##name; \
51 .type vname, %object; \
54 #define DRC_VAR(name, size_) \
55 DRC_VAR_(name, ESYM(name), size_)
57 DRC_VAR(next_interupt, 4)
58 DRC_VAR(cycle_count, 4)
59 DRC_VAR(last_count, 4)
60 DRC_VAR(pending_exception, 4)
62 DRC_VAR(branch_target, 4)
65 DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs)
71 DRC_VAR(reg_cop0, 128)
72 DRC_VAR(reg_cop2d, 128)
73 DRC_VAR(reg_cop2c, 128)
77 @DRC_VAR(interrupt, 4)
78 @DRC_VAR(intCycle, 256)
81 DRC_VAR(inv_code_start, 4)
82 DRC_VAR(inv_code_end, 4)
86 DRC_VAR(zeromem_ptr, 4)
88 DRC_VAR(scratch_buf_ptr, 4)
89 DRC_VAR(ram_offset, 4)
93 #ifdef TEXRELS_FORBIDDEN
99 .word ESYM(hash_table)
114 .macro load_varadr reg var
115 #if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
116 movw \reg, #:lower16:(\var-(1678f+8))
117 movt \reg, #:upper16:(\var-(1678f+8))
120 #elif defined(HAVE_ARMV7) && !defined(__PIC__)
121 movw \reg, #:lower16:\var
122 movt \reg, #:upper16:\var
128 .macro load_varadr_ext reg var
129 #if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
130 movw \reg, #:lower16:(ptr_\var-(1678f+8))
131 movt \reg, #:upper16:(ptr_\var-(1678f+8))
135 load_varadr \reg \var
139 .macro mov_16 reg imm
143 mov \reg, #(\imm & 0x00ff)
144 orr \reg, #(\imm & 0xff00)
148 .macro mov_24 reg imm
150 movw \reg, #(\imm & 0xffff)
151 movt \reg, #(\imm >> 16)
153 mov \reg, #(\imm & 0x0000ff)
154 orr \reg, #(\imm & 0x00ff00)
155 orr \reg, #(\imm & 0xff0000)
159 /* r4 = virtual target address */
160 /* r5 = instruction to patch */
161 .macro dyna_linker_main
162 #ifndef NO_WRITE_EXEC
163 load_varadr_ext r3, jump_in
176 ldr r1, [r3, r2, lsl #2]
178 add r6, r5, r12, asr #6 /* old target */
184 ldr r3, [r1] /* ll_entry .vaddr */
185 ldrd r0, r1, [r0, #8] /* ll_entry .addr, .next */
189 moveq pc, r0 /* Stale i-cache */
191 b 1b /* jump_in may have dupes, continue search */
194 beq 3f /* r4 not in jump_in */
200 and r1, r7, #0xff000000
203 add r1, r1, r2, lsr #8
208 bl ndrc_try_restore_block
212 /* XXX: should be able to do better than this... */
220 FUNCTION(dyna_linker):
221 /* r0 = virtual target address */
222 /* r1 = instruction to patch */
229 bl new_recompile_block
235 mov r2, #(4<<2) /* Address error (fetch) */
237 /* r0 = instruction pointer */
238 /* r1 = fault address */
239 ldr r3, [fp, #LO_reg_cop0+48] /* Status */
240 str r0, [fp, #LO_reg_cop0+56] /* EPC */
242 str r1, [fp, #LO_reg_cop0+32] /* BadVAddr */
243 str r3, [fp, #LO_reg_cop0+48] /* Status */
244 str r2, [fp, #LO_reg_cop0+52] /* Cause */
249 .size dyna_linker, .-dyna_linker
252 FUNCTION(jump_vaddr_r0):
253 eor r2, r0, r0, lsl #16
255 .size jump_vaddr_r0, .-jump_vaddr_r0
256 FUNCTION(jump_vaddr_r1):
257 eor r2, r1, r1, lsl #16
260 .size jump_vaddr_r1, .-jump_vaddr_r1
261 FUNCTION(jump_vaddr_r2):
263 eor r2, r2, r2, lsl #16
265 .size jump_vaddr_r2, .-jump_vaddr_r2
266 FUNCTION(jump_vaddr_r3):
267 eor r2, r3, r3, lsl #16
270 .size jump_vaddr_r3, .-jump_vaddr_r3
271 FUNCTION(jump_vaddr_r4):
272 eor r2, r4, r4, lsl #16
275 .size jump_vaddr_r4, .-jump_vaddr_r4
276 FUNCTION(jump_vaddr_r5):
277 eor r2, r5, r5, lsl #16
280 .size jump_vaddr_r5, .-jump_vaddr_r5
281 FUNCTION(jump_vaddr_r6):
282 eor r2, r6, r6, lsl #16
285 .size jump_vaddr_r6, .-jump_vaddr_r6
286 FUNCTION(jump_vaddr_r8):
287 eor r2, r8, r8, lsl #16
290 .size jump_vaddr_r8, .-jump_vaddr_r8
291 FUNCTION(jump_vaddr_r9):
292 eor r2, r9, r9, lsl #16
295 .size jump_vaddr_r9, .-jump_vaddr_r9
296 FUNCTION(jump_vaddr_r10):
297 eor r2, r10, r10, lsl #16
300 .size jump_vaddr_r10, .-jump_vaddr_r10
301 FUNCTION(jump_vaddr_r12):
302 eor r2, r12, r12, lsl #16
305 .size jump_vaddr_r12, .-jump_vaddr_r12
306 FUNCTION(jump_vaddr_r7):
307 eor r2, r7, r7, lsl #16
309 .size jump_vaddr_r7, .-jump_vaddr_r7
310 FUNCTION(jump_vaddr):
311 load_varadr_ext r1, hash_table
313 and r2, r3, r2, lsr #12
320 str r10, [fp, #LO_cycle_count]
322 ldr r10, [fp, #LO_cycle_count]
324 .size jump_vaddr, .-jump_vaddr
328 FUNCTION(verify_code):
356 ldr r8, [fp, #LO_branch_target]
361 .size verify_code, .-verify_code
364 FUNCTION(cc_interrupt):
365 ldr r0, [fp, #LO_last_count]
368 str r1, [fp, #LO_pending_exception]
369 str r10, [fp, #LO_cycle] /* PCSX cycles */
370 @@ str r10, [fp, #LO_reg_cop0+36] /* Count - not on PSX */
375 ldr r10, [fp, #LO_cycle]
376 ldr r0, [fp, #LO_next_interupt]
377 ldr r1, [fp, #LO_pending_exception]
378 ldr r2, [fp, #LO_stop]
379 str r0, [fp, #LO_last_count]
382 ldmfdne sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
385 ldr r0, [fp, #LO_pcaddr]
388 .size cc_interrupt, .-cc_interrupt
391 FUNCTION(fp_exception):
394 ldr r1, [fp, #LO_reg_cop0+48] /* Status */
396 str r0, [fp, #LO_reg_cop0+56] /* EPC */
399 str r1, [fp, #LO_reg_cop0+48] /* Status */
400 str r2, [fp, #LO_reg_cop0+52] /* Cause */
404 .size fp_exception, .-fp_exception
406 FUNCTION(fp_exception_ds):
407 mov r2, #0x90000000 /* Set high bit if delay slot */
409 .size fp_exception_ds, .-fp_exception_ds
412 FUNCTION(jump_break_ds):
416 FUNCTION(jump_break):
420 FUNCTION(jump_syscall_ds):
424 FUNCTION(jump_syscall):
429 ldr r3, [fp, #LO_last_count]
430 str r2, [fp, #LO_pcaddr]
432 str r10, [fp, #LO_cycle] /* PCSX cycles */
435 /* note: psxException might do recursive recompiler call from it's HLE code,
436 * so be ready for this */
437 FUNCTION(jump_to_new_pc):
438 ldr r1, [fp, #LO_next_interupt]
439 ldr r10, [fp, #LO_cycle]
440 ldr r0, [fp, #LO_pcaddr]
442 str r1, [fp, #LO_last_count]
445 .size jump_to_new_pc, .-jump_to_new_pc
448 FUNCTION(new_dyna_leave):
449 ldr r0, [fp, #LO_last_count]
452 str r10, [fp, #LO_cycle]
453 ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc}
454 .size new_dyna_leave, .-new_dyna_leave
457 FUNCTION(invalidate_addr_r0):
458 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
459 b invalidate_addr_call
460 .size invalidate_addr_r0, .-invalidate_addr_r0
462 FUNCTION(invalidate_addr_r1):
463 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
465 b invalidate_addr_call
466 .size invalidate_addr_r1, .-invalidate_addr_r1
468 FUNCTION(invalidate_addr_r2):
469 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
471 b invalidate_addr_call
472 .size invalidate_addr_r2, .-invalidate_addr_r2
474 FUNCTION(invalidate_addr_r3):
475 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
477 b invalidate_addr_call
478 .size invalidate_addr_r3, .-invalidate_addr_r3
480 FUNCTION(invalidate_addr_r4):
481 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
483 b invalidate_addr_call
484 .size invalidate_addr_r4, .-invalidate_addr_r4
486 FUNCTION(invalidate_addr_r5):
487 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
489 b invalidate_addr_call
490 .size invalidate_addr_r5, .-invalidate_addr_r5
492 FUNCTION(invalidate_addr_r6):
493 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
495 b invalidate_addr_call
496 .size invalidate_addr_r6, .-invalidate_addr_r6
498 FUNCTION(invalidate_addr_r7):
499 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
501 b invalidate_addr_call
502 .size invalidate_addr_r7, .-invalidate_addr_r7
504 FUNCTION(invalidate_addr_r8):
505 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
507 b invalidate_addr_call
508 .size invalidate_addr_r8, .-invalidate_addr_r8
510 FUNCTION(invalidate_addr_r9):
511 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
513 b invalidate_addr_call
514 .size invalidate_addr_r9, .-invalidate_addr_r9
516 FUNCTION(invalidate_addr_r10):
517 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
519 b invalidate_addr_call
520 .size invalidate_addr_r10, .-invalidate_addr_r10
522 FUNCTION(invalidate_addr_r12):
523 stmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, lr}
525 .size invalidate_addr_r12, .-invalidate_addr_r12
527 invalidate_addr_call:
528 ldr r12, [fp, #LO_inv_code_start]
529 ldr lr, [fp, #LO_inv_code_end]
533 ldmia fp, {r0, r1, r2, r3, EXTRA_UNSAVED_REGS r12, pc}
534 .size invalidate_addr_call, .-invalidate_addr_call
537 FUNCTION(new_dyna_start):
538 /* ip is stored to conform EABI alignment */
539 stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
540 mov fp, r0 /* dynarec_local */
541 ldr r0, [fp, #LO_pcaddr]
543 ldr r1, [fp, #LO_next_interupt]
544 ldr r10, [fp, #LO_cycle]
545 str r1, [fp, #LO_last_count]
548 .size new_dyna_start, .-new_dyna_start
550 /* --------------------------------------- */
554 .macro pcsx_read_mem readop tab_shift
555 /* r0 = address, r1 = handler_tab, r2 = cycles */
557 lsr r3, #(20+\tab_shift)
558 ldr r12, [fp, #LO_last_count]
559 ldr r1, [r1, r3, lsl #2]
566 \readop r0, [r1, r3, lsl #\tab_shift]
569 str r2, [fp, #LO_cycle]
573 FUNCTION(jump_handler_read8):
574 add r1, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
575 pcsx_read_mem ldrbcc, 0
577 FUNCTION(jump_handler_read16):
578 add r1, #0x1000/4*4 @ shift to r16 part
579 pcsx_read_mem ldrhcc, 1
581 FUNCTION(jump_handler_read32):
582 pcsx_read_mem ldrcc, 2
585 .macro memhandler_post
586 ldr r0, [fp, #LO_next_interupt]
587 ldr r2, [fp, #LO_cycle] @ memhandlers can modify cc, like dma
588 str r0, [fp, #LO_last_count]
592 .macro pcsx_write_mem wrtop tab_shift
593 /* r0 = address, r1 = data, r2 = cycles, r3 = handler_tab */
595 lsr r12, #(20+\tab_shift)
596 ldr r3, [r3, r12, lsl #2]
597 str r0, [fp, #LO_address] @ some handlers still need it..
599 mov r0, r2 @ cycle return in case of direct store
604 \wrtop r1, [r3, r12, lsl #\tab_shift]
607 ldr r12, [fp, #LO_last_count]
610 str r2, [fp, #LO_cycle]
612 str lr, [fp, #LO_saved_lr]
614 ldr lr, [fp, #LO_saved_lr]
620 FUNCTION(jump_handler_write8):
621 add r3, #0x1000/4*4 + 0x1000/2*4 @ shift to r8 part
622 pcsx_write_mem strbcc, 0
624 FUNCTION(jump_handler_write16):
625 add r3, #0x1000/4*4 @ shift to r16 part
626 pcsx_write_mem strhcc, 1
628 FUNCTION(jump_handler_write32):
629 pcsx_write_mem strcc, 2
631 FUNCTION(jump_handler_write_h):
632 /* r0 = address, r1 = data, r2 = cycles, r3 = handler */
633 ldr r12, [fp, #LO_last_count]
634 str r0, [fp, #LO_address] @ some handlers still need it..
637 str r2, [fp, #LO_cycle]
639 str lr, [fp, #LO_saved_lr]
641 ldr lr, [fp, #LO_saved_lr]
646 FUNCTION(jump_handle_swl):
647 /* r0 = address, r1 = data, r2 = cycles */
648 ldr r3, [fp, #LO_mem_wtab]
650 ldr r3, [r3, r12, lsl #2]
671 lsreq r12, r1, #24 @ 0
681 FUNCTION(jump_handle_swr):
682 /* r0 = address, r1 = data, r2 = cycles */
683 ldr r3, [fp, #LO_mem_wtab]
685 ldr r3, [r3, r12, lsl #2]
707 .macro rcntx_read_mode0 num
708 /* r0 = address, r2 = cycles */
709 ldr r3, [fp, #LO_rcnts+6*4+7*4*\num] @ cycleStart
711 sub r0, r0, r3, lsl #16
716 FUNCTION(rcnt0_read_count_m0):
719 FUNCTION(rcnt1_read_count_m0):
722 FUNCTION(rcnt2_read_count_m0):
725 FUNCTION(rcnt0_read_count_m1):
726 /* r0 = address, r2 = cycles */
727 ldr r3, [fp, #LO_rcnts+6*4+7*4*0] @ cycleStart
730 mul r0, r1, r2 @ /= 5
734 FUNCTION(rcnt1_read_count_m1):
735 /* r0 = address, r2 = cycles */
736 ldr r3, [fp, #LO_rcnts+6*4+7*4*1]
739 umull r3, r0, r1, r2 @ ~ /= hsync_cycles, max ~0x1e6cdd
742 FUNCTION(rcnt2_read_count_m1):
743 /* r0 = address, r2 = cycles */
744 ldr r3, [fp, #LO_rcnts+6*4+7*4*2]
745 mov r0, r2, lsl #16-3
746 sub r0, r0, r3, lsl #16-3
750 FUNCTION(call_gteStall):
751 /* r0 = op_cycles, r1 = cycles */
752 ldr r2, [fp, #LO_last_count]
753 str lr, [fp, #LO_saved_lr]
755 str r1, [fp, #LO_cycle]
756 add r1, fp, #LO_psxRegs
758 ldr lr, [fp, #LO_saved_lr]
768 orr r1, r1, r1, lsl #8
770 orr r1, r1, r1, lsl #16 @ searched char in every byte
771 ldrb r0, [r0, #12] @ last byte
779 orr r3, r3, #0xff000000 @ EXCLUDE_REG
780 uadd8 r0, r12, r1 @ add and set GE bits when not 0 (match)
782 sel r0, r12, r1 @ 0 if no match, else ff in some byte
788 clz r0, r0 @ 0, 8, 16, 24 or 32
791 sub r0, r12, r0, lsr #3 @ 3, 2, 1, 0 or -1
792 sub r2, r12, r2, lsr #3
793 sub r3, r12, r3, lsr #3
800 #endif /* HAVE_ARMV6 */
802 @ vim:filetype=armasm