5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
9 #include "../pico_int.h"
10 #include "../sound/ym2612.h"
12 extern unsigned char formatted_bram[4*0x10];
14 static unsigned int m68k_cycle_mult;
16 void (*PicoMCDopenTray)(void) = NULL;
17 void (*PicoMCDcloseTray)(void) = NULL;
20 PICO_INTERNAL void PicoInitMCD(void)
26 PICO_INTERNAL void PicoExitMCD(void)
31 PICO_INTERNAL void PicoPowerMCD(void)
33 int fmt_size = sizeof(formatted_bram);
34 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
35 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
36 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
37 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
38 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
39 formatted_bram, fmt_size);
40 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
41 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
42 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
44 // cold reset state (tested)
45 Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
46 Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
47 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
48 memset(Pico_mcd->bios + 0x70, 0xff, 4);
51 PICO_INTERNAL int PicoResetMCD(void)
57 #ifdef _ASM_CD_MEMORY_C
58 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
61 // use SRam.data for RAM cart
62 if (PicoOpt & POPT_EN_MCD_RAMCART) {
63 if (SRam.data == NULL)
64 SRam.data = calloc(1, 0x12000);
66 else if (SRam.data != NULL) {
70 SRam.start = SRam.end = 0; // unused
72 pcd_event_schedule(0, PCD_EVENT_CDC, 12500000/75);
77 static __inline void SekRunS68k(unsigned int to)
82 if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
85 if (SekShouldInterrupt())
86 Pico_mcd->m.s68k_poll_a = 0;
88 SekCycleCntS68k += cyc_do;
90 PicoCpuCS68k.cycles = cyc_do;
91 CycloneRun(&PicoCpuCS68k);
92 SekCycleCntS68k -= PicoCpuCS68k.cycles;
93 #elif defined(EMU_M68K)
94 m68k_set_context(&PicoCpuMS68k);
95 SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
96 m68k_set_context(&PicoCpuMM68k);
97 #elif defined(EMU_F68K)
98 g_m68kcontext = &PicoCpuFS68k;
99 SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do;
100 g_m68kcontext = &PicoCpuFM68k;
105 unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
107 return (long long)c * m68k_cycle_mult >> 16;
111 static void pcd_cdc_event(unsigned int now)
115 pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
118 static void pcd_int3_timer_event(unsigned int now)
120 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
121 elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
125 if (Pico_mcd->s68k_regs[0x31] != 0)
126 pcd_event_schedule(now, PCD_EVENT_TIMER3,
127 Pico_mcd->s68k_regs[0x31] * 384);
130 static void pcd_gfx_event(unsigned int now)
133 if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
134 Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
135 Pico_mcd->rot_comp.Reg_64 = 0;
136 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) {
137 elprintf(EL_INTS |EL_CD, "s68k: gfx_cd irq 1");
143 static void pcd_dma_event(unsigned int now)
145 int ddx = Pico_mcd->s68k_regs[4] & 7;
146 Update_CDC_TRansfer(ddx);
149 typedef void (event_cb)(unsigned int now);
151 /* times are in s68k (12.5MHz) cycles */
152 unsigned int pcd_event_times[PCD_EVENT_COUNT];
153 static unsigned int event_time_next;
154 static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
155 [PCD_EVENT_CDC] = pcd_cdc_event,
156 [PCD_EVENT_TIMER3] = pcd_int3_timer_event,
157 [PCD_EVENT_GFX] = pcd_gfx_event,
158 [PCD_EVENT_DMA] = pcd_dma_event,
161 void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
168 pcd_event_times[event] = 0;
174 elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
175 pcd_event_times[event] = when;
177 if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
178 event_time_next = when;
181 void pcd_event_schedule_s68k(enum pcd_event event, int after)
183 if (SekCyclesLeftS68k > after)
184 SekEndRunS68k(after);
186 pcd_event_schedule(SekCyclesDoneS68k(), event, after);
189 static void pcd_run_events(unsigned int until)
191 int oldest, oldest_diff, time;
195 oldest = -1, oldest_diff = 0x7fffffff;
197 for (i = 0; i < PCD_EVENT_COUNT; i++) {
198 if (pcd_event_times[i]) {
199 diff = pcd_event_times[i] - until;
200 if (diff < oldest_diff) {
207 if (oldest_diff <= 0) {
208 time = pcd_event_times[oldest];
209 pcd_event_times[oldest] = 0;
210 elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
211 pcd_event_cbs[oldest](time);
213 else if (oldest_diff < 0x7fffffff) {
214 event_time_next = pcd_event_times[oldest];
224 elprintf(EL_CD, "cd: next event #%d at %u",
225 oldest, event_time_next);
228 int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
230 #define now SekCycleCntS68k
231 unsigned int s68k_target =
232 (unsigned long long)m68k_target * m68k_cycle_mult >> 16;
235 elprintf(EL_CD, "s68k sync to %u, %u->%u",
236 m68k_target, now, s68k_target);
238 if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
239 SekCycleCntS68k = SekCycleAimS68k = s68k_target;
240 pcd_run_events(m68k_target);
244 while (CYCLES_GT(s68k_target, now)) {
245 if (event_time_next && CYCLES_GE(now, event_time_next))
248 target = s68k_target;
249 if (event_time_next && CYCLES_GT(target, event_time_next))
250 target = event_time_next;
253 if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
257 return s68k_target - now;
261 #define pcd_run_cpus_normal pcd_run_cpus
262 //#define pcd_run_cpus_lockstep pcd_run_cpus
264 static void SekSyncM68k(void);
266 static inline void pcd_run_cpus_normal(int m68k_cycles)
268 SekCycleAim += m68k_cycles;
269 if (SekShouldInterrupt() || Pico_mcd->m.m68k_poll_cnt < 12)
270 Pico_mcd->m.m68k_poll_cnt = 0;
271 else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
272 int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
273 if (s68k_left <= 0) {
274 elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
275 Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
276 SekCycleCnt = SekCycleAim;
279 SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
285 static inline void pcd_run_cpus_lockstep(int m68k_cycles)
287 unsigned int target = SekCycleAim + m68k_cycles;
291 pcd_sync_s68k(SekCycleAim, 0);
292 } while (CYCLES_GT(target, SekCycleAim));
294 SekCycleAim = target;
298 #define CPUS_RUN(m68k_cycles) \
299 pcd_run_cpus(m68k_cycles)
301 #include "../pico_cmn.c"
304 PICO_INTERNAL void PicoFrameMCD(void)
306 if (!(PicoOpt&POPT_ALT_RENDERER))
309 // ~1.63 for NTSC, ~1.645 for PAL
311 m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
313 m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
318 void pcd_state_loaded(void)
323 pcd_state_loaded_mem();
326 cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
327 diff = cycles - SekCycleAimS68k;
328 if (diff < -1000 || diff > 1000) {
329 SekCycleCntS68k = SekCycleAimS68k = cycles;
331 if (pcd_event_times[PCD_EVENT_CDC] == 0) {
332 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
334 if (Pico_mcd->s68k_regs[0x31])
335 pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
336 Pico_mcd->s68k_regs[0x31] * 384);
338 if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
339 Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
340 Pico_mcd->rot_comp.Reg_64 = 0;
341 if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1)
344 if (Pico_mcd->scd.Status_CDC & 0x08)
345 Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7);
349 // vim:shiftwidth=2:ts=2:expandtab